From 3c080206fbdc8c481c335434b48baf5e6400a91e Mon Sep 17 00:00:00 2001
From: katamoni sai abhilash <katamoni@qti.qualcomm.com>
Date: Tue, 23 Feb 2021 14:46:18 +0530
Subject: [PATCH] ARM: dts: msm: Add qseecom node for sa8195 GVM

Add dts entry for qseecom node for sa8195

Change-Id: I7c0b7f3581a5f23d7a125413fb76c2be081e1ec9
---
 qcom/sa8195-vm.dtsi | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/qcom/sa8195-vm.dtsi b/qcom/sa8195-vm.dtsi
index 55f0f5e93385..fde9e1516c03 100644
--- a/qcom/sa8195-vm.dtsi
+++ b/qcom/sa8195-vm.dtsi
@@ -325,6 +325,25 @@
 		};
 	};
 
+	qtee_shmbridge {
+		compatible = "qcom,tee-shared-memory-bridge";
+		/*Boolean property to disable shmbridge*/
+		qcom,disable-shmbridge-support;
+	};
+
+	qcom_qseecom: qseecom@87a00000 {
+		compatible = "qcom,qseecom";
+		reg = <0x87a00000 0x2100000>;
+		reg-names = "secapp-region";
+		memory-region = <&qseecom_mem>;
+		qcom,hlos-num-ce-hw-instances = <1>;
+		qcom,hlos-ce-hw-instance = <0>;
+		qcom,qsee-ce-hw-instance = <0>;
+		qcom,disk-encrypt-pipe-pair = <2>;
+		qcom,no-clock-support;
+		qcom,qsee-reentrancy-support = <2>;
+	};
+
 	pdc: interrupt-controller@b220000 {
 		compatible = "qcom,sm8150-pdc";
 		reg = <0xb220000 0x30000>;
@@ -492,6 +511,12 @@
 	};
 };
 
+&firmware {
+	scm {
+		compatible = "qcom,scm";
+	};
+};
+
 #include "sdmshrike-pinctrl.dtsi"
 #include "sm8150-slpi-pinctrl.dtsi"
 #include "sa8195-vm-usb.dtsi"