mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-31 04:01:48 -04:00
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (32 commits) sh: intc: switch irq_desc iteration to new active IRQ iterator. sh: fix up cpu hotplug IRQ migration for irq_data changes. sh: oprofile: Make sure the backtrace op is available for timer-fallback. sh64: oprofile: Fix up kernel stack pointer size mismatch. sh: oprofile: Fix up and extend op_name_from_perf_id(). sh: lockless get_user_pages_fast() sh64: _PAGE_SPECIAL support. sound: sh: ctrl_in/outX to __raw_read/writeX conversion. sh: disable deprecated genirq support. sh: update show_interrupts() for irq_data chip lookup. sh: intc: irq_data conversion. sh64: irq_data conversion. sh64: update for IRQ flag handling naming changes. rtc: rtc-rs5c313: ctrl_in/outX to __raw_read/writeX conversion. sh: mach-se: irq_data conversion. input: hp680_ts_input: ctrl_in/outX to __raw_read/writeX conversion. input: jornada680_kbd: ctrl_in/outX to __raw_read/writeX conversion. sh: hd64461: irq_data conversion. sh: mach-x3proto: irq_data conversion. sh: mach-systemh: irq_data conversion. ...
This commit is contained in:
Linus Torvalds
commit
3c37629578
43 changed files with 646 additions and 463 deletions
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@ -25,8 +25,11 @@ config SUPERH
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select HAVE_KERNEL_LZO
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select HAVE_SYSCALL_TRACEPOINTS
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select HAVE_REGS_AND_STACK_ACCESS_API
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select HAVE_GENERIC_HARDIRQS
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select HAVE_SPARSE_IRQ
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select RTC_LIB
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select GENERIC_ATOMIC64
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select GENERIC_HARDIRQS_NO_DEPRECATED
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help
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The SuperH is a RISC processor targeted for use in embedded systems
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and consumer electronics; it was also used in the Sega Dreamcast
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@ -49,6 +52,7 @@ config SUPERH32
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select HAVE_MIXED_BREAKPOINTS_REGS
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select PERF_EVENTS
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select ARCH_HIBERNATION_POSSIBLE if MMU
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select SPARSE_IRQ
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config SUPERH64
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def_bool ARCH = "sh64"
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@ -78,19 +82,9 @@ config GENERIC_FIND_NEXT_BIT
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config GENERIC_HWEIGHT
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def_bool y
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config GENERIC_HARDIRQS
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def_bool y
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config GENERIC_HARDIRQS_NO__DO_IRQ
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def_bool y
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config IRQ_PER_CPU
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def_bool y
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config SPARSE_IRQ
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def_bool y
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depends on SUPERH32
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config GENERIC_GPIO
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def_bool n
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@ -55,8 +55,9 @@ static struct irqaction cayman_action_pci2 = {
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.flags = IRQF_DISABLED,
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};
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static void enable_cayman_irq(unsigned int irq)
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static void enable_cayman_irq(struct irq_data *data)
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{
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unsigned int irq = data->irq;
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unsigned long flags;
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unsigned long mask;
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unsigned int reg;
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@ -72,8 +73,9 @@ static void enable_cayman_irq(unsigned int irq)
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local_irq_restore(flags);
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}
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void disable_cayman_irq(unsigned int irq)
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static void disable_cayman_irq(struct irq_data *data)
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{
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unsigned int irq = data->irq;
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unsigned long flags;
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unsigned long mask;
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unsigned int reg;
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@ -89,16 +91,10 @@ void disable_cayman_irq(unsigned int irq)
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local_irq_restore(flags);
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}
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static void ack_cayman_irq(unsigned int irq)
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{
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disable_cayman_irq(irq);
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}
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struct irq_chip cayman_irq_type = {
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.name = "Cayman-IRQ",
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.unmask = enable_cayman_irq,
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.mask = disable_cayman_irq,
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.mask_ack = ack_cayman_irq,
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.irq_unmask = enable_cayman_irq,
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.irq_mask = disable_cayman_irq,
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};
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int cayman_irq_demux(int evt)
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@ -60,8 +60,9 @@
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*/
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/* Disable the hardware event by masking its bit in its EMR */
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static inline void disable_systemasic_irq(unsigned int irq)
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static inline void disable_systemasic_irq(struct irq_data *data)
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{
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unsigned int irq = data->irq;
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__u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
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__u32 mask;
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@ -71,8 +72,9 @@ static inline void disable_systemasic_irq(unsigned int irq)
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}
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/* Enable the hardware event by setting its bit in its EMR */
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static inline void enable_systemasic_irq(unsigned int irq)
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static inline void enable_systemasic_irq(struct irq_data *data)
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{
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unsigned int irq = data->irq;
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__u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
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__u32 mask;
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@ -82,18 +84,19 @@ static inline void enable_systemasic_irq(unsigned int irq)
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}
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/* Acknowledge a hardware event by writing its bit back to its ESR */
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static void mask_ack_systemasic_irq(unsigned int irq)
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static void mask_ack_systemasic_irq(struct irq_data *data)
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{
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unsigned int irq = data->irq;
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__u32 esr = ESR_BASE + (LEVEL(irq) << 2);
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disable_systemasic_irq(irq);
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disable_systemasic_irq(data);
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outl((1 << EVENT_BIT(irq)), esr);
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}
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struct irq_chip systemasic_int = {
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.name = "System ASIC",
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.mask = disable_systemasic_irq,
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.mask_ack = mask_ack_systemasic_irq,
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.unmask = enable_systemasic_irq,
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.irq_mask = disable_systemasic_irq,
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.irq_mask_ack = mask_ack_systemasic_irq,
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.irq_unmask = enable_systemasic_irq,
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};
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/*
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@ -18,25 +18,24 @@
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#include <linux/io.h>
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#include <mach-landisk/mach/iodata_landisk.h>
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static void disable_landisk_irq(unsigned int irq)
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static void disable_landisk_irq(struct irq_data *data)
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{
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unsigned char mask = 0xff ^ (0x01 << (irq - 5));
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unsigned char mask = 0xff ^ (0x01 << (data->irq - 5));
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__raw_writeb(__raw_readb(PA_IMASK) & mask, PA_IMASK);
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}
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static void enable_landisk_irq(unsigned int irq)
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static void enable_landisk_irq(struct irq_data *data)
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{
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unsigned char value = (0x01 << (irq - 5));
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unsigned char value = (0x01 << (data->irq - 5));
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__raw_writeb(__raw_readb(PA_IMASK) | value, PA_IMASK);
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}
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static struct irq_chip landisk_irq_chip __read_mostly = {
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.name = "LANDISK",
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.mask = disable_landisk_irq,
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.unmask = enable_landisk_irq,
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.mask_ack = disable_landisk_irq,
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.irq_mask = disable_landisk_irq,
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.irq_unmask = enable_landisk_irq,
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};
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/*
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@ -50,7 +49,7 @@ void __init init_landisk_IRQ(void)
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disable_irq_nosync(i);
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set_irq_chip_and_handler_name(i, &landisk_irq_chip,
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handle_level_irq, "level");
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enable_landisk_irq(i);
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enable_landisk_irq(irq_get_irq_data(i));
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}
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__raw_writeb(0x00, PA_PWRINT_CLR);
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}
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@ -65,19 +65,9 @@ static const struct {
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# error Inconsistancy in defining the IRQ# for primary IDE!
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#endif
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static void enable_microdev_irq(unsigned int irq);
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static void disable_microdev_irq(unsigned int irq);
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static void mask_and_ack_microdev(unsigned int);
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static struct irq_chip microdev_irq_type = {
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.name = "MicroDev-IRQ",
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.unmask = enable_microdev_irq,
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.mask = disable_microdev_irq,
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.ack = mask_and_ack_microdev,
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};
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static void disable_microdev_irq(unsigned int irq)
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static void disable_microdev_irq(struct irq_data *data)
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{
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unsigned int irq = data->irq;
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unsigned int fpgaIrq;
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if (irq >= NUM_EXTERNAL_IRQS)
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@ -91,8 +81,9 @@ static void disable_microdev_irq(unsigned int irq)
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__raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
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}
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static void enable_microdev_irq(unsigned int irq)
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static void enable_microdev_irq(struct irq_data *data)
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{
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unsigned int irq = data->irq;
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unsigned long priorityReg, priorities, pri;
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unsigned int fpgaIrq;
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@ -116,17 +107,18 @@ static void enable_microdev_irq(unsigned int irq)
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__raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
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}
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static struct irq_chip microdev_irq_type = {
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.name = "MicroDev-IRQ",
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.irq_unmask = enable_microdev_irq,
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.irq_mask = disable_microdev_irq,
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};
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/* This function sets the desired irq handler to be a MicroDev type */
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static void __init make_microdev_irq(unsigned int irq)
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{
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disable_irq_nosync(irq);
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set_irq_chip_and_handler(irq, µdev_irq_type, handle_level_irq);
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disable_microdev_irq(irq);
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}
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static void mask_and_ack_microdev(unsigned int irq)
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{
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disable_microdev_irq(irq);
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disable_microdev_irq(irq_get_irq_data(irq));
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}
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extern void __init init_microdev_irq(void)
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@ -25,8 +25,9 @@
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#define INTC_IPR01 0xfffe0818
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#define INTC_ICR1 0xfffe0802
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static void disable_se7206_irq(unsigned int irq)
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static void disable_se7206_irq(struct irq_data *data)
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{
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unsigned int irq = data->irq;
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unsigned short val;
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unsigned short mask = 0xffff ^ (0x0f << 4 * (3 - (IRQ0_IRQ - irq)));
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unsigned short msk0,msk1;
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@ -55,8 +56,9 @@ static void disable_se7206_irq(unsigned int irq)
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__raw_writew(msk1, INTMSK1);
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}
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static void enable_se7206_irq(unsigned int irq)
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static void enable_se7206_irq(struct irq_data *data)
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{
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unsigned int irq = data->irq;
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unsigned short val;
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unsigned short value = (0x0001 << 4 * (3 - (IRQ0_IRQ - irq)));
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unsigned short msk0,msk1;
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@ -86,13 +88,14 @@ static void enable_se7206_irq(unsigned int irq)
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__raw_writew(msk1, INTMSK1);
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}
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static void eoi_se7206_irq(unsigned int irq)
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static void eoi_se7206_irq(struct irq_data *data)
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{
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unsigned short sts0,sts1;
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unsigned int irq = data->irq;
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struct irq_desc *desc = irq_to_desc(irq);
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if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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enable_se7206_irq(irq);
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enable_se7206_irq(data);
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/* FPGA isr clear */
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sts0 = __raw_readw(INTSTS0);
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sts1 = __raw_readw(INTSTS1);
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@ -115,10 +118,9 @@ static void eoi_se7206_irq(unsigned int irq)
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static struct irq_chip se7206_irq_chip __read_mostly = {
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.name = "SE7206-FPGA",
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.mask = disable_se7206_irq,
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.unmask = enable_se7206_irq,
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.mask_ack = disable_se7206_irq,
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.eoi = eoi_se7206_irq,
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.irq_mask = disable_se7206_irq,
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.irq_unmask = enable_se7206_irq,
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.irq_eoi = eoi_se7206_irq,
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};
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|
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static void make_se7206_irq(unsigned int irq)
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@ -126,7 +128,7 @@ static void make_se7206_irq(unsigned int irq)
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disable_irq_nosync(irq);
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set_irq_chip_and_handler_name(irq, &se7206_irq_chip,
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handle_level_irq, "level");
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disable_se7206_irq(irq);
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disable_se7206_irq(irq_get_irq_data(irq));
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}
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/*
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|
|
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@ -18,23 +18,22 @@
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|
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unsigned int se7343_fpga_irq[SE7343_FPGA_IRQ_NR] = { 0, };
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static void disable_se7343_irq(unsigned int irq)
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static void disable_se7343_irq(struct irq_data *data)
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{
|
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unsigned int bit = (unsigned int)get_irq_chip_data(irq);
|
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unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
|
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__raw_writew(__raw_readw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK);
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}
|
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|
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static void enable_se7343_irq(unsigned int irq)
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static void enable_se7343_irq(struct irq_data *data)
|
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{
|
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unsigned int bit = (unsigned int)get_irq_chip_data(irq);
|
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unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
|
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__raw_writew(__raw_readw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK);
|
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}
|
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|
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static struct irq_chip se7343_irq_chip __read_mostly = {
|
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.name = "SE7343-FPGA",
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.mask = disable_se7343_irq,
|
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.unmask = enable_se7343_irq,
|
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.mask_ack = disable_se7343_irq,
|
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.name = "SE7343-FPGA",
|
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.irq_mask = disable_se7343_irq,
|
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.irq_unmask = enable_se7343_irq,
|
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};
|
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|
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static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
|
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|
|
|
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|
|
@ -18,23 +18,22 @@
|
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|
||||
unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, };
|
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|
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static void disable_se7722_irq(unsigned int irq)
|
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static void disable_se7722_irq(struct irq_data *data)
|
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{
|
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unsigned int bit = (unsigned int)get_irq_chip_data(irq);
|
||||
unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
|
||||
__raw_writew(__raw_readw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
|
||||
}
|
||||
|
||||
static void enable_se7722_irq(unsigned int irq)
|
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static void enable_se7722_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int bit = (unsigned int)get_irq_chip_data(irq);
|
||||
unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
|
||||
__raw_writew(__raw_readw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
|
||||
}
|
||||
|
||||
static struct irq_chip se7722_irq_chip __read_mostly = {
|
||||
.name = "SE7722-FPGA",
|
||||
.mask = disable_se7722_irq,
|
||||
.unmask = enable_se7722_irq,
|
||||
.mask_ack = disable_se7722_irq,
|
||||
.name = "SE7722-FPGA",
|
||||
.irq_mask = disable_se7722_irq,
|
||||
.irq_unmask = enable_se7722_irq,
|
||||
};
|
||||
|
||||
static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
|
||||
|
|
|
|||
|
|
@ -68,25 +68,26 @@ static struct fpga_irq get_fpga_irq(unsigned int irq)
|
|||
return set;
|
||||
}
|
||||
|
||||
static void disable_se7724_irq(unsigned int irq)
|
||||
static void disable_se7724_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int irq = data->irq;
|
||||
struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
|
||||
unsigned int bit = irq - set.base;
|
||||
__raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr);
|
||||
}
|
||||
|
||||
static void enable_se7724_irq(unsigned int irq)
|
||||
static void enable_se7724_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int irq = data->irq;
|
||||
struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
|
||||
unsigned int bit = irq - set.base;
|
||||
__raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr);
|
||||
}
|
||||
|
||||
static struct irq_chip se7724_irq_chip __read_mostly = {
|
||||
.name = "SE7724-FPGA",
|
||||
.mask = disable_se7724_irq,
|
||||
.unmask = enable_se7724_irq,
|
||||
.mask_ack = disable_se7724_irq,
|
||||
.name = "SE7724-FPGA",
|
||||
.irq_mask = disable_se7724_irq,
|
||||
.irq_unmask = enable_se7724_irq,
|
||||
};
|
||||
|
||||
static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
|
||||
|
|
|
|||
|
|
@ -23,54 +23,39 @@
|
|||
static unsigned long *systemh_irq_mask_register = (unsigned long *)0xB3F10004;
|
||||
static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000;
|
||||
|
||||
/* forward declaration */
|
||||
static void enable_systemh_irq(unsigned int irq);
|
||||
static void disable_systemh_irq(unsigned int irq);
|
||||
static void mask_and_ack_systemh(unsigned int);
|
||||
static void disable_systemh_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned long val, mask = 0x01 << 1;
|
||||
|
||||
/* Clear the "irq"th bit in the mask and set it in the request */
|
||||
val = __raw_readl((unsigned long)systemh_irq_mask_register);
|
||||
val &= ~mask;
|
||||
__raw_writel(val, (unsigned long)systemh_irq_mask_register);
|
||||
|
||||
val = __raw_readl((unsigned long)systemh_irq_request_register);
|
||||
val |= mask;
|
||||
__raw_writel(val, (unsigned long)systemh_irq_request_register);
|
||||
}
|
||||
|
||||
static void enable_systemh_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned long val, mask = 0x01 << 1;
|
||||
|
||||
/* Set "irq"th bit in the mask register */
|
||||
val = __raw_readl((unsigned long)systemh_irq_mask_register);
|
||||
val |= mask;
|
||||
__raw_writel(val, (unsigned long)systemh_irq_mask_register);
|
||||
}
|
||||
|
||||
static struct irq_chip systemh_irq_type = {
|
||||
.name = " SystemH Register",
|
||||
.unmask = enable_systemh_irq,
|
||||
.mask = disable_systemh_irq,
|
||||
.ack = mask_and_ack_systemh,
|
||||
.name = "SystemH Register",
|
||||
.irq_unmask = enable_systemh_irq,
|
||||
.irq_mask = disable_systemh_irq,
|
||||
};
|
||||
|
||||
static void disable_systemh_irq(unsigned int irq)
|
||||
{
|
||||
if (systemh_irq_mask_register) {
|
||||
unsigned long val, mask = 0x01 << 1;
|
||||
|
||||
/* Clear the "irq"th bit in the mask and set it in the request */
|
||||
val = __raw_readl((unsigned long)systemh_irq_mask_register);
|
||||
val &= ~mask;
|
||||
__raw_writel(val, (unsigned long)systemh_irq_mask_register);
|
||||
|
||||
val = __raw_readl((unsigned long)systemh_irq_request_register);
|
||||
val |= mask;
|
||||
__raw_writel(val, (unsigned long)systemh_irq_request_register);
|
||||
}
|
||||
}
|
||||
|
||||
static void enable_systemh_irq(unsigned int irq)
|
||||
{
|
||||
if (systemh_irq_mask_register) {
|
||||
unsigned long val, mask = 0x01 << 1;
|
||||
|
||||
/* Set "irq"th bit in the mask register */
|
||||
val = __raw_readl((unsigned long)systemh_irq_mask_register);
|
||||
val |= mask;
|
||||
__raw_writel(val, (unsigned long)systemh_irq_mask_register);
|
||||
}
|
||||
}
|
||||
|
||||
static void mask_and_ack_systemh(unsigned int irq)
|
||||
{
|
||||
disable_systemh_irq(irq);
|
||||
}
|
||||
|
||||
void make_systemh_irq(unsigned int irq)
|
||||
{
|
||||
disable_irq_nosync(irq);
|
||||
set_irq_chip_and_handler(irq, &systemh_irq_type, handle_level_irq);
|
||||
disable_systemh_irq(irq);
|
||||
disable_systemh_irq(irq_get_irq_data(irq));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -54,18 +54,19 @@ static int x3proto_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
|
|||
|
||||
static void x3proto_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
struct irq_chip *chip = get_irq_desc_chip(desc);
|
||||
struct irq_data *data = irq_get_irq_data(irq);
|
||||
struct irq_chip *chip = irq_data_get_irq_chip(data);
|
||||
unsigned long mask;
|
||||
int pin;
|
||||
|
||||
chip->mask_ack(irq);
|
||||
chip->irq_mask_ack(data);
|
||||
|
||||
mask = __raw_readw(KEYDETR);
|
||||
|
||||
for_each_set_bit(pin, &mask, NR_BASEBOARD_GPIOS)
|
||||
generic_handle_irq(x3proto_gpio_to_irq(NULL, pin));
|
||||
|
||||
chip->unmask(irq);
|
||||
chip->irq_unmask(data);
|
||||
}
|
||||
|
||||
struct gpio_chip x3proto_gpio_chip = {
|
||||
|
|
|
|||
|
|
@ -17,8 +17,9 @@
|
|||
/* This belongs in cpu specific */
|
||||
#define INTC_ICR1 0xA4140010UL
|
||||
|
||||
static void hd64461_mask_irq(unsigned int irq)
|
||||
static void hd64461_mask_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int irq = data->irq;
|
||||
unsigned short nimr;
|
||||
unsigned short mask = 1 << (irq - HD64461_IRQBASE);
|
||||
|
||||
|
|
@ -27,8 +28,9 @@ static void hd64461_mask_irq(unsigned int irq)
|
|||
__raw_writew(nimr, HD64461_NIMR);
|
||||
}
|
||||
|
||||
static void hd64461_unmask_irq(unsigned int irq)
|
||||
static void hd64461_unmask_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int irq = data->irq;
|
||||
unsigned short nimr;
|
||||
unsigned short mask = 1 << (irq - HD64461_IRQBASE);
|
||||
|
||||
|
|
@ -37,20 +39,21 @@ static void hd64461_unmask_irq(unsigned int irq)
|
|||
__raw_writew(nimr, HD64461_NIMR);
|
||||
}
|
||||
|
||||
static void hd64461_mask_and_ack_irq(unsigned int irq)
|
||||
static void hd64461_mask_and_ack_irq(struct irq_data *data)
|
||||
{
|
||||
hd64461_mask_irq(irq);
|
||||
hd64461_mask_irq(data);
|
||||
|
||||
#ifdef CONFIG_HD64461_ENABLER
|
||||
if (irq == HD64461_IRQBASE + 13)
|
||||
if (data->irq == HD64461_IRQBASE + 13)
|
||||
__raw_writeb(0x00, HD64461_PCC1CSCR);
|
||||
#endif
|
||||
}
|
||||
|
||||
static struct irq_chip hd64461_irq_chip = {
|
||||
.name = "HD64461-IRQ",
|
||||
.mask = hd64461_mask_irq,
|
||||
.mask_ack = hd64461_mask_and_ack_irq,
|
||||
.unmask = hd64461_unmask_irq,
|
||||
.irq_mask = hd64461_mask_irq,
|
||||
.irq_mask_ack = hd64461_mask_and_ack_irq,
|
||||
.irq_unmask = hd64461_unmask_irq,
|
||||
};
|
||||
|
||||
static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc)
|
||||
|
|
|
|||
|
|
@ -169,6 +169,8 @@ extern void page_table_range_init(unsigned long start, unsigned long end,
|
|||
#define HAVE_ARCH_UNMAPPED_AREA
|
||||
#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
|
||||
|
||||
#define __HAVE_ARCH_PTE_SPECIAL
|
||||
|
||||
#include <asm-generic/pgtable.h>
|
||||
|
||||
#endif /* __ASM_SH_PGTABLE_H */
|
||||
|
|
|
|||
|
|
@ -378,8 +378,6 @@ PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED);
|
|||
PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED);
|
||||
PTE_BIT_FUNC(low, mkspecial, |= _PAGE_SPECIAL);
|
||||
|
||||
#define __HAVE_ARCH_PTE_SPECIAL
|
||||
|
||||
/*
|
||||
* Macro and implementation to make a page protection as uncachable.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -130,6 +130,7 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
|
|||
* anything above the PPN field.
|
||||
*/
|
||||
#define _PAGE_WIRED _PAGE_EXT(0x001) /* software: wire the tlb entry */
|
||||
#define _PAGE_SPECIAL _PAGE_EXT(0x002)
|
||||
|
||||
#define _PAGE_CLEAR_FLAGS (_PAGE_PRESENT | _PAGE_FILE | _PAGE_SHARED | \
|
||||
_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_WIRED)
|
||||
|
|
@ -173,7 +174,8 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
|
|||
/* Default flags for a User page */
|
||||
#define _PAGE_TABLE (_KERNPG_TABLE | _PAGE_USER)
|
||||
|
||||
#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
|
||||
#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \
|
||||
_PAGE_SPECIAL)
|
||||
|
||||
/*
|
||||
* We have full permissions (Read/Write/Execute/Shared).
|
||||
|
|
@ -263,7 +265,7 @@ static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
|
|||
static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
|
||||
static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
|
||||
static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
|
||||
static inline int pte_special(pte_t pte){ return 0; }
|
||||
static inline int pte_special(pte_t pte){ return pte_val(pte) & _PAGE_SPECIAL; }
|
||||
|
||||
static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_WRITE)); return pte; }
|
||||
static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
|
||||
|
|
@ -272,8 +274,7 @@ static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) |
|
|||
static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
|
||||
static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
|
||||
static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; }
|
||||
static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
|
||||
|
||||
static inline pte_t pte_mkspecial(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SPECIAL)); return pte; }
|
||||
|
||||
/*
|
||||
* Conversion functions: convert a page and protection to a page entry.
|
||||
|
|
|
|||
|
|
@ -89,6 +89,7 @@ struct sh_cpuinfo {
|
|||
struct task_struct *idle;
|
||||
#endif
|
||||
|
||||
unsigned int phys_bits;
|
||||
unsigned long flags;
|
||||
} __attribute__ ((aligned(L1_CACHE_BYTES)));
|
||||
|
||||
|
|
|
|||
|
|
@ -340,6 +340,8 @@ asmlinkage void __cpuinit cpu_init(void)
|
|||
*/
|
||||
current_cpu_data.asid_cache = NO_CONTEXT;
|
||||
|
||||
current_cpu_data.phys_bits = __in_29bit_mode() ? 29 : 32;
|
||||
|
||||
speculative_execution_init();
|
||||
expmask_init();
|
||||
|
||||
|
|
|
|||
|
|
@ -51,16 +51,20 @@ static inline void set_interrupt_registers(int ip)
|
|||
: "t");
|
||||
}
|
||||
|
||||
static void mask_imask_irq(unsigned int irq)
|
||||
static void mask_imask_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int irq = data->irq;
|
||||
|
||||
clear_bit(irq, imask_mask);
|
||||
if (interrupt_priority < IMASK_PRIORITY - irq)
|
||||
interrupt_priority = IMASK_PRIORITY - irq;
|
||||
set_interrupt_registers(interrupt_priority);
|
||||
}
|
||||
|
||||
static void unmask_imask_irq(unsigned int irq)
|
||||
static void unmask_imask_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int irq = data->irq;
|
||||
|
||||
set_bit(irq, imask_mask);
|
||||
interrupt_priority = IMASK_PRIORITY -
|
||||
find_first_zero_bit(imask_mask, IMASK_PRIORITY);
|
||||
|
|
@ -69,9 +73,9 @@ static void unmask_imask_irq(unsigned int irq)
|
|||
|
||||
static struct irq_chip imask_irq_chip = {
|
||||
.name = "SR.IMASK",
|
||||
.mask = mask_imask_irq,
|
||||
.unmask = unmask_imask_irq,
|
||||
.mask_ack = mask_imask_irq,
|
||||
.irq_mask = mask_imask_irq,
|
||||
.irq_unmask = unmask_imask_irq,
|
||||
.irq_mask_ack = mask_imask_irq,
|
||||
};
|
||||
|
||||
void make_imask_irq(unsigned int irq)
|
||||
|
|
|
|||
|
|
@ -76,39 +76,11 @@ int intc_evt_to_irq[(0xE20/0x20)+1] = {
|
|||
};
|
||||
|
||||
static unsigned long intc_virt;
|
||||
|
||||
static unsigned int startup_intc_irq(unsigned int irq);
|
||||
static void shutdown_intc_irq(unsigned int irq);
|
||||
static void enable_intc_irq(unsigned int irq);
|
||||
static void disable_intc_irq(unsigned int irq);
|
||||
static void mask_and_ack_intc(unsigned int);
|
||||
static void end_intc_irq(unsigned int irq);
|
||||
|
||||
static struct irq_chip intc_irq_type = {
|
||||
.name = "INTC",
|
||||
.startup = startup_intc_irq,
|
||||
.shutdown = shutdown_intc_irq,
|
||||
.enable = enable_intc_irq,
|
||||
.disable = disable_intc_irq,
|
||||
.ack = mask_and_ack_intc,
|
||||
.end = end_intc_irq
|
||||
};
|
||||
|
||||
static int irlm; /* IRL mode */
|
||||
|
||||
static unsigned int startup_intc_irq(unsigned int irq)
|
||||
{
|
||||
enable_intc_irq(irq);
|
||||
return 0; /* never anything pending */
|
||||
}
|
||||
|
||||
static void shutdown_intc_irq(unsigned int irq)
|
||||
{
|
||||
disable_intc_irq(irq);
|
||||
}
|
||||
|
||||
static void enable_intc_irq(unsigned int irq)
|
||||
static void enable_intc_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int irq = data->irq;
|
||||
unsigned long reg;
|
||||
unsigned long bitmask;
|
||||
|
||||
|
|
@ -126,8 +98,9 @@ static void enable_intc_irq(unsigned int irq)
|
|||
__raw_writel(bitmask, reg);
|
||||
}
|
||||
|
||||
static void disable_intc_irq(unsigned int irq)
|
||||
static void disable_intc_irq(struct irq_data *data)
|
||||
{
|
||||
unsigned int irq = data->irq;
|
||||
unsigned long reg;
|
||||
unsigned long bitmask;
|
||||
|
||||
|
|
@ -142,15 +115,11 @@ static void disable_intc_irq(unsigned int irq)
|
|||
__raw_writel(bitmask, reg);
|
||||
}
|
||||
|
||||
static void mask_and_ack_intc(unsigned int irq)
|
||||
{
|
||||
disable_intc_irq(irq);
|
||||
}
|
||||
|
||||
static void end_intc_irq(unsigned int irq)
|
||||
{
|
||||
enable_intc_irq(irq);
|
||||
}
|
||||
static struct irq_chip intc_irq_type = {
|
||||
.name = "INTC",
|
||||
.irq_enable = enable_intc_irq,
|
||||
.irq_disable = disable_intc_irq,
|
||||
};
|
||||
|
||||
void __init plat_irq_setup(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -24,25 +24,25 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/topology.h>
|
||||
|
||||
static inline struct ipr_desc *get_ipr_desc(unsigned int irq)
|
||||
static inline struct ipr_desc *get_ipr_desc(struct irq_data *data)
|
||||
{
|
||||
struct irq_chip *chip = get_irq_chip(irq);
|
||||
struct irq_chip *chip = irq_data_get_irq_chip(data);
|
||||
return container_of(chip, struct ipr_desc, chip);
|
||||
}
|
||||
|
||||
static void disable_ipr_irq(unsigned int irq)
|
||||
static void disable_ipr_irq(struct irq_data *data)
|
||||
{
|
||||
struct ipr_data *p = get_irq_chip_data(irq);
|
||||
unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
|
||||
struct ipr_data *p = irq_data_get_irq_chip_data(data);
|
||||
unsigned long addr = get_ipr_desc(data)->ipr_offsets[p->ipr_idx];
|
||||
/* Set the priority in IPR to 0 */
|
||||
__raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr);
|
||||
(void)__raw_readw(addr); /* Read back to flush write posting */
|
||||
}
|
||||
|
||||
static void enable_ipr_irq(unsigned int irq)
|
||||
static void enable_ipr_irq(struct irq_data *data)
|
||||
{
|
||||
struct ipr_data *p = get_irq_chip_data(irq);
|
||||
unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
|
||||
struct ipr_data *p = irq_data_get_irq_chip_data(data);
|
||||
unsigned long addr = get_ipr_desc(data)->ipr_offsets[p->ipr_idx];
|
||||
/* Set priority in IPR back to original value */
|
||||
__raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr);
|
||||
}
|
||||
|
|
@ -56,19 +56,18 @@ void register_ipr_controller(struct ipr_desc *desc)
|
|||
{
|
||||
int i;
|
||||
|
||||
desc->chip.mask = disable_ipr_irq;
|
||||
desc->chip.unmask = enable_ipr_irq;
|
||||
desc->chip.mask_ack = disable_ipr_irq;
|
||||
desc->chip.irq_mask = disable_ipr_irq;
|
||||
desc->chip.irq_unmask = enable_ipr_irq;
|
||||
|
||||
for (i = 0; i < desc->nr_irqs; i++) {
|
||||
struct ipr_data *p = desc->ipr_data + i;
|
||||
struct irq_desc *irq_desc;
|
||||
int res;
|
||||
|
||||
BUG_ON(p->ipr_idx >= desc->nr_offsets);
|
||||
BUG_ON(!desc->ipr_offsets[p->ipr_idx]);
|
||||
|
||||
irq_desc = irq_to_desc_alloc_node(p->irq, numa_node_id());
|
||||
if (unlikely(!irq_desc)) {
|
||||
res = irq_alloc_desc_at(p->irq, numa_node_id());
|
||||
if (unlikely(res != p->irq && res != -EEXIST)) {
|
||||
printk(KERN_INFO "can not get irq_desc for %d\n",
|
||||
p->irq);
|
||||
continue;
|
||||
|
|
@ -78,7 +77,7 @@ void register_ipr_controller(struct ipr_desc *desc)
|
|||
set_irq_chip_and_handler_name(p->irq, &desc->chip,
|
||||
handle_level_irq, "level");
|
||||
set_irq_chip_data(p->irq, p);
|
||||
disable_ipr_irq(p->irq);
|
||||
disable_ipr_irq(irq_get_irq_data(p->irq));
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(register_ipr_controller);
|
||||
|
|
|
|||
|
|
@ -225,7 +225,7 @@ static void sh7750_pmu_enable_all(void)
|
|||
}
|
||||
|
||||
static struct sh_pmu sh7750_pmu = {
|
||||
.name = "SH7750",
|
||||
.name = "sh7750",
|
||||
.num_events = 2,
|
||||
.event_map = sh7750_event_map,
|
||||
.max_events = ARRAY_SIZE(sh7750_general_events),
|
||||
|
|
|
|||
|
|
@ -259,7 +259,7 @@ static void sh4a_pmu_enable_all(void)
|
|||
}
|
||||
|
||||
static struct sh_pmu sh4a_pmu = {
|
||||
.name = "SH-4A",
|
||||
.name = "sh4a",
|
||||
.num_events = 2,
|
||||
.event_map = sh4a_event_map,
|
||||
.max_events = ARRAY_SIZE(sh4a_general_events),
|
||||
|
|
|
|||
|
|
@ -56,6 +56,8 @@ int show_interrupts(struct seq_file *p, void *v)
|
|||
int i = *(loff_t *)v, j, prec;
|
||||
struct irqaction *action;
|
||||
struct irq_desc *desc;
|
||||
struct irq_data *data;
|
||||
struct irq_chip *chip;
|
||||
|
||||
if (i > nr_irqs)
|
||||
return 0;
|
||||
|
|
@ -77,6 +79,9 @@ int show_interrupts(struct seq_file *p, void *v)
|
|||
if (!desc)
|
||||
return 0;
|
||||
|
||||
data = irq_get_irq_data(i);
|
||||
chip = irq_data_get_irq_chip(data);
|
||||
|
||||
raw_spin_lock_irqsave(&desc->lock, flags);
|
||||
for_each_online_cpu(j)
|
||||
any_count |= kstat_irqs_cpu(i, j);
|
||||
|
|
@ -87,7 +92,7 @@ int show_interrupts(struct seq_file *p, void *v)
|
|||
seq_printf(p, "%*d: ", prec, i);
|
||||
for_each_online_cpu(j)
|
||||
seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
|
||||
seq_printf(p, " %14s", desc->chip->name);
|
||||
seq_printf(p, " %14s", chip->name);
|
||||
seq_printf(p, "-%-8s", desc->name);
|
||||
|
||||
if (action) {
|
||||
|
|
@ -273,12 +278,6 @@ void __init init_IRQ(void)
|
|||
{
|
||||
plat_irq_setup();
|
||||
|
||||
/*
|
||||
* Pin any of the legacy IRQ vectors that haven't already been
|
||||
* grabbed by the platform
|
||||
*/
|
||||
reserve_irq_legacy();
|
||||
|
||||
/* Perform the machine specific initialisation */
|
||||
if (sh_mv.mv_init_irq)
|
||||
sh_mv.mv_init_irq();
|
||||
|
|
@ -297,13 +296,16 @@ int __init arch_probe_nr_irqs(void)
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
|
||||
static void route_irq(struct irq_data *data, unsigned int irq, unsigned int cpu)
|
||||
{
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
struct irq_chip *chip = irq_data_get_irq_chip(data);
|
||||
|
||||
printk(KERN_INFO "IRQ%u: moving from cpu%u to cpu%u\n",
|
||||
irq, desc->node, cpu);
|
||||
irq, data->node, cpu);
|
||||
|
||||
raw_spin_lock_irq(&desc->lock);
|
||||
desc->chip->set_affinity(irq, cpumask_of(cpu));
|
||||
chip->irq_set_affinity(data, cpumask_of(cpu), false);
|
||||
raw_spin_unlock_irq(&desc->lock);
|
||||
}
|
||||
|
||||
|
|
@ -314,24 +316,25 @@ static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
|
|||
*/
|
||||
void migrate_irqs(void)
|
||||
{
|
||||
struct irq_desc *desc;
|
||||
unsigned int irq, cpu = smp_processor_id();
|
||||
|
||||
for_each_irq_desc(irq, desc) {
|
||||
if (desc->node == cpu) {
|
||||
unsigned int newcpu = cpumask_any_and(desc->affinity,
|
||||
for_each_active_irq(irq) {
|
||||
struct irq_data *data = irq_get_irq_data(irq);
|
||||
|
||||
if (data->node == cpu) {
|
||||
unsigned int newcpu = cpumask_any_and(data->affinity,
|
||||
cpu_online_mask);
|
||||
if (newcpu >= nr_cpu_ids) {
|
||||
if (printk_ratelimit())
|
||||
printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n",
|
||||
irq, cpu);
|
||||
|
||||
cpumask_setall(desc->affinity);
|
||||
newcpu = cpumask_any_and(desc->affinity,
|
||||
cpumask_setall(data->affinity);
|
||||
newcpu = cpumask_any_and(data->affinity,
|
||||
cpu_online_mask);
|
||||
}
|
||||
|
||||
route_irq(desc, irq, newcpu);
|
||||
route_irq(data, irq, newcpu);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -11,17 +11,17 @@
|
|||
#include <linux/module.h>
|
||||
#include <cpu/registers.h>
|
||||
|
||||
void notrace raw_local_irq_restore(unsigned long flags)
|
||||
void notrace arch_local_irq_restore(unsigned long flags)
|
||||
{
|
||||
unsigned long long __dummy;
|
||||
|
||||
if (flags == RAW_IRQ_DISABLED) {
|
||||
if (flags == ARCH_IRQ_DISABLED) {
|
||||
__asm__ __volatile__ (
|
||||
"getcon " __SR ", %0\n\t"
|
||||
"or %0, %1, %0\n\t"
|
||||
"putcon %0, " __SR "\n\t"
|
||||
: "=&r" (__dummy)
|
||||
: "r" (RAW_IRQ_DISABLED)
|
||||
: "r" (ARCH_IRQ_DISABLED)
|
||||
);
|
||||
} else {
|
||||
__asm__ __volatile__ (
|
||||
|
|
@ -29,13 +29,13 @@ void notrace raw_local_irq_restore(unsigned long flags)
|
|||
"and %0, %1, %0\n\t"
|
||||
"putcon %0, " __SR "\n\t"
|
||||
: "=&r" (__dummy)
|
||||
: "r" (~RAW_IRQ_DISABLED)
|
||||
: "r" (~ARCH_IRQ_DISABLED)
|
||||
);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(raw_local_irq_restore);
|
||||
EXPORT_SYMBOL(arch_local_irq_restore);
|
||||
|
||||
unsigned long notrace __raw_local_save_flags(void)
|
||||
unsigned long notrace arch_local_save_flags(void)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
|
|
@ -43,9 +43,9 @@ unsigned long notrace __raw_local_save_flags(void)
|
|||
"getcon " __SR ", %0\n\t"
|
||||
"and %0, %1, %0"
|
||||
: "=&r" (flags)
|
||||
: "r" (RAW_IRQ_DISABLED)
|
||||
: "r" (ARCH_IRQ_DISABLED)
|
||||
);
|
||||
|
||||
return flags;
|
||||
}
|
||||
EXPORT_SYMBOL(__raw_local_save_flags);
|
||||
EXPORT_SYMBOL(arch_local_save_flags);
|
||||
|
|
|
|||
|
|
@ -41,6 +41,7 @@
|
|||
#include <asm/smp.h>
|
||||
#include <asm/mmu_context.h>
|
||||
#include <asm/mmzone.h>
|
||||
#include <asm/sparsemem.h>
|
||||
|
||||
/*
|
||||
* Initialize loops_per_jiffy as 10000000 (1000MIPS).
|
||||
|
|
@ -52,6 +53,7 @@ struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = {
|
|||
.type = CPU_SH_NONE,
|
||||
.family = CPU_FAMILY_UNKNOWN,
|
||||
.loops_per_jiffy = 10000000,
|
||||
.phys_bits = MAX_PHYSMEM_BITS,
|
||||
},
|
||||
};
|
||||
EXPORT_SYMBOL(cpu_data);
|
||||
|
|
@ -432,6 +434,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
|
|||
if (c->flags & CPU_HAS_L2_CACHE)
|
||||
show_cacheinfo(m, "scache", c->scache);
|
||||
|
||||
seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits);
|
||||
|
||||
seq_printf(m, "bogomips\t: %lu.%02lu\n",
|
||||
c->loops_per_jiffy/(500000/HZ),
|
||||
(c->loops_per_jiffy/(5000/HZ)) % 100);
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@ cacheops-$(CONFIG_CPU_SHX3) += cache-shx3.o
|
|||
obj-y += $(cacheops-y)
|
||||
|
||||
mmu-y := nommu.o extable_32.o
|
||||
mmu-$(CONFIG_MMU) := extable_$(BITS).o fault_$(BITS).o \
|
||||
mmu-$(CONFIG_MMU) := extable_$(BITS).o fault_$(BITS).o gup.o \
|
||||
ioremap.o kmap.o pgtable.o tlbflush_$(BITS).o
|
||||
|
||||
obj-y += $(mmu-y)
|
||||
|
|
|
|||
273
arch/sh/mm/gup.c
Normal file
273
arch/sh/mm/gup.c
Normal file
|
|
@ -0,0 +1,273 @@
|
|||
/*
|
||||
* Lockless get_user_pages_fast for SuperH
|
||||
*
|
||||
* Copyright (C) 2009 - 2010 Paul Mundt
|
||||
*
|
||||
* Cloned from the x86 and PowerPC versions, by:
|
||||
*
|
||||
* Copyright (C) 2008 Nick Piggin
|
||||
* Copyright (C) 2008 Novell Inc.
|
||||
*/
|
||||
#include <linux/sched.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/vmstat.h>
|
||||
#include <linux/highmem.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
static inline pte_t gup_get_pte(pte_t *ptep)
|
||||
{
|
||||
#ifndef CONFIG_X2TLB
|
||||
return ACCESS_ONCE(*ptep);
|
||||
#else
|
||||
/*
|
||||
* With get_user_pages_fast, we walk down the pagetables without
|
||||
* taking any locks. For this we would like to load the pointers
|
||||
* atomically, but that is not possible with 64-bit PTEs. What
|
||||
* we do have is the guarantee that a pte will only either go
|
||||
* from not present to present, or present to not present or both
|
||||
* -- it will not switch to a completely different present page
|
||||
* without a TLB flush in between; something that we are blocking
|
||||
* by holding interrupts off.
|
||||
*
|
||||
* Setting ptes from not present to present goes:
|
||||
* ptep->pte_high = h;
|
||||
* smp_wmb();
|
||||
* ptep->pte_low = l;
|
||||
*
|
||||
* And present to not present goes:
|
||||
* ptep->pte_low = 0;
|
||||
* smp_wmb();
|
||||
* ptep->pte_high = 0;
|
||||
*
|
||||
* We must ensure here that the load of pte_low sees l iff pte_high
|
||||
* sees h. We load pte_high *after* loading pte_low, which ensures we
|
||||
* don't see an older value of pte_high. *Then* we recheck pte_low,
|
||||
* which ensures that we haven't picked up a changed pte high. We might
|
||||
* have got rubbish values from pte_low and pte_high, but we are
|
||||
* guaranteed that pte_low will not have the present bit set *unless*
|
||||
* it is 'l'. And get_user_pages_fast only operates on present ptes, so
|
||||
* we're safe.
|
||||
*
|
||||
* gup_get_pte should not be used or copied outside gup.c without being
|
||||
* very careful -- it does not atomically load the pte or anything that
|
||||
* is likely to be useful for you.
|
||||
*/
|
||||
pte_t pte;
|
||||
|
||||
retry:
|
||||
pte.pte_low = ptep->pte_low;
|
||||
smp_rmb();
|
||||
pte.pte_high = ptep->pte_high;
|
||||
smp_rmb();
|
||||
if (unlikely(pte.pte_low != ptep->pte_low))
|
||||
goto retry;
|
||||
|
||||
return pte;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* The performance critical leaf functions are made noinline otherwise gcc
|
||||
* inlines everything into a single function which results in too much
|
||||
* register pressure.
|
||||
*/
|
||||
static noinline int gup_pte_range(pmd_t pmd, unsigned long addr,
|
||||
unsigned long end, int write, struct page **pages, int *nr)
|
||||
{
|
||||
u64 mask, result;
|
||||
pte_t *ptep;
|
||||
|
||||
#ifdef CONFIG_X2TLB
|
||||
result = _PAGE_PRESENT | _PAGE_EXT(_PAGE_EXT_KERN_READ | _PAGE_EXT_USER_READ);
|
||||
if (write)
|
||||
result |= _PAGE_EXT(_PAGE_EXT_KERN_WRITE | _PAGE_EXT_USER_WRITE);
|
||||
#elif defined(CONFIG_SUPERH64)
|
||||
result = _PAGE_PRESENT | _PAGE_USER | _PAGE_READ;
|
||||
if (write)
|
||||
result |= _PAGE_WRITE;
|
||||
#else
|
||||
result = _PAGE_PRESENT | _PAGE_USER;
|
||||
if (write)
|
||||
result |= _PAGE_RW;
|
||||
#endif
|
||||
|
||||
mask = result | _PAGE_SPECIAL;
|
||||
|
||||
ptep = pte_offset_map(&pmd, addr);
|
||||
do {
|
||||
pte_t pte = gup_get_pte(ptep);
|
||||
struct page *page;
|
||||
|
||||
if ((pte_val(pte) & mask) != result) {
|
||||
pte_unmap(ptep);
|
||||
return 0;
|
||||
}
|
||||
VM_BUG_ON(!pfn_valid(pte_pfn(pte)));
|
||||
page = pte_page(pte);
|
||||
get_page(page);
|
||||
pages[*nr] = page;
|
||||
(*nr)++;
|
||||
|
||||
} while (ptep++, addr += PAGE_SIZE, addr != end);
|
||||
pte_unmap(ptep - 1);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int gup_pmd_range(pud_t pud, unsigned long addr, unsigned long end,
|
||||
int write, struct page **pages, int *nr)
|
||||
{
|
||||
unsigned long next;
|
||||
pmd_t *pmdp;
|
||||
|
||||
pmdp = pmd_offset(&pud, addr);
|
||||
do {
|
||||
pmd_t pmd = *pmdp;
|
||||
|
||||
next = pmd_addr_end(addr, end);
|
||||
if (pmd_none(pmd))
|
||||
return 0;
|
||||
if (!gup_pte_range(pmd, addr, next, write, pages, nr))
|
||||
return 0;
|
||||
} while (pmdp++, addr = next, addr != end);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int gup_pud_range(pgd_t pgd, unsigned long addr, unsigned long end,
|
||||
int write, struct page **pages, int *nr)
|
||||
{
|
||||
unsigned long next;
|
||||
pud_t *pudp;
|
||||
|
||||
pudp = pud_offset(&pgd, addr);
|
||||
do {
|
||||
pud_t pud = *pudp;
|
||||
|
||||
next = pud_addr_end(addr, end);
|
||||
if (pud_none(pud))
|
||||
return 0;
|
||||
if (!gup_pmd_range(pud, addr, next, write, pages, nr))
|
||||
return 0;
|
||||
} while (pudp++, addr = next, addr != end);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*
|
||||
* Like get_user_pages_fast() except its IRQ-safe in that it won't fall
|
||||
* back to the regular GUP.
|
||||
*/
|
||||
int __get_user_pages_fast(unsigned long start, int nr_pages, int write,
|
||||
struct page **pages)
|
||||
{
|
||||
struct mm_struct *mm = current->mm;
|
||||
unsigned long addr, len, end;
|
||||
unsigned long next;
|
||||
unsigned long flags;
|
||||
pgd_t *pgdp;
|
||||
int nr = 0;
|
||||
|
||||
start &= PAGE_MASK;
|
||||
addr = start;
|
||||
len = (unsigned long) nr_pages << PAGE_SHIFT;
|
||||
end = start + len;
|
||||
if (unlikely(!access_ok(write ? VERIFY_WRITE : VERIFY_READ,
|
||||
(void __user *)start, len)))
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* This doesn't prevent pagetable teardown, but does prevent
|
||||
* the pagetables and pages from being freed.
|
||||
*/
|
||||
local_irq_save(flags);
|
||||
pgdp = pgd_offset(mm, addr);
|
||||
do {
|
||||
pgd_t pgd = *pgdp;
|
||||
|
||||
next = pgd_addr_end(addr, end);
|
||||
if (pgd_none(pgd))
|
||||
break;
|
||||
if (!gup_pud_range(pgd, addr, next, write, pages, &nr))
|
||||
break;
|
||||
} while (pgdp++, addr = next, addr != end);
|
||||
local_irq_restore(flags);
|
||||
|
||||
return nr;
|
||||
}
|
||||
|
||||
/**
|
||||
* get_user_pages_fast() - pin user pages in memory
|
||||
* @start: starting user address
|
||||
* @nr_pages: number of pages from start to pin
|
||||
* @write: whether pages will be written to
|
||||
* @pages: array that receives pointers to the pages pinned.
|
||||
* Should be at least nr_pages long.
|
||||
*
|
||||
* Attempt to pin user pages in memory without taking mm->mmap_sem.
|
||||
* If not successful, it will fall back to taking the lock and
|
||||
* calling get_user_pages().
|
||||
*
|
||||
* Returns number of pages pinned. This may be fewer than the number
|
||||
* requested. If nr_pages is 0 or negative, returns 0. If no pages
|
||||
* were pinned, returns -errno.
|
||||
*/
|
||||
int get_user_pages_fast(unsigned long start, int nr_pages, int write,
|
||||
struct page **pages)
|
||||
{
|
||||
struct mm_struct *mm = current->mm;
|
||||
unsigned long addr, len, end;
|
||||
unsigned long next;
|
||||
pgd_t *pgdp;
|
||||
int nr = 0;
|
||||
|
||||
start &= PAGE_MASK;
|
||||
addr = start;
|
||||
len = (unsigned long) nr_pages << PAGE_SHIFT;
|
||||
|
||||
end = start + len;
|
||||
if (end < start)
|
||||
goto slow_irqon;
|
||||
|
||||
local_irq_disable();
|
||||
pgdp = pgd_offset(mm, addr);
|
||||
do {
|
||||
pgd_t pgd = *pgdp;
|
||||
|
||||
next = pgd_addr_end(addr, end);
|
||||
if (pgd_none(pgd))
|
||||
goto slow;
|
||||
if (!gup_pud_range(pgd, addr, next, write, pages, &nr))
|
||||
goto slow;
|
||||
} while (pgdp++, addr = next, addr != end);
|
||||
local_irq_enable();
|
||||
|
||||
VM_BUG_ON(nr != (end - start) >> PAGE_SHIFT);
|
||||
return nr;
|
||||
|
||||
{
|
||||
int ret;
|
||||
|
||||
slow:
|
||||
local_irq_enable();
|
||||
slow_irqon:
|
||||
/* Try to get the remaining pages with get_user_pages */
|
||||
start += nr << PAGE_SHIFT;
|
||||
pages += nr;
|
||||
|
||||
down_read(&mm->mmap_sem);
|
||||
ret = get_user_pages(current, mm, start,
|
||||
(end - start) >> PAGE_SHIFT, write, 0, pages, NULL);
|
||||
up_read(&mm->mmap_sem);
|
||||
|
||||
/* Have to be a bit careful with return values */
|
||||
if (nr > 0) {
|
||||
if (ret < 0)
|
||||
ret = nr;
|
||||
else
|
||||
ret += nr;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
|
@ -1,5 +1,7 @@
|
|||
obj-$(CONFIG_OPROFILE) += oprofile.o
|
||||
|
||||
CFLAGS_common.o += -DUTS_MACHINE='"$(UTS_MACHINE)"'
|
||||
|
||||
DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
|
||||
oprof.o cpu_buffer.o buffer_sync.o \
|
||||
event_buffer.o oprofile_files.o \
|
||||
|
|
|
|||
|
|
@ -91,7 +91,7 @@ void sh_backtrace(struct pt_regs * const regs, unsigned int depth)
|
|||
if (depth > backtrace_limit)
|
||||
depth = backtrace_limit;
|
||||
|
||||
stackaddr = (unsigned long *)regs->regs[15];
|
||||
stackaddr = (unsigned long *)kernel_stack_pointer(regs);
|
||||
if (!user_mode(regs)) {
|
||||
if (depth)
|
||||
unwind_stack(NULL, regs, stackaddr,
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* arch/sh/oprofile/init.c
|
||||
*
|
||||
* Copyright (C) 2003 - 2008 Paul Mundt
|
||||
* Copyright (C) 2003 - 2010 Paul Mundt
|
||||
*
|
||||
* Based on arch/mips/oprofile/common.c:
|
||||
*
|
||||
|
|
@ -18,43 +18,46 @@
|
|||
#include <linux/errno.h>
|
||||
#include <linux/smp.h>
|
||||
#include <linux/perf_event.h>
|
||||
#include <linux/slab.h>
|
||||
#include <asm/processor.h>
|
||||
|
||||
#ifdef CONFIG_HW_PERF_EVENTS
|
||||
extern void sh_backtrace(struct pt_regs * const regs, unsigned int depth);
|
||||
|
||||
#ifdef CONFIG_HW_PERF_EVENTS
|
||||
/*
|
||||
* This will need to be reworked when multiple PMUs are supported.
|
||||
*/
|
||||
static char *sh_pmu_op_name;
|
||||
|
||||
char *op_name_from_perf_id(void)
|
||||
{
|
||||
const char *pmu;
|
||||
char buf[20];
|
||||
int size;
|
||||
|
||||
pmu = perf_pmu_name();
|
||||
if (!pmu)
|
||||
return NULL;
|
||||
|
||||
size = snprintf(buf, sizeof(buf), "sh/%s", pmu);
|
||||
if (size > -1 && size < sizeof(buf))
|
||||
return buf;
|
||||
|
||||
return NULL;
|
||||
return sh_pmu_op_name;
|
||||
}
|
||||
|
||||
int __init oprofile_arch_init(struct oprofile_operations *ops)
|
||||
{
|
||||
ops->backtrace = sh_backtrace;
|
||||
|
||||
if (perf_num_counters() == 0)
|
||||
return -ENODEV;
|
||||
|
||||
sh_pmu_op_name = kasprintf(GFP_KERNEL, "%s/%s",
|
||||
UTS_MACHINE, perf_pmu_name());
|
||||
if (unlikely(!sh_pmu_op_name))
|
||||
return -ENOMEM;
|
||||
|
||||
return oprofile_perf_init(ops);
|
||||
}
|
||||
|
||||
void __exit oprofile_arch_exit(void)
|
||||
{
|
||||
oprofile_perf_exit();
|
||||
kfree(sh_pmu_op_name);
|
||||
}
|
||||
#else
|
||||
int __init oprofile_arch_init(struct oprofile_operations *ops)
|
||||
{
|
||||
pr_info("oprofile: hardware counters not available\n");
|
||||
ops->backtrace = sh_backtrace;
|
||||
return -ENODEV;
|
||||
}
|
||||
void __exit oprofile_arch_exit(void) {}
|
||||
|
|
|
|||
Loading…
Reference in a new issue