mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-30 11:41:38 -04:00
pxafb: preliminary smart panel interface support
Signed-off-by: Daniel Mack <[email protected]> Signed-off-by: Eric Miao <[email protected]> Cc: "Antonino A. Daplas" <[email protected]> Cc: Russell King <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
This commit is contained in:
Eric Miao
Linus Torvalds
parent
90eabbf0ec
commit
3c42a44910
5 changed files with 337 additions and 47 deletions
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@ -1774,6 +1774,11 @@ config FB_PXA
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If unsure, say N.
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config FB_PXA_SMARTPANEL
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bool "PXA Smartpanel LCD support"
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default y
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depends on FB_PXA
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config FB_PXA_PARAMETERS
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bool "PXA LCD command line parameters"
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default n
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@ -40,6 +40,8 @@
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/completion.h>
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#include <linux/kthread.h>
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#include <linux/freezer.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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@ -455,7 +457,7 @@ static int pxafb_mmap(struct fb_info *info,
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unsigned long off = vma->vm_pgoff << PAGE_SHIFT;
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if (off < info->fix.smem_len) {
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vma->vm_pgoff += 1;
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vma->vm_pgoff += fbi->video_offset / PAGE_SIZE;
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return dma_mmap_writecombine(fbi->dev, vma, fbi->map_cpu,
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fbi->map_dma, fbi->map_size);
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}
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@ -594,6 +596,183 @@ static int setup_frame_dma(struct pxafb_info *fbi, int dma, int pal,
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return 0;
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}
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#ifdef CONFIG_FB_PXA_SMARTPANEL
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static int setup_smart_dma(struct pxafb_info *fbi)
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{
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struct pxafb_dma_descriptor *dma_desc;
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unsigned long dma_desc_off, cmd_buff_off;
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dma_desc = &fbi->dma_buff->dma_desc[DMA_CMD];
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dma_desc_off = offsetof(struct pxafb_dma_buff, dma_desc[DMA_CMD]);
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cmd_buff_off = offsetof(struct pxafb_dma_buff, cmd_buff);
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dma_desc->fdadr = fbi->dma_buff_phys + dma_desc_off;
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dma_desc->fsadr = fbi->dma_buff_phys + cmd_buff_off;
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dma_desc->fidr = 0;
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dma_desc->ldcmd = fbi->n_smart_cmds * sizeof(uint16_t);
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fbi->fdadr[DMA_CMD] = dma_desc->fdadr;
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return 0;
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}
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int pxafb_smart_flush(struct fb_info *info)
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{
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struct pxafb_info *fbi = container_of(info, struct pxafb_info, fb);
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uint32_t prsr;
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int ret = 0;
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/* disable controller until all registers are set up */
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lcd_writel(fbi, LCCR0, fbi->reg_lccr0 & ~LCCR0_ENB);
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/* 1. make it an even number of commands to align on 32-bit boundary
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* 2. add the interrupt command to the end of the chain so we can
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* keep track of the end of the transfer
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*/
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while (fbi->n_smart_cmds & 1)
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fbi->smart_cmds[fbi->n_smart_cmds++] = SMART_CMD_NOOP;
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fbi->smart_cmds[fbi->n_smart_cmds++] = SMART_CMD_INTERRUPT;
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fbi->smart_cmds[fbi->n_smart_cmds++] = SMART_CMD_WAIT_FOR_VSYNC;
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setup_smart_dma(fbi);
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/* continue to execute next command */
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prsr = lcd_readl(fbi, PRSR) | PRSR_ST_OK | PRSR_CON_NT;
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lcd_writel(fbi, PRSR, prsr);
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/* stop the processor in case it executed "wait for sync" cmd */
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lcd_writel(fbi, CMDCR, 0x0001);
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/* don't send interrupts for fifo underruns on channel 6 */
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lcd_writel(fbi, LCCR5, LCCR5_IUM(6));
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lcd_writel(fbi, LCCR1, fbi->reg_lccr1);
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lcd_writel(fbi, LCCR2, fbi->reg_lccr2);
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lcd_writel(fbi, LCCR3, fbi->reg_lccr3);
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lcd_writel(fbi, FDADR0, fbi->fdadr[0]);
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lcd_writel(fbi, FDADR6, fbi->fdadr[6]);
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/* begin sending */
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lcd_writel(fbi, LCCR0, fbi->reg_lccr0 | LCCR0_ENB);
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if (wait_for_completion_timeout(&fbi->command_done, HZ/2) == 0) {
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pr_warning("%s: timeout waiting for command done\n",
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__func__);
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ret = -ETIMEDOUT;
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}
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/* quick disable */
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prsr = lcd_readl(fbi, PRSR) & ~(PRSR_ST_OK | PRSR_CON_NT);
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lcd_writel(fbi, PRSR, prsr);
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lcd_writel(fbi, LCCR0, fbi->reg_lccr0 & ~LCCR0_ENB);
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lcd_writel(fbi, FDADR6, 0);
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fbi->n_smart_cmds = 0;
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return ret;
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}
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int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int n_cmds)
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{
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int i;
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struct pxafb_info *fbi = container_of(info, struct pxafb_info, fb);
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/* leave 2 commands for INTERRUPT and WAIT_FOR_SYNC */
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for (i = 0; i < n_cmds; i++) {
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if (fbi->n_smart_cmds == CMD_BUFF_SIZE - 8)
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pxafb_smart_flush(info);
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fbi->smart_cmds[fbi->n_smart_cmds++] = *cmds++;
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}
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return 0;
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}
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static unsigned int __smart_timing(unsigned time_ns, unsigned long lcd_clk)
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{
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unsigned int t = (time_ns * (lcd_clk / 1000000) / 1000);
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return (t == 0) ? 1 : t;
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}
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static void setup_smart_timing(struct pxafb_info *fbi,
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struct fb_var_screeninfo *var)
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{
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struct pxafb_mach_info *inf = fbi->dev->platform_data;
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struct pxafb_mode_info *mode = &inf->modes[0];
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unsigned long lclk = clk_get_rate(fbi->clk);
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unsigned t1, t2, t3, t4;
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t1 = max(mode->a0csrd_set_hld, mode->a0cswr_set_hld);
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t2 = max(mode->rd_pulse_width, mode->wr_pulse_width);
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t3 = mode->op_hold_time;
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t4 = mode->cmd_inh_time;
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fbi->reg_lccr1 =
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LCCR1_DisWdth(var->xres) |
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LCCR1_BegLnDel(__smart_timing(t1, lclk)) |
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LCCR1_EndLnDel(__smart_timing(t2, lclk)) |
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LCCR1_HorSnchWdth(__smart_timing(t3, lclk));
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fbi->reg_lccr2 = LCCR2_DisHght(var->yres);
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fbi->reg_lccr3 = LCCR3_PixClkDiv(__smart_timing(t4, lclk));
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/* FIXME: make this configurable */
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fbi->reg_cmdcr = 1;
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}
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static int pxafb_smart_thread(void *arg)
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{
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struct pxafb_info *fbi = (struct pxafb_info *) arg;
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struct pxafb_mach_info *inf = fbi->dev->platform_data;
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if (!fbi || !inf->smart_update) {
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pr_err("%s: not properly initialized, thread terminated\n",
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__func__);
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return -EINVAL;
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}
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pr_debug("%s(): task starting\n", __func__);
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set_freezable();
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while (!kthread_should_stop()) {
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if (try_to_freeze())
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continue;
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if (fbi->state == C_ENABLE) {
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inf->smart_update(&fbi->fb);
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complete(&fbi->refresh_done);
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}
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set_current_state(TASK_INTERRUPTIBLE);
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schedule_timeout(30 * HZ / 1000);
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}
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pr_debug("%s(): task ending\n", __func__);
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return 0;
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}
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static int pxafb_smart_init(struct pxafb_info *fbi)
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{
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fbi->smart_thread = kthread_run(pxafb_smart_thread, fbi,
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"lcd_refresh");
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if (IS_ERR(fbi->smart_thread)) {
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printk(KERN_ERR "%s: unable to create kernel thread\n",
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__func__);
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return PTR_ERR(fbi->smart_thread);
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}
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return 0;
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}
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#else
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int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int n_cmds)
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{
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return 0;
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}
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int pxafb_smart_flush(struct fb_info *info)
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{
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return 0;
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}
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#endif /* CONFIG_FB_SMART_PANEL */
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static void setup_parallel_timing(struct pxafb_info *fbi,
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struct fb_var_screeninfo *var)
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{
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@ -643,47 +822,55 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var,
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size_t nbytes;
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#if DEBUG_VAR
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if (var->xres < 16 || var->xres > 1024)
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printk(KERN_ERR "%s: invalid xres %d\n",
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fbi->fb.fix.id, var->xres);
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switch (var->bits_per_pixel) {
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case 1:
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case 2:
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case 4:
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case 8:
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case 16:
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break;
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default:
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printk(KERN_ERR "%s: invalid bit depth %d\n",
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fbi->fb.fix.id, var->bits_per_pixel);
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break;
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if (!(fbi->lccr0 & LCCR0_LCDT)) {
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if (var->xres < 16 || var->xres > 1024)
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printk(KERN_ERR "%s: invalid xres %d\n",
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fbi->fb.fix.id, var->xres);
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switch (var->bits_per_pixel) {
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case 1:
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case 2:
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case 4:
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case 8:
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case 16:
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break;
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default:
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printk(KERN_ERR "%s: invalid bit depth %d\n",
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fbi->fb.fix.id, var->bits_per_pixel);
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break;
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}
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if (var->hsync_len < 1 || var->hsync_len > 64)
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printk(KERN_ERR "%s: invalid hsync_len %d\n",
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fbi->fb.fix.id, var->hsync_len);
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if (var->left_margin < 1 || var->left_margin > 255)
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printk(KERN_ERR "%s: invalid left_margin %d\n",
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fbi->fb.fix.id, var->left_margin);
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if (var->right_margin < 1 || var->right_margin > 255)
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printk(KERN_ERR "%s: invalid right_margin %d\n",
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fbi->fb.fix.id, var->right_margin);
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if (var->yres < 1 || var->yres > 1024)
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printk(KERN_ERR "%s: invalid yres %d\n",
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fbi->fb.fix.id, var->yres);
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if (var->vsync_len < 1 || var->vsync_len > 64)
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printk(KERN_ERR "%s: invalid vsync_len %d\n",
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fbi->fb.fix.id, var->vsync_len);
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if (var->upper_margin < 0 || var->upper_margin > 255)
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printk(KERN_ERR "%s: invalid upper_margin %d\n",
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fbi->fb.fix.id, var->upper_margin);
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if (var->lower_margin < 0 || var->lower_margin > 255)
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printk(KERN_ERR "%s: invalid lower_margin %d\n",
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fbi->fb.fix.id, var->lower_margin);
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}
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if (var->hsync_len < 1 || var->hsync_len > 64)
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printk(KERN_ERR "%s: invalid hsync_len %d\n",
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fbi->fb.fix.id, var->hsync_len);
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if (var->left_margin < 1 || var->left_margin > 255)
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printk(KERN_ERR "%s: invalid left_margin %d\n",
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fbi->fb.fix.id, var->left_margin);
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if (var->right_margin < 1 || var->right_margin > 255)
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printk(KERN_ERR "%s: invalid right_margin %d\n",
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fbi->fb.fix.id, var->right_margin);
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if (var->yres < 1 || var->yres > 1024)
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printk(KERN_ERR "%s: invalid yres %d\n",
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fbi->fb.fix.id, var->yres);
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if (var->vsync_len < 1 || var->vsync_len > 64)
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printk(KERN_ERR "%s: invalid vsync_len %d\n",
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fbi->fb.fix.id, var->vsync_len);
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if (var->upper_margin < 0 || var->upper_margin > 255)
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printk(KERN_ERR "%s: invalid upper_margin %d\n",
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fbi->fb.fix.id, var->upper_margin);
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if (var->lower_margin < 0 || var->lower_margin > 255)
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printk(KERN_ERR "%s: invalid lower_margin %d\n",
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fbi->fb.fix.id, var->lower_margin);
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#endif
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/* Update shadow copy atomically */
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local_irq_save(flags);
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setup_parallel_timing(fbi, var);
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#ifdef CONFIG_FB_PXA_SMARTPANEL
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if (fbi->lccr0 & LCCR0_LCDT)
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setup_smart_timing(fbi, var);
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else
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#endif
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setup_parallel_timing(fbi, var);
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fbi->reg_lccr0 = fbi->lccr0 |
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(LCCR0_LDM | LCCR0_SFM | LCCR0_IUM | LCCR0_EFM |
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@ -698,7 +885,7 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var,
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setup_frame_dma(fbi, DMA_LOWER, PAL_NONE, nbytes, nbytes);
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}
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if (var->bits_per_pixel >= 16)
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if ((var->bits_per_pixel >= 16) || (fbi->lccr0 & LCCR0_LCDT))
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setup_frame_dma(fbi, DMA_BASE, PAL_NONE, 0, nbytes);
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else
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setup_frame_dma(fbi, DMA_BASE, PAL_BASE, 0, nbytes);
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@ -801,6 +988,9 @@ static void pxafb_enable_controller(struct pxafb_info *fbi)
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/* enable LCD controller clock */
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clk_enable(fbi->clk);
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if (fbi->lccr0 & LCCR0_LCDT)
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return;
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/* Sequence from 11.7.10 */
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lcd_writel(fbi, LCCR3, fbi->reg_lccr3);
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lcd_writel(fbi, LCCR2, fbi->reg_lccr2);
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@ -816,6 +1006,14 @@ static void pxafb_disable_controller(struct pxafb_info *fbi)
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{
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uint32_t lccr0;
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#ifdef CONFIG_FB_PXA_SMARTPANEL
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if (fbi->lccr0 & LCCR0_LCDT) {
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wait_for_completion_timeout(&fbi->refresh_done,
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200 * HZ / 1000);
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return;
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}
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#endif
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/* Clear LCD Status Register */
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lcd_writel(fbi, LCSR, 0xffffffff);
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@ -843,6 +1041,11 @@ static irqreturn_t pxafb_handle_irq(int irq, void *dev_id)
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complete(&fbi->disable_done);
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}
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#ifdef CONFIG_FB_PXA_SMARTPANEL
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if (lcsr & LCSR_CMD_INT)
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complete(&fbi->command_done);
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#endif
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lcd_writel(fbi, LCSR, lcsr);
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return IRQ_HANDLED;
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}
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@ -1050,15 +1253,17 @@ static int __init pxafb_map_video_memory(struct pxafb_info *fbi)
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* We reserve one page for the palette, plus the size
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* of the framebuffer.
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*/
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fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + PAGE_SIZE);
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fbi->video_offset = PAGE_ALIGN(sizeof(struct pxafb_dma_buff));
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fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + fbi->video_offset);
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fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size,
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&fbi->map_dma, GFP_KERNEL);
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if (fbi->map_cpu) {
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/* prevent initial garbage on screen */
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memset(fbi->map_cpu, 0, fbi->map_size);
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fbi->fb.screen_base = fbi->map_cpu + PAGE_SIZE;
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fbi->screen_dma = fbi->map_dma + PAGE_SIZE;
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fbi->fb.screen_base = fbi->map_cpu + fbi->video_offset;
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fbi->screen_dma = fbi->map_dma + fbi->video_offset;
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/*
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* FIXME: this is actually the wrong thing to place in
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* smem_start. But fbdev suffers from the problem that
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@ -1068,9 +1273,14 @@ static int __init pxafb_map_video_memory(struct pxafb_info *fbi)
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fbi->fb.fix.smem_start = fbi->screen_dma;
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fbi->palette_size = fbi->fb.var.bits_per_pixel == 8 ? 256 : 16;
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fbi->dma_buff = (void *)fbi->map_cpu;
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fbi->dma_buff = (void *) fbi->map_cpu;
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fbi->dma_buff_phys = fbi->map_dma;
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fbi->palette_cpu = (u16 *)&fbi->dma_buff->palette[0];
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fbi->palette_cpu = (u16 *) fbi->dma_buff->palette;
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#ifdef CONFIG_FB_PXA_SMARTPANEL
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fbi->smart_cmds = (uint16_t *) fbi->dma_buff->cmd_buff;
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fbi->n_smart_cmds = 0;
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#endif
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}
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return fbi->map_cpu ? 0 : -ENOMEM;
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@ -1191,6 +1401,10 @@ static struct pxafb_info * __init pxafb_init_fbinfo(struct device *dev)
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INIT_WORK(&fbi->task, pxafb_task);
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init_MUTEX(&fbi->ctrlr_sem);
|
||||
init_completion(&fbi->disable_done);
|
||||
#ifdef CONFIG_FB_PXA_SMARTPANEL
|
||||
init_completion(&fbi->command_done);
|
||||
init_completion(&fbi->refresh_done);
|
||||
#endif
|
||||
|
||||
return fbi;
|
||||
}
|
||||
|
|
@ -1510,6 +1724,13 @@ static int __init pxafb_probe(struct platform_device *dev)
|
|||
goto failed_free_mem;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_FB_PXA_SMARTPANEL
|
||||
ret = pxafb_smart_init(fbi);
|
||||
if (ret) {
|
||||
dev_err(&dev->dev, "failed to initialize smartpanel\n");
|
||||
goto failed_free_irq;
|
||||
}
|
||||
#endif
|
||||
/*
|
||||
* This makes sure that our colour bitfield
|
||||
* descriptors are correctly initialised.
|
||||
|
|
|
|||
|
|
@ -52,9 +52,11 @@ enum {
|
|||
|
||||
/* maximum palette size - 256 entries, each 4 bytes long */
|
||||
#define PALETTE_SIZE (256 * 4)
|
||||
#define CMD_BUFF_SIZE (1024 * 50)
|
||||
|
||||
struct pxafb_dma_buff {
|
||||
unsigned char palette[PAL_MAX * PALETTE_SIZE];
|
||||
uint16_t cmd_buff[CMD_BUFF_SIZE];
|
||||
struct pxafb_dma_descriptor pal_desc[PAL_MAX];
|
||||
struct pxafb_dma_descriptor dma_desc[DMA_MAX];
|
||||
};
|
||||
|
|
@ -84,6 +86,7 @@ struct pxafb_info {
|
|||
dma_addr_t screen_dma; /* physical address of frame buffer */
|
||||
u16 * palette_cpu; /* virtual address of palette memory */
|
||||
u_int palette_size;
|
||||
ssize_t video_offset;
|
||||
|
||||
u_int lccr0;
|
||||
u_int lccr3;
|
||||
|
|
@ -97,6 +100,7 @@ struct pxafb_info {
|
|||
u_int reg_lccr2;
|
||||
u_int reg_lccr3;
|
||||
u_int reg_lccr4;
|
||||
u_int reg_cmdcr;
|
||||
|
||||
unsigned long hsync_time;
|
||||
|
||||
|
|
@ -108,6 +112,14 @@ struct pxafb_info {
|
|||
|
||||
struct completion disable_done;
|
||||
|
||||
#ifdef CONFIG_FB_PXA_SMARTPANEL
|
||||
uint16_t *smart_cmds;
|
||||
size_t n_smart_cmds;
|
||||
struct completion command_done;
|
||||
struct completion refresh_done;
|
||||
struct task_struct *smart_thread;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CPU_FREQ
|
||||
struct notifier_block freq_transition;
|
||||
struct notifier_block freq_policy;
|
||||
|
|
|
|||
Loading…
Reference in a new issue