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Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (48 commits) Documentation: update broken web addresses. fix comment typo "choosed" -> "chosen" hostap:hostap_hw.c Fix typo in comment Fix spelling contorller -> controller in comments Kconfig.debug: FAIL_IO_TIMEOUT: typo Faul -> Fault fs/Kconfig: Fix typo Userpace -> Userspace Removing dead MACH_U300_BS26 drivers/infiniband: Remove unnecessary casts of private_data fs/ocfs2: Remove unnecessary casts of private_data libfc: use ARRAY_SIZE scsi: bfa: use ARRAY_SIZE drm: i915: use ARRAY_SIZE drm: drm_edid: use ARRAY_SIZE synclink: use ARRAY_SIZE block: cciss: use ARRAY_SIZE comment typo fixes: charater => character fix comment typos concerning "challenge" arm: plat-spear: fix typo in kerneldoc reiserfs: typo comment fix update email address ...
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@ -7,7 +7,7 @@ Description:
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added or removed dynamically to represent hot-add/remove
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operations.
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Users: hotplug memory add/remove tools
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https://w3.opensource.ibm.com/projects/powerpc-utils/
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http://www.ibm.com/developerworks/wikis/display/LinuxP/powerpc-utils
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What: /sys/devices/system/memory/memoryX/removable
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Date: June 2008
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@ -19,7 +19,7 @@ Description:
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identify removable sections of the memory before attempting
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potentially expensive hot-remove memory operation
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Users: hotplug memory remove tools
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https://w3.opensource.ibm.com/projects/powerpc-utils/
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http://www.ibm.com/developerworks/wikis/display/LinuxP/powerpc-utils
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What: /sys/devices/system/memory/memoryX/phys_device
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Date: September 2008
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@ -58,7 +58,7 @@ Description:
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by root to offline that section.
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# echo offline > /sys/devices/system/memory/memory22/state
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Users: hotplug memory remove tools
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https://w3.opensource.ibm.com/projects/powerpc-utils/
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http://www.ibm.com/developerworks/wikis/display/LinuxP/powerpc-utils
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What: /sys/devices/system/memoryX/nodeY
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@ -197,7 +197,7 @@ Description: These files exist in every cpu's cache index directories.
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Currently, only AMD Family 10h Processors support cache index
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disable, and only for their L3 caches. See the BIOS and
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Kernel Developer's Guide at
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http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf
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http://support.amd.com/us/Embedded_TechDocs/31116-Public-GH-BKDG_3-28_5-28-09.pdf
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for formatting information and other details on the
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cache index disable.
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Users: [email protected]
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