diff --git a/drivers/gpu/msm/adreno_a6xx_gmu.c b/drivers/gpu/msm/adreno_a6xx_gmu.c
index 3ce035f7a85a..edd48127fe52 100644
--- a/drivers/gpu/msm/adreno_a6xx_gmu.c
+++ b/drivers/gpu/msm/adreno_a6xx_gmu.c
@@ -1691,6 +1691,7 @@ out:
 static void a6xx_gmu_suspend(struct adreno_device *adreno_dev)
 {
 	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
+	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
 
 	a6xx_gmu_irq_disable(adreno_dev);
 
@@ -1708,6 +1709,8 @@ static void a6xx_gmu_suspend(struct adreno_device *adreno_dev)
 		regulator_set_mode(gmu->cx_gdsc, REGULATOR_MODE_NORMAL);
 
 	dev_err(&gmu->pdev->dev, "Suspended GMU\n");
+
+	device->state = KGSL_STATE_NONE;
 }
 
 static int a6xx_gmu_dcvs_set(struct adreno_device *adreno_dev,
@@ -2049,6 +2052,7 @@ static int a6xx_gmu_clk_set_rate(struct a6xx_gmu_device *gmu, const char *id,
 static int a6xx_gmu_enable_clks(struct adreno_device *adreno_dev)
 {
 	struct a6xx_gmu_device *gmu = to_a6xx_gmu(adreno_dev);
+	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
 	int ret;
 
 	ret = a6xx_gmu_clk_set_rate(gmu, "gmu_clk", GMU_FREQUENCY);
@@ -2069,6 +2073,8 @@ static int a6xx_gmu_enable_clks(struct adreno_device *adreno_dev)
 		return ret;
 	}
 
+	device->state = KGSL_STATE_AWARE;
+
 	return 0;
 }
 
@@ -2740,6 +2746,8 @@ static int a6xx_gmu_power_off(struct adreno_device *adreno_dev)
 	if (!kgsl_regulator_disable_wait(gmu->cx_gdsc, 5000))
 		dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");
 
+	device->state = KGSL_STATE_NONE;
+
 	return ret;
 
 error:
@@ -3014,8 +3022,6 @@ no_gx_power:
 
 	clear_bit(GMU_PRIV_GPU_STARTED, &gmu->flags);
 
-	device->state = KGSL_STATE_NONE;
-
 	del_timer_sync(&device->idle_timer);
 
 	kgsl_pwrscale_sleep(device);
diff --git a/drivers/gpu/msm/adreno_a6xx_rgmu.c b/drivers/gpu/msm/adreno_a6xx_rgmu.c
index 7623de43be59..e1f0dde2f9d8 100644
--- a/drivers/gpu/msm/adreno_a6xx_rgmu.c
+++ b/drivers/gpu/msm/adreno_a6xx_rgmu.c
@@ -508,12 +508,16 @@ static void a6xx_rgmu_disable_clks(struct adreno_device *adreno_dev)
 static int a6xx_rgmu_disable_gdsc(struct adreno_device *adreno_dev)
 {
 	struct a6xx_rgmu_device *rgmu = to_a6xx_rgmu(adreno_dev);
+	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
 
 	/* Wait up to 5 seconds for the regulator to go off */
 	if (kgsl_regulator_disable_wait(rgmu->cx_gdsc, 5000))
 		return 0;
 
 	dev_err(&rgmu->pdev->dev, "RGMU CX gdsc off timeout\n");
+
+	device->state = KGSL_STATE_NONE;
+
 	return -ETIMEDOUT;
 }
 
@@ -579,6 +583,8 @@ static int a6xx_rgmu_enable_clks(struct adreno_device *adreno_dev)
 		return ret;
 	}
 
+	device->state = KGSL_STATE_AWARE;
+
 	return 0;
 }
 
@@ -1051,8 +1057,6 @@ no_gx_power:
 
 	clear_bit(RGMU_PRIV_GPU_STARTED, &rgmu->flags);
 
-	device->state = KGSL_STATE_NONE;
-
 	del_timer_sync(&device->idle_timer);
 
 	kgsl_pwrscale_sleep(device);
diff --git a/drivers/gpu/msm/kgsl_device.h b/drivers/gpu/msm/kgsl_device.h
index 256255dae52d..eafb9b342a5d 100644
--- a/drivers/gpu/msm/kgsl_device.h
+++ b/drivers/gpu/msm/kgsl_device.h
@@ -592,9 +592,6 @@ static inline int kgsl_state_is_awake(struct kgsl_device *device)
 	if (device->state == KGSL_STATE_ACTIVE ||
 		device->state == KGSL_STATE_AWARE)
 		return true;
-	else if (gmu_core_isenabled(device) &&
-			test_bit(GMU_CLK_ON, &device->gmu_core.flags))
-		return true;
 	else
 		return false;
 }
diff --git a/drivers/gpu/msm/kgsl_gmu_core.h b/drivers/gpu/msm/kgsl_gmu_core.h
index 07f3c7b79139..dd2685c6f1a5 100644
--- a/drivers/gpu/msm/kgsl_gmu_core.h
+++ b/drivers/gpu/msm/kgsl_gmu_core.h
@@ -34,7 +34,6 @@ enum gmu_core_boot {
 /* Bits for the flags field in the gmu structure */
 enum gmu_core_flags {
 	GMU_BOOT_INIT_DONE = 0,
-	GMU_CLK_ON,
 	GMU_HFI_ON,
 	GMU_FAULT,
 	GMU_DCVS_REPLAY,