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staging: comedi: addi_apci_3120: define status register bits
Define the bits in the status register and use them to clarify the code. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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2 changed files with 34 additions and 33 deletions
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@ -83,10 +83,6 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY
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#define APCI3120_RD_FIFO 0x00
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/* status register bits */
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#define APCI3120_EOC 0x8000
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#define APCI3120_EOS 0x2000
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/* software trigger dummy register */
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#define APCI3120_START_CONVERSION 0x02
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@ -98,8 +94,6 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY
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#define APCI3120_TIMER_DISABLE 0
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#define APCI3120_TIMER_ENABLE 1
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#define APCI3120_FC_TIMER 0x1000
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#define APCI3120_COUNTER 3
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static int apci3120_setup_chan_list(struct comedi_device *dev,
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@ -145,7 +139,7 @@ static int apci3120_ai_eoc(struct comedi_device *dev,
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unsigned int status;
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status = inw(dev->iobase + APCI3120_STATUS_REG);
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if ((status & APCI3120_EOC) == 0)
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if ((status & APCI3120_STATUS_EOC_INT) == 0)
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return 0;
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return -EBUSY;
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}
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@ -748,21 +742,20 @@ static irqreturn_t apci3120_interrupt(int irq, void *d)
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struct apci3120_private *devpriv = dev->private;
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struct comedi_subdevice *s = dev->read_subdev;
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struct comedi_cmd *cmd = &s->async->cmd;
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unsigned short int_daq;
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unsigned int status;
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unsigned int int_amcc;
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int_daq = inw(dev->iobase + APCI3120_STATUS_REG) & 0xf000;
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status = inw(dev->iobase + APCI3120_STATUS_REG);
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int_amcc = inl(devpriv->amcc + AMCC_OP_REG_INTCSR);
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if ((!int_daq) && (!(int_amcc & ANY_S593X_INT))) {
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if (!(status & APCI3120_STATUS_INT_MASK) &&
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!(int_amcc & ANY_S593X_INT)) {
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dev_err(dev->class_dev, "IRQ from unknown source\n");
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return IRQ_NONE;
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}
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outl(int_amcc | 0x00ff0000, devpriv->amcc + AMCC_OP_REG_INTCSR);
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int_daq = (int_daq >> 12) & 0xF;
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if (devpriv->b_ExttrigEnable == APCI3120_ENABLE) {
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apci3120_exttrig_enable(dev, false);
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devpriv->b_ExttrigEnable = APCI3120_DISABLE;
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@ -775,14 +768,13 @@ static irqreturn_t apci3120_interrupt(int irq, void *d)
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if (int_amcc & TARGET_ABORT_INT)
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dev_err(dev->class_dev, "AMCC IRQ - TARGET DMA ABORT!\n");
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/* Ckeck if EOC interrupt */
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if (((int_daq & 0x8) == 0) &&
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(devpriv->b_InterruptMode == APCI3120_EOC_MODE)) {
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if ((status & APCI3120_STATUS_EOC_INT) == 0 &&
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devpriv->b_InterruptMode == APCI3120_EOC_MODE) {
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/* nothing to do... EOC mode is not currently used */
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}
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/* Check If EOS interrupt */
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if ((int_daq & 0x2) && (devpriv->b_InterruptMode == APCI3120_EOS_MODE)) {
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if ((status & APCI3120_STATUS_EOS_INT) &&
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devpriv->b_InterruptMode == APCI3120_EOS_MODE) {
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if (devpriv->ai_running) {
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unsigned short val;
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int i;
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@ -797,9 +789,7 @@ static irqreturn_t apci3120_interrupt(int irq, void *d)
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}
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}
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/* Timer2 interrupt */
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if (int_daq & 0x1) {
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if (status & APCI3120_STATUS_TIMER2_INT) {
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switch (devpriv->b_Timer2Mode) {
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case APCI3120_COUNTER:
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devpriv->mode &= ~APCI3120_MODE_EOS_IRQ_ENA;
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@ -829,7 +819,8 @@ static irqreturn_t apci3120_interrupt(int irq, void *d)
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apci3120_clr_timer2_interrupt(dev);
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}
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if ((int_daq & 0x4) && (devpriv->b_InterruptMode == APCI3120_DMA_MODE)) {
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if ((status & APCI3120_STATUS_AMCC_INT) &&
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devpriv->b_InterruptMode == APCI3120_DMA_MODE) {
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if (devpriv->ai_running) {
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/* Clear Timer Write TC int */
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@ -1019,7 +1010,7 @@ static int apci3120_read_insn_timer(struct comedi_device *dev,
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unsigned int *data)
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{
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struct apci3120_private *devpriv = dev->private;
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unsigned short us_StatusValue;
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unsigned int status;
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if ((devpriv->b_Timer2Mode != APCI3120_WATCHDOG)
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&& (devpriv->b_Timer2Mode != APCI3120_TIMER)) {
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@ -1027,13 +1018,15 @@ static int apci3120_read_insn_timer(struct comedi_device *dev,
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}
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if (devpriv->b_Timer2Mode == APCI3120_TIMER) {
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data[0] = apci3120_timer_read(dev, 2);
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} else { /* Read watch dog status */
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us_StatusValue = inw(dev->iobase + APCI3120_STATUS_REG);
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us_StatusValue =
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((us_StatusValue & APCI3120_FC_TIMER) >> 12) & 1;
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if (us_StatusValue == 1)
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} else {
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/* Read watch dog status */
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status = inw(dev->iobase + APCI3120_STATUS_REG);
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if (status & APCI3120_STATUS_TIMER2_INT) {
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apci3120_clr_timer2_interrupt(dev);
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data[0] = us_StatusValue; /* when data[0] = 1 then the watch dog has rundown */
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data[0] = 1;
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} else {
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data[0] = 0;
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}
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}
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return insn->n;
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}
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@ -1043,11 +1036,10 @@ static int apci3120_di_insn_bits(struct comedi_device *dev,
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struct comedi_insn *insn,
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unsigned int *data)
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{
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unsigned int val;
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unsigned int status;
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/* the input channels are bits 11:8 of the status reg */
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val = inw(dev->iobase + APCI3120_STATUS_REG);
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data[1] = (val >> 8) & 0xf;
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status = inw(dev->iobase + APCI3120_STATUS_REG);
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data[1] = APCI3120_STATUS_TO_DI_BITS(status);
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return insn->n;
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}
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@ -1078,7 +1070,7 @@ static int apci3120_ao_ready(struct comedi_device *dev,
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unsigned int status;
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status = inw(dev->iobase + APCI3120_STATUS_REG);
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if (status & 0x0001) /* waiting for DA_READY */
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if (status & APCI3120_STATUS_DA_READY)
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return 0;
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return -EBUSY;
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}
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@ -21,7 +21,16 @@
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#define APCI3120_CTRL_PR(x) (((x) & 0xf) << 8)
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#define APCI3120_CTRL_PA(x) (((x) & 0xf) << 0)
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#define APCI3120_STATUS_REG 0x02
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#define APCI3120_STATUS_EOC_INT (1 << 15)
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#define APCI3120_STATUS_AMCC_INT (1 << 14)
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#define APCI3120_STATUS_EOS_INT (1 << 13)
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#define APCI3120_STATUS_TIMER2_INT (1 << 12)
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#define APCI3120_STATUS_INT_MASK (0xf << 12)
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#define APCI3120_STATUS_TO_DI_BITS(x) (((x) >> 8) & 0xf)
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#define APCI3120_STATUS_TO_VERSION(x) (((x) >> 4) & 0xf)
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#define APCI3120_STATUS_FIFO_FULL (1 << 2)
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#define APCI3120_STATUS_FIFO_EMPTY (1 << 1)
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#define APCI3120_STATUS_DA_READY (1 << 0)
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#define APCI3120_TIMER_REG 0x04
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#define APCI3120_CHANLIST_REG 0x06
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#define APCI3120_CHANLIST_INDEX(x) (((x) & 0xf) << 8)
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