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Merge branch 'for-4.5/nvme' of git://git.kernel.dk/linux-block
Pull NVMe updates from Jens Axboe: "Last branch for this series is the nvme changes. It's in a separate branch to avoid splitting too much between core and NVMe changes, since NVMe is still helping drive some blk-mq changes. That said, not a huge amount of core changes in here. The grunt of the work is the continued split of the code" * 'for-4.5/nvme' of git://git.kernel.dk/linux-block: (67 commits) uapi: update install list after nvme.h rename NVMe: Export NVMe attributes to sysfs group NVMe: Shutdown controller only for power-off NVMe: IO queue deletion re-write NVMe: Remove queue freezing on resets NVMe: Use a retryable error code on reset NVMe: Fix admin queue ring wrap nvme: make SG_IO support optional nvme: fixes for NVME_IOCTL_IO_CMD on the char device nvme: synchronize access to ctrl->namespaces nvme: Move nvme_freeze/unfreeze_queues to nvme core PCI/AER: include header file NVMe: Export namespace attributes to sysfs NVMe: Add pci error handlers block: remove REQ_NO_TIMEOUT flag nvme: merge iod and cmd_info nvme: meta_sg doesn't have to be an array nvme: properly free resources for cancelled command nvme: simplify completion handling nvme: special case AEN requests ...
This commit is contained in:
commit
3e1e21c7bf
19 changed files with 2608 additions and 2209 deletions
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@ -7,6 +7,7 @@
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#ifndef _AER_H_
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#define _AER_H_
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#include <linux/errno.h>
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#include <linux/types.h>
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#define AER_NONFATAL 0
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@ -318,16 +318,6 @@ enum bip_flags {
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BIP_IP_CHECKSUM = 1 << 4, /* IP checksum */
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};
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#if defined(CONFIG_BLK_DEV_INTEGRITY)
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static inline struct bio_integrity_payload *bio_integrity(struct bio *bio)
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{
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if (bio->bi_rw & REQ_INTEGRITY)
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return bio->bi_integrity;
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return NULL;
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}
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/*
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* bio integrity payload
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*/
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@ -349,6 +339,16 @@ struct bio_integrity_payload {
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struct bio_vec bip_inline_vecs[0];/* embedded bvec array */
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};
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#if defined(CONFIG_BLK_DEV_INTEGRITY)
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static inline struct bio_integrity_payload *bio_integrity(struct bio *bio)
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{
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if (bio->bi_rw & REQ_INTEGRITY)
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return bio->bi_integrity;
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return NULL;
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}
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static inline bool bio_integrity_flagged(struct bio *bio, enum bip_flags flag)
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{
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struct bio_integrity_payload *bip = bio_integrity(bio);
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@ -795,6 +795,18 @@ static inline bool bio_integrity_flagged(struct bio *bio, enum bip_flags flag)
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return false;
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}
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static inline void *bio_integrity_alloc(struct bio * bio, gfp_t gfp,
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unsigned int nr)
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{
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return ERR_PTR(-EINVAL);
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}
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static inline int bio_integrity_add_page(struct bio *bio, struct page *page,
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unsigned int len, unsigned int offset)
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{
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return 0;
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}
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#endif /* CONFIG_BLK_DEV_INTEGRITY */
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#endif /* CONFIG_BLOCK */
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@ -188,7 +188,6 @@ enum rq_flag_bits {
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__REQ_PM, /* runtime pm request */
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__REQ_HASHED, /* on IO scheduler merge hash */
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__REQ_MQ_INFLIGHT, /* track inflight for MQ */
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__REQ_NO_TIMEOUT, /* requests may never expire */
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__REQ_NR_BITS, /* stops here */
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};
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@ -242,7 +241,6 @@ enum rq_flag_bits {
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#define REQ_PM (1ULL << __REQ_PM)
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#define REQ_HASHED (1ULL << __REQ_HASHED)
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#define REQ_MQ_INFLIGHT (1ULL << __REQ_MQ_INFLIGHT)
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#define REQ_NO_TIMEOUT (1ULL << __REQ_NO_TIMEOUT)
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typedef unsigned int blk_qc_t;
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#define BLK_QC_T_NONE -1U
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@ -409,6 +409,7 @@ struct request_queue {
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unsigned int rq_timeout;
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struct timer_list timeout;
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struct work_struct timeout_work;
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struct list_head timeout_list;
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struct list_head icq_list;
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@ -17,20 +17,19 @@
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#include <linux/types.h>
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struct nvme_bar {
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__u64 cap; /* Controller Capabilities */
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__u32 vs; /* Version */
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__u32 intms; /* Interrupt Mask Set */
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__u32 intmc; /* Interrupt Mask Clear */
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__u32 cc; /* Controller Configuration */
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__u32 rsvd1; /* Reserved */
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__u32 csts; /* Controller Status */
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__u32 nssr; /* Subsystem Reset */
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__u32 aqa; /* Admin Queue Attributes */
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__u64 asq; /* Admin SQ Base Address */
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__u64 acq; /* Admin CQ Base Address */
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__u32 cmbloc; /* Controller Memory Buffer Location */
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__u32 cmbsz; /* Controller Memory Buffer Size */
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enum {
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NVME_REG_CAP = 0x0000, /* Controller Capabilities */
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NVME_REG_VS = 0x0008, /* Version */
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NVME_REG_INTMS = 0x000c, /* Interrupt Mask Set */
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NVME_REG_INTMC = 0x0010, /* Interrupt Mask Set */
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NVME_REG_CC = 0x0014, /* Controller Configuration */
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NVME_REG_CSTS = 0x001c, /* Controller Status */
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NVME_REG_NSSR = 0x0020, /* NVM Subsystem Reset */
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NVME_REG_AQA = 0x0024, /* Admin Queue Attributes */
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NVME_REG_ASQ = 0x0028, /* Admin SQ Base Address */
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NVME_REG_ACQ = 0x0030, /* Admin SQ Base Address */
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NVME_REG_CMBLOC = 0x0038, /* Controller Memory Buffer Location */
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NVME_REG_CMBSZ = 0x003c, /* Controller Memory Buffer Size */
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};
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#define NVME_CAP_MQES(cap) ((cap) & 0xffff)
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