From 3e1e54a30922f8d1ef8b1efcb68ab0eb65b39f33 Mon Sep 17 00:00:00 2001 From: Nagireddy Annem Date: Fri, 5 Mar 2021 23:00:48 +0530 Subject: [PATCH] ARM: dts: msm: Enable pil and dload support for Monaco Add lpass, modem and download mode nodes for Monaco. Change-Id: I6fc30d3d79c855172aba55199b283a7e48088587 --- qcom/monaco.dtsi | 174 +++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 147 insertions(+), 27 deletions(-) diff --git a/qcom/monaco.dtsi b/qcom/monaco.dtsi index 4dcfa5c02af6..4e8849fa427f 100644 --- a/qcom/monaco.dtsi +++ b/qcom/monaco.dtsi @@ -5,6 +5,7 @@ #include #include #include +#include / { @@ -22,6 +23,8 @@ hsuart0 = &qupv3_se5_4uart; }; + firmware: firmware {}; + cpus { #address-cells = <2>; #size-cells = <0>; @@ -127,27 +130,8 @@ soc: soc { }; - firmware: firmware { - android { - compatible = "android,firmware"; - vbmeta { - compatible="android,vbmeta"; - parts = "vbmeta,boot,system,vendor,dtbo,recovery"; - }; - - fstab { - compatible = "android,fstab"; - vendor { - compatible = "android,vendor"; - dev = - "/dev/block/platform/soc/4744000.sdhci/by-name/vendor"; - type = "ext4"; - mnt_flags = "ro,barrier=1,discard"; - fsmgr_flags = "wait,slotselect,avb"; - status = "ok"; - }; - }; - }; + chosen { + bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7"; }; reserved-memory { @@ -260,9 +244,33 @@ linux,cma-default; }; }; +}; - chosen { - bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7"; +&firmware { + scm { + compatible = "qcom,scm"; + qcom,dload-mode = <&tcsr 0x13000>; + }; + + android { + compatible = "android,firmware"; + vbmeta { + compatible="android,vbmeta"; + parts = "vbmeta,boot,system,vendor,dtbo,recovery"; + }; + + fstab { + compatible = "android,fstab"; + vendor { + compatible = "android,vendor"; + dev = + "/dev/block/platform/soc/4744000.sdhci/by-name/vendor"; + type = "ext4"; + mnt_flags = "ro,barrier=1,discard"; + fsmgr_flags = "wait,slotselect,avb"; + status = "ok"; + }; + }; }; }; @@ -406,10 +414,8 @@ }; }; - restart@440b000 { - compatible = "qcom,pshold"; - reg = <0x440b000 0x4>, <0x03d3000 0x4>; - reg-names = "pshold-base", "tcsr-boot-misc-detect"; + dload_mode { + compatible = "qcom,dload-mode"; }; qcom,mpm2-slepp-counter@4403000 { @@ -444,6 +450,23 @@ qcom,wakeup-enable; }; + eud: qcom,msm-eud@1610000 { + compatible = "qcom,msm-eud"; + interrupt-names = "eud_irq"; + interrupts = ; + reg = <0x1610000 0x2000>, + <0x1612000 0x1000>, + <0x3E5018 0x4>; + reg-names = "eud_base", "eud_mode_mgr2", + "eud_tcsr_check_reg"; + qcom,secure-eud-en; + qcom,eud-tcsr-check-enable; + qcom,eud-clock-vote-req; + clocks = <&gcc GCC_AHB2PHY_USB_CLK>; + clock-names = "eud_ahb2phy_clk"; + status = "ok"; + }; + qcom,sps { compatible = "qcom,msm-sps-4k"; qcom,pipe-attr-ee; @@ -542,6 +565,98 @@ }; }; + pil_scm_pas { + compatible = "qcom,pil-tz-scm-pas"; + interconnects = <&clk_virt MASTER_CRYPTO_CORE0 &bimc SLAVE_EBI_CH0>; + }; + + qcom,lpass@ab00000 { + compatible = "qcom,pil-tz-generic"; + reg = <0xab00000 0x00100>; + + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "xo"; + qcom,proxy-clock-names = "xo"; + + vdd_lpi_cx-supply = <&VDD_LPI_CX_LEVEL>; + qcom,vdd_lpi_cx-uV-uA = ; + vdd_lpi_mx-supply = <&VDD_LPI_MX_LEVEL>; + qcom,vdd_lpi_mx-uV-uA = ; + qcom,proxy-reg-names = "vdd_lpi_cx", "vdd_lpi_mx"; + + qcom,firmware-name = "adsp"; + memory-region = <&pil_adsp_mem>; + qcom,proxy-timeout-ms = <10000>; + qcom,sysmon-id = <1>; + qcom,minidump-id = <5>; + qcom,ssctl-instance-id = <0x14>; + qcom,pas-id = <1>; + qcom,smem-id = <423>; + qcom,complete-ramdump; + qcom,minidump-as-elf32; + + /* Inputs from lpass */ + interrupts-extended = <&intc 0 282 IRQ_TYPE_LEVEL_HIGH>, + <&adsp_smp2p_in 0 0>, + <&adsp_smp2p_in 2 0>, + <&adsp_smp2p_in 1 0>, + <&adsp_smp2p_in 3 0>; + + interrupt-names = "qcom,wdog", + "qcom,err-fatal", + "qcom,proxy-unvote", + "qcom,err-ready", + "qcom,stop-ack"; + + /* Outputs to lpass */ + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "qcom,force-stop"; + }; + + pil_modem: qcom,mss@6080000 { + compatible = "qcom,pil-tz-generic"; + reg = <0x6080000 0x100>; + + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "xo"; + qcom,proxy-clock-names = "xo"; + + vdd_cx-supply = <&VDD_CX_LEVEL>; + qcom,vdd_cx-uV-uA = ; + qcom,proxy-reg-names = "vdd_cx"; + + qcom,firmware-name = "modem"; + memory-region = <&pil_modem_mem>; + qcom,proxy-timeout-ms = <10000>; + qcom,sysmon-id = <0>; + qcom,ssctl-instance-id = <0x12>; + qcom,pas-id = <4>; + qcom,smem-id = <421>; + qcom,minidump-id = <3>; + qcom,aux-minidump-ids = <4>; + qcom,complete-ramdump; + qcom,sequential-fw-load; + + /* Inputs from mss */ + interrupts-extended = <&intc 0 307 1>, + <&modem_smp2p_in 0 0>, + <&modem_smp2p_in 2 0>, + <&modem_smp2p_in 1 0>, + <&modem_smp2p_in 3 0>, + <&modem_smp2p_in 7 0>; + + interrupt-names = "qcom,wdog", + "qcom,err-fatal", + "qcom,proxy-unvote", + "qcom,err-ready", + "qcom,stop-ack", + "qcom,shutdown-ack"; + + /* Outputs to mss */ + qcom,smem-states = <&modem_smp2p_out 0>; + qcom,smem-state-names = "qcom,force-stop"; + }; + clocks { xo_board: xo-board { compatible = "fixed-clock"; @@ -654,6 +769,11 @@ #hwlock-cells = <1>; }; + tcsr: syscon@03c0000 { + compatible = "syscon"; + reg = <0x03c0000 0x30000>; + }; + smem: qcom,smem { compatible = "qcom,smem"; memory-region = <&smem_region>;