From 3e55e8fb89c5ecfcf74d7fc936481b91c0ea12cc Mon Sep 17 00:00:00 2001 From: Naman Padhiar Date: Thu, 24 Sep 2020 13:12:54 +0530 Subject: [PATCH] icnss2: Send enter power save after driver suspend In PM suspend of WCN6750, host send WOW Enable to FW and FW allows target to go to low power mode along with PCIe link. In Host DP, even after sending WOW enable it tries to access target for flushing pending transactions. This will cause NOC error as link is down. Send enter power save mode to FW after driver suspend returns successfully to platform driver and all pending transactions are flushed. FW will go to low power mode only after receiveing enter power save mode QMI. Change-Id: I5dfb257fe3db4dc453bae456c40d19f841e3c5c8 Signed-off-by: Naman Padhiar --- drivers/soc/qcom/icnss2/main.c | 27 +- drivers/soc/qcom/icnss2/main.h | 7 + drivers/soc/qcom/icnss2/qmi.c | 60 ++-- drivers/soc/qcom/icnss2/qmi.h | 6 +- .../qcom/icnss2/wlan_firmware_service_v01.c | 147 ++++++++- .../qcom/icnss2/wlan_firmware_service_v01.h | 282 +++++++++--------- 6 files changed, 335 insertions(+), 194 deletions(-) diff --git a/drivers/soc/qcom/icnss2/main.c b/drivers/soc/qcom/icnss2/main.c index d7a3ff4969af..c74b77c24095 100644 --- a/drivers/soc/qcom/icnss2/main.c +++ b/drivers/soc/qcom/icnss2/main.c @@ -2760,7 +2760,6 @@ EXPORT_SYMBOL(icnss_idle_restart); int icnss_exit_power_save(struct device *dev) { struct icnss_priv *priv = dev_get_drvdata(dev); - int ret = 0; icnss_pr_dbg("Calling Exit Power Save\n"); @@ -2768,12 +2767,8 @@ int icnss_exit_power_save(struct device *dev) !test_bit(ICNSS_MODE_ON, &priv->state)) return 0; - ret = wlfw_exit_power_save_send_msg(priv); - if (ret) { - priv->stats.pm_resume_err++; - return ret; - } - return 0; + return wlfw_power_save_send_msg(priv, + (enum wlfw_power_save_mode_v01)ICNSS_POWER_SAVE_EXIT); } EXPORT_SYMBOL(icnss_exit_power_save); @@ -3358,12 +3353,18 @@ static int icnss_pm_suspend(struct device *dev) if (!priv->ops || !priv->ops->pm_suspend || !test_bit(ICNSS_DRIVER_PROBED, &priv->state)) - goto out; + return 0; ret = priv->ops->pm_suspend(dev); -out: if (ret == 0) { + if (priv->device_id == WCN6750_DEVICE_ID) { + ret = wlfw_power_save_send_msg(priv, + (enum wlfw_power_save_mode_v01) + ICNSS_POWER_SAVE_ENTER); + if (ret) + return priv->ops->pm_resume(dev); + } priv->stats.pm_suspend++; set_bit(ICNSS_PM_SUSPEND, &priv->state); } else { @@ -3476,7 +3477,13 @@ static int icnss_pm_runtime_suspend(struct device *dev) icnss_pr_vdbg("Runtime suspend\n"); ret = priv->ops->runtime_suspend(dev); - + if (!ret) { + ret = wlfw_power_save_send_msg(priv, + (enum wlfw_power_save_mode_v01) + ICNSS_POWER_SAVE_ENTER); + if (ret) + return priv->ops->runtime_resume(dev); + } out: return ret; } diff --git a/drivers/soc/qcom/icnss2/main.h b/drivers/soc/qcom/icnss2/main.h index a273a25f83a4..975e32c50d8e 100644 --- a/drivers/soc/qcom/icnss2/main.h +++ b/drivers/soc/qcom/icnss2/main.h @@ -158,6 +158,10 @@ struct icnss_fw_mem { unsigned long attrs; }; +enum icnss_power_save_mode { + ICNSS_POWER_SAVE_ENTER, + ICNSS_POWER_SAVE_EXIT, +}; struct icnss_stats { struct { uint32_t posted; @@ -230,6 +234,9 @@ struct icnss_stats { u32 exit_power_save_req; u32 exit_power_save_resp; u32 exit_power_save_err; + u32 enter_power_save_req; + u32 enter_power_save_resp; + u32 enter_power_save_err; u32 soc_wake_req; u32 soc_wake_resp; u32 soc_wake_err; diff --git a/drivers/soc/qcom/icnss2/qmi.c b/drivers/soc/qcom/icnss2/qmi.c index 74fdde017893..6d0caf3c70bc 100644 --- a/drivers/soc/qcom/icnss2/qmi.c +++ b/drivers/soc/qcom/icnss2/qmi.c @@ -341,11 +341,11 @@ out: return ret; } -int wlfw_exit_power_save_send_msg(struct icnss_priv *priv) +int wlfw_power_save_send_msg(struct icnss_priv *priv, + enum wlfw_power_save_mode_v01 mode) { int ret; - struct wlfw_exit_power_save_req_msg_v01 *req; - struct wlfw_exit_power_save_resp_msg_v01 *resp; + struct wlfw_power_save_req_msg_v01 *req; struct qmi_txn txn; if (!priv) @@ -354,23 +354,27 @@ int wlfw_exit_power_save_send_msg(struct icnss_priv *priv) if (test_bit(ICNSS_FW_DOWN, &priv->state)) return -EINVAL; - icnss_pr_dbg("Sending exit power save, state: 0x%lx\n", - priv->state); + if (test_bit(ICNSS_PD_RESTART, &priv->state) || + !test_bit(ICNSS_MODE_ON, &priv->state)) + return 0; + + icnss_pr_dbg("Sending power save mode: %d, state: 0x%lx\n", + mode, priv->state); req = kzalloc(sizeof(*req), GFP_KERNEL); if (!req) return -ENOMEM; - resp = kzalloc(sizeof(*resp), GFP_KERNEL); - if (!resp) { - kfree(req); - return -ENOMEM; - } + req->power_save_mode_valid = 1; + req->power_save_mode = mode; - priv->stats.exit_power_save_req++; + if (mode == WLFW_POWER_SAVE_EXIT_V01) + priv->stats.exit_power_save_req++; + else + priv->stats.enter_power_save_req++; ret = qmi_txn_init(&priv->qmi, &txn, - wlfw_exit_power_save_resp_msg_v01_ei, resp); + NULL, NULL); if (ret < 0) { icnss_qmi_fatal_err("Fail to init txn for exit power save%d\n", ret); @@ -378,9 +382,9 @@ int wlfw_exit_power_save_send_msg(struct icnss_priv *priv) } ret = qmi_send_request(&priv->qmi, NULL, &txn, - QMI_WLFW_EXIT_POWER_SAVE_REQ_V01, - WLFW_EXIT_POWER_SAVE_REQ_MSG_V01_MAX_MSG_LEN, - wlfw_exit_power_save_req_msg_v01_ei, req); + QMI_WLFW_POWER_SAVE_REQ_V01, + WLFW_POWER_SAVE_REQ_MSG_V01_MAX_MSG_LEN, + wlfw_power_save_req_msg_v01_ei, req); if (ret < 0) { qmi_txn_cancel(&txn); icnss_qmi_fatal_err("Fail to send exit power save req %d\n", @@ -388,29 +392,23 @@ int wlfw_exit_power_save_send_msg(struct icnss_priv *priv) goto out; } - ret = qmi_txn_wait(&txn, priv->ctrl_params.qmi_timeout); - if (ret < 0) { - icnss_qmi_fatal_err("Exit power save wait failed with ret %d\n", - ret); - goto out; - } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) { - icnss_qmi_fatal_err( - "QMI exit power save request rejected,result:%d error:%d\n", - resp->resp.result, resp->resp.error); - ret = -resp->resp.result; - goto out; - } + qmi_txn_cancel(&txn); - priv->stats.exit_power_save_resp++; + if (mode == WLFW_POWER_SAVE_EXIT_V01) + priv->stats.exit_power_save_resp++; + else + priv->stats.enter_power_save_resp++; - kfree(resp); kfree(req); return 0; out: - kfree(resp); kfree(req); - priv->stats.exit_power_save_err++; + + if (mode == WLFW_POWER_SAVE_EXIT_V01) + priv->stats.exit_power_save_err++; + else + priv->stats.enter_power_save_err++; return ret; } diff --git a/drivers/soc/qcom/icnss2/qmi.h b/drivers/soc/qcom/icnss2/qmi.h index f4c1d2b263f1..5df52e753302 100644 --- a/drivers/soc/qcom/icnss2/qmi.h +++ b/drivers/soc/qcom/icnss2/qmi.h @@ -129,7 +129,8 @@ int wlfw_qdss_trace_mem_info_send_sync(struct icnss_priv *priv) return 0; } -int wlfw_exit_power_save_send_msg(struct icnss_priv *priv) +int wlfw_power_save_send_msg(struct icnss_priv *priv, + enum wlfw_power_save_mode_v01 mode) { return 0; } @@ -180,7 +181,8 @@ int wlfw_wlan_mode_send_sync_msg(struct icnss_priv *priv, enum wlfw_driver_mode_enum_v01 mode); int icnss_wlfw_bdf_dnld_send_sync(struct icnss_priv *priv, u32 bdf_type); int wlfw_qdss_trace_mem_info_send_sync(struct icnss_priv *priv); -int wlfw_exit_power_save_send_msg(struct icnss_priv *priv); +int wlfw_power_save_send_msg(struct icnss_priv *priv, + enum wlfw_power_save_mode_v01 mode); int icnss_wlfw_get_info_send_sync(struct icnss_priv *priv, int type, void *cmd, int cmd_len); int wlfw_send_soc_wake_msg(struct icnss_priv *priv, diff --git a/drivers/soc/qcom/icnss2/wlan_firmware_service_v01.c b/drivers/soc/qcom/icnss2/wlan_firmware_service_v01.c index 09c7e8d0babc..bda8d11c05c6 100644 --- a/drivers/soc/qcom/icnss2/wlan_firmware_service_v01.c +++ b/drivers/soc/qcom/icnss2/wlan_firmware_service_v01.c @@ -782,6 +782,24 @@ struct qmi_elem_info wlfw_ind_register_req_msg_v01_ei[] = { .offset = offsetof(struct wlfw_ind_register_req_msg_v01, wfc_call_twt_config_enable), }, + { + .data_type = QMI_OPT_FLAG, + .elem_len = 1, + .elem_size = sizeof(u8), + .array_type = NO_ARRAY, + .tlv_type = 0x22, + .offset = offsetof(struct wlfw_ind_register_req_msg_v01, + qdss_mem_ready_enable_valid), + }, + { + .data_type = QMI_UNSIGNED_1_BYTE, + .elem_len = 1, + .elem_size = sizeof(u8), + .array_type = NO_ARRAY, + .tlv_type = 0x22, + .offset = offsetof(struct wlfw_ind_register_req_msg_v01, + qdss_mem_ready_enable), + }, { .data_type = QMI_EOTI, .array_type = NO_ARRAY, @@ -1407,6 +1425,42 @@ struct qmi_elem_info wlfw_cap_resp_msg_v01_ei[] = { .offset = offsetof(struct wlfw_cap_resp_msg_v01, eeprom_caldata_read_timeout), }, + { + .data_type = QMI_OPT_FLAG, + .elem_len = 1, + .elem_size = sizeof(u8), + .array_type = NO_ARRAY, + .tlv_type = 0x1A, + .offset = offsetof(struct wlfw_cap_resp_msg_v01, + fw_caps_valid), + }, + { + .data_type = QMI_UNSIGNED_8_BYTE, + .elem_len = 1, + .elem_size = sizeof(u64), + .array_type = NO_ARRAY, + .tlv_type = 0x1A, + .offset = offsetof(struct wlfw_cap_resp_msg_v01, + fw_caps), + }, + { + .data_type = QMI_OPT_FLAG, + .elem_len = 1, + .elem_size = sizeof(u8), + .array_type = NO_ARRAY, + .tlv_type = 0x1B, + .offset = offsetof(struct wlfw_cap_resp_msg_v01, + rd_card_chain_cap_valid), + }, + { + .data_type = QMI_SIGNED_4_BYTE_ENUM, + .elem_len = 1, + .elem_size = sizeof(enum wlfw_rd_card_chain_cap_v01), + .array_type = NO_ARRAY, + .tlv_type = 0x1B, + .offset = offsetof(struct wlfw_cap_resp_msg_v01, + rd_card_chain_cap), + }, { .data_type = QMI_EOTI, .array_type = NO_ARRAY, @@ -1560,6 +1614,26 @@ struct qmi_elem_info wlfw_bdf_download_resp_msg_v01_ei[] = { resp), .ei_array = qmi_response_type_v01_ei, }, + { + .data_type = QMI_OPT_FLAG, + .elem_len = 1, + .elem_size = sizeof(u8), + .array_type = NO_ARRAY, + .tlv_type = 0x10, + .offset = offsetof(struct + wlfw_bdf_download_resp_msg_v01, + host_bdf_data_valid), + }, + { + .data_type = QMI_UNSIGNED_8_BYTE, + .elem_len = 1, + .elem_size = sizeof(u64), + .array_type = NO_ARRAY, + .tlv_type = 0x10, + .offset = offsetof(struct + wlfw_bdf_download_resp_msg_v01, + host_bdf_data), + }, { .data_type = QMI_EOTI, .array_type = NO_ARRAY, @@ -4287,7 +4361,25 @@ struct qmi_elem_info wlfw_soc_wake_resp_msg_v01_ei[] = { }, }; -struct qmi_elem_info wlfw_exit_power_save_req_msg_v01_ei[] = { +struct qmi_elem_info wlfw_power_save_req_msg_v01_ei[] = { + { + .data_type = QMI_OPT_FLAG, + .elem_len = 1, + .elem_size = sizeof(u8), + .array_type = NO_ARRAY, + .tlv_type = 0x10, + .offset = offsetof(struct wlfw_power_save_req_msg_v01, + power_save_mode_valid), + }, + { + .data_type = QMI_SIGNED_4_BYTE_ENUM, + .elem_len = 1, + .elem_size = sizeof(enum wlfw_power_save_mode_v01), + .array_type = NO_ARRAY, + .tlv_type = 0x10, + .offset = offsetof(struct wlfw_power_save_req_msg_v01, + power_save_mode), + }, { .data_type = QMI_EOTI, .array_type = NO_ARRAY, @@ -4295,21 +4387,20 @@ struct qmi_elem_info wlfw_exit_power_save_req_msg_v01_ei[] = { }, }; -struct qmi_elem_info wlfw_exit_power_save_resp_msg_v01_ei[] = { +struct qmi_elem_info wlfw_power_save_resp_msg_v01_ei[] = { { .data_type = QMI_STRUCT, .elem_len = 1, .elem_size = sizeof(struct qmi_response_type_v01), .array_type = NO_ARRAY, .tlv_type = 0x02, - .offset = offsetof(struct - wlfw_exit_power_save_resp_msg_v01, + .offset = offsetof(struct wlfw_power_save_resp_msg_v01, resp), .ei_array = qmi_response_type_v01_ei, }, { .data_type = QMI_EOTI, - .array_type = NO_ARRAY, + .array_type = NO_ARRAY, .tlv_type = QMI_COMMON_TLV_TYPE, }, }; @@ -4441,3 +4532,49 @@ struct qmi_elem_info wlfw_wfc_call_twt_config_ind_msg_v01_ei[] = { .tlv_type = QMI_COMMON_TLV_TYPE, }, }; + +struct qmi_elem_info wlfw_qdss_mem_ready_ind_msg_v01_ei[] = { + { + .data_type = QMI_EOTI, + .array_type = NO_ARRAY, + .tlv_type = QMI_COMMON_TLV_TYPE, + }, +}; + +struct qmi_elem_info wlfw_pcie_gen_switch_req_msg_v01_ei[] = { + { + .data_type = QMI_SIGNED_4_BYTE_ENUM, + .elem_len = 1, + .elem_size = sizeof(enum wlfw_pcie_gen_speed_v01), + .array_type = NO_ARRAY, + .tlv_type = 0x01, + .offset = offsetof(struct + wlfw_pcie_gen_switch_req_msg_v01, + pcie_speed), + }, + { + .data_type = QMI_EOTI, + .array_type = NO_ARRAY, + .tlv_type = QMI_COMMON_TLV_TYPE, + }, +}; + +struct qmi_elem_info wlfw_pcie_gen_switch_resp_msg_v01_ei[] = { + { + .data_type = QMI_STRUCT, + .elem_len = 1, + .elem_size = sizeof(struct qmi_response_type_v01), + .array_type = NO_ARRAY, + .tlv_type = 0x02, + .offset = offsetof(struct + wlfw_pcie_gen_switch_resp_msg_v01, + resp), + .ei_array = qmi_response_type_v01_ei, + }, + { + .data_type = QMI_EOTI, + .array_type = NO_ARRAY, + .tlv_type = QMI_COMMON_TLV_TYPE, + }, +}; + diff --git a/drivers/soc/qcom/icnss2/wlan_firmware_service_v01.h b/drivers/soc/qcom/icnss2/wlan_firmware_service_v01.h index 4c2e5d8530b3..aac8403d11c3 100644 --- a/drivers/soc/qcom/icnss2/wlan_firmware_service_v01.h +++ b/drivers/soc/qcom/icnss2/wlan_firmware_service_v01.h @@ -9,89 +9,96 @@ #define WLFW_SERVICE_ID_V01 0x45 #define WLFW_SERVICE_VERS_V01 0x01 -#define QMI_WLFW_WFC_CALL_STATUS_REQ_V01 0x0049 -#define QMI_WLFW_DEVICE_INFO_RESP_V01 0x004C -#define QMI_WLFW_BDF_DOWNLOAD_REQ_V01 0x0025 -#define QMI_WLFW_FW_MEM_READY_IND_V01 0x0037 -#define QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01 0x0044 -#define QMI_WLFW_GET_INFO_REQ_V01 0x004A -#define QMI_WLFW_INITIATE_CAL_UPDATE_IND_V01 0x002A -#define QMI_WLFW_CAL_DONE_IND_V01 0x003E -#define QMI_WLFW_M3_DUMP_UPLOAD_REQ_IND_V01 0x004D -#define QMI_WLFW_WFC_CALL_STATUS_RESP_V01 0x0049 -#define QMI_WLFW_HOST_CAP_REQ_V01 0x0034 -#define QMI_WLFW_DYNAMIC_FEATURE_MASK_RESP_V01 0x003B -#define QMI_WLFW_M3_INFO_REQ_V01 0x003C +#define QMI_WLFW_POWER_SAVE_RESP_V01 0x0050 #define QMI_WLFW_CAP_REQ_V01 0x0024 -#define QMI_WLFW_FW_INIT_DONE_IND_V01 0x0038 -#define QMI_WLFW_ANTENNA_GRANT_RESP_V01 0x0048 #define QMI_WLFW_CAL_REPORT_REQ_V01 0x0026 -#define QMI_WLFW_RESPOND_GET_INFO_IND_V01 0x004B #define QMI_WLFW_M3_INFO_RESP_V01 0x003C -#define QMI_WLFW_CAL_UPDATE_RESP_V01 0x0029 -#define QMI_WLFW_M3_DUMP_UPLOAD_DONE_RESP_V01 0x004E -#define QMI_WLFW_CAL_DOWNLOAD_RESP_V01 0x0027 -#define QMI_WLFW_XO_CAL_IND_V01 0x003D -#define QMI_WLFW_INI_RESP_V01 0x002F #define QMI_WLFW_CAL_REPORT_RESP_V01 0x0026 -#define QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01 0x0040 -#define QMI_WLFW_ANTENNA_SWITCH_REQ_V01 0x0047 -#define QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01 0x003F -#define QMI_WLFW_SHUTDOWN_RESP_V01 0x0043 #define QMI_WLFW_MAC_ADDR_RESP_V01 0x0033 -#define QMI_WLFW_INITIATE_CAL_DOWNLOAD_IND_V01 0x0028 +#define QMI_WLFW_DYNAMIC_FEATURE_MASK_RESP_V01 0x003B +#define QMI_WLFW_IND_REGISTER_REQ_V01 0x0020 +#define QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01 0x003B +#define QMI_WLFW_QDSS_TRACE_MODE_RESP_V01 0x0045 +#define QMI_WLFW_FW_READY_IND_V01 0x0021 +#define QMI_WLFW_QDSS_TRACE_MEM_INFO_RESP_V01 0x0040 +#define QMI_WLFW_CAL_UPDATE_REQ_V01 0x0029 +#define QMI_WLFW_REQUEST_MEM_IND_V01 0x0035 +#define QMI_WLFW_QDSS_TRACE_DATA_RESP_V01 0x0042 +#define QMI_WLFW_RESPOND_MEM_RESP_V01 0x0036 +#define QMI_WLFW_VBATT_RESP_V01 0x0032 +#define QMI_WLFW_QDSS_TRACE_MODE_REQ_V01 0x0045 +#define QMI_WLFW_CAL_DOWNLOAD_REQ_V01 0x0027 +#define QMI_WLFW_IND_REGISTER_RESP_V01 0x0020 +#define QMI_WLFW_CAL_UPDATE_RESP_V01 0x0029 +#define QMI_WLFW_M3_INFO_REQ_V01 0x003C +#define QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01 0x0053 +#define QMI_WLFW_ANTENNA_GRANT_RESP_V01 0x0048 +#define QMI_WLFW_INITIATE_CAL_UPDATE_IND_V01 0x002A +#define QMI_WLFW_RESPOND_MEM_REQ_V01 0x0036 #define QMI_WLFW_HOST_CAP_RESP_V01 0x0034 #define QMI_WLFW_MSA_READY_IND_V01 0x002B -#define QMI_WLFW_ATHDIAG_WRITE_RESP_V01 0x0031 -#define QMI_WLFW_EXIT_POWER_SAVE_REQ_V01 0x0050 #define QMI_WLFW_WLAN_MODE_REQ_V01 0x0022 -#define QMI_WLFW_IND_REGISTER_REQ_V01 0x0020 #define QMI_WLFW_WLAN_CFG_RESP_V01 0x0023 -#define QMI_WLFW_QDSS_TRACE_MODE_REQ_V01 0x0045 -#define QMI_WLFW_REQUEST_MEM_IND_V01 0x0035 -#define QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_RESP_V01 0x0044 -#define QMI_WLFW_SOC_WAKE_RESP_V01 0x004F #define QMI_WLFW_REJUVENATE_IND_V01 0x0039 -#define QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01 0x003B #define QMI_WLFW_ATHDIAG_WRITE_REQ_V01 0x0031 -#define QMI_WLFW_WLAN_MODE_RESP_V01 0x0022 -#define QMI_WLFW_RESPOND_MEM_REQ_V01 0x0036 -#define QMI_WLFW_GET_INFO_RESP_V01 0x004A -#define QMI_WLFW_QDSS_TRACE_MODE_RESP_V01 0x0045 +#define QMI_WLFW_SOC_WAKE_REQ_V01 0x004F #define QMI_WLFW_PIN_CONNECT_RESULT_IND_V01 0x002C -#define QMI_WLFW_FW_READY_IND_V01 0x0021 +#define QMI_WLFW_M3_DUMP_UPLOAD_DONE_RESP_V01 0x004E #define QMI_WLFW_QDSS_TRACE_SAVE_IND_V01 0x0041 -#define QMI_WLFW_QDSS_TRACE_MEM_INFO_RESP_V01 0x0040 -#define QMI_WLFW_ANTENNA_GRANT_REQ_V01 0x0048 -#define QMI_WLFW_MSA_READY_RESP_V01 0x002E -#define QMI_WLFW_QDSS_TRACE_DATA_REQ_V01 0x0042 -#define QMI_WLFW_CAL_UPDATE_REQ_V01 0x0029 -#define QMI_WLFW_INI_REQ_V01 0x002F #define QMI_WLFW_BDF_DOWNLOAD_RESP_V01 0x0025 #define QMI_WLFW_REJUVENATE_ACK_RESP_V01 0x003A #define QMI_WLFW_MSA_INFO_RESP_V01 0x002D -#define QMI_WLFW_MSA_READY_REQ_V01 0x002E -#define QMI_WLFW_QDSS_TRACE_DATA_RESP_V01 0x0042 -#define QMI_WLFW_M3_DUMP_UPLOAD_DONE_REQ_V01 0x004E -#define QMI_WLFW_CAP_RESP_V01 0x0024 -#define QMI_WLFW_SOC_WAKE_REQ_V01 0x004F -#define QMI_WLFW_REJUVENATE_ACK_REQ_V01 0x003A -#define QMI_WLFW_ATHDIAG_READ_RESP_V01 0x0030 #define QMI_WLFW_SHUTDOWN_REQ_V01 0x0043 #define QMI_WLFW_VBATT_REQ_V01 0x0032 +#define QMI_WLFW_MAC_ADDR_REQ_V01 0x0033 +#define QMI_WLFW_WLAN_CFG_REQ_V01 0x0023 +#define QMI_WLFW_ANTENNA_GRANT_REQ_V01 0x0048 +#define QMI_WLFW_BDF_DOWNLOAD_REQ_V01 0x0025 +#define QMI_WLFW_FW_MEM_READY_IND_V01 0x0037 +#define QMI_WLFW_RESPOND_GET_INFO_IND_V01 0x004B +#define QMI_WLFW_QDSS_TRACE_DATA_REQ_V01 0x0042 +#define QMI_WLFW_CAL_DOWNLOAD_RESP_V01 0x0027 +#define QMI_WLFW_INI_RESP_V01 0x002F +#define QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01 0x0040 +#define QMI_WLFW_ANTENNA_SWITCH_REQ_V01 0x0047 +#define QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01 0x003F +#define QMI_WLFW_INITIATE_CAL_DOWNLOAD_IND_V01 0x0028 +#define QMI_WLFW_ATHDIAG_WRITE_RESP_V01 0x0031 +#define QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_RESP_V01 0x0044 +#define QMI_WLFW_SOC_WAKE_RESP_V01 0x004F +#define QMI_WLFW_GET_INFO_RESP_V01 0x004A +#define QMI_WLFW_PCIE_GEN_SWITCH_RESP_V01 0x0053 +#define QMI_WLFW_INI_REQ_V01 0x002F +#define QMI_WLFW_MSA_READY_REQ_V01 0x002E +#define QMI_WLFW_M3_DUMP_UPLOAD_DONE_REQ_V01 0x004E +#define QMI_WLFW_CAP_RESP_V01 0x0024 +#define QMI_WLFW_REJUVENATE_ACK_REQ_V01 0x003A +#define QMI_WLFW_ATHDIAG_READ_RESP_V01 0x0030 #define QMI_WLFW_ANTENNA_SWITCH_RESP_V01 0x0047 #define QMI_WLFW_DEVICE_INFO_REQ_V01 0x004C -#define QMI_WLFW_MAC_ADDR_REQ_V01 0x0033 -#define QMI_WLFW_EXIT_POWER_SAVE_RESP_V01 0x0050 -#define QMI_WLFW_RESPOND_MEM_RESP_V01 0x0036 -#define QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01 0x0051 -#define QMI_WLFW_VBATT_RESP_V01 0x0032 #define QMI_WLFW_MSA_INFO_REQ_V01 0x002D -#define QMI_WLFW_QDSS_TRACE_FREE_IND_V01 0x0046 -#define QMI_WLFW_CAL_DOWNLOAD_REQ_V01 0x0027 +#define QMI_WLFW_HOST_CAP_REQ_V01 0x0034 +#define QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01 0x0044 +#define QMI_WLFW_GET_INFO_REQ_V01 0x004A +#define QMI_WLFW_CAL_DONE_IND_V01 0x003E +#define QMI_WLFW_M3_DUMP_UPLOAD_REQ_IND_V01 0x004D +#define QMI_WLFW_WFC_CALL_STATUS_RESP_V01 0x0049 +#define QMI_WLFW_FW_INIT_DONE_IND_V01 0x0038 +#define QMI_WLFW_POWER_SAVE_REQ_V01 0x0050 +#define QMI_WLFW_XO_CAL_IND_V01 0x003D +#define QMI_WLFW_SHUTDOWN_RESP_V01 0x0043 #define QMI_WLFW_ATHDIAG_READ_REQ_V01 0x0030 #define QMI_WLFW_WLAN_CFG_REQ_V01 0x0023 #define QMI_WLFW_IND_REGISTER_RESP_V01 0x0020 +#define QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01 0x0053 +#define QMI_WLFW_PCIE_GEN_SWITCH_RESP_V01 0x0053 +#define QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01 0x0051 +#define QMI_WLFW_WLAN_MODE_RESP_V01 0x0022 +#define QMI_WLFW_WFC_CALL_STATUS_REQ_V01 0x0049 +#define QMI_WLFW_DEVICE_INFO_RESP_V01 0x004C +#define QMI_WLFW_MSA_READY_RESP_V01 0x002E +#define QMI_WLFW_QDSS_TRACE_FREE_IND_V01 0x0046 +#define QMI_WLFW_QDSS_MEM_READY_IND_V01 0x0052 #define QMI_WLFW_MAX_NUM_MEMORY_REGIONS_V01 2 #define QMI_WLFW_MAX_NUM_MEM_SEG_V01 32 @@ -123,6 +130,7 @@ enum wlfw_driver_mode_enum_v01 { QMI_WLFW_CCPM_V01 = 5, QMI_WLFW_QVIT_V01 = 6, QMI_WLFW_CALIBRATION_V01 = 7, + QMI_WLFW_FTM_CALIBRATION_V01 = 10, WLFW_DRIVER_MODE_ENUM_MAX_VAL_V01 = INT_MAX, }; @@ -197,6 +205,30 @@ enum wlfw_qmi_param_value_v01 { WLFW_QMI_PARAM_VALUE_MAX_VAL_V01 = INT_MAX, }; +enum wlfw_rd_card_chain_cap_v01 { + WLFW_RD_CARD_CHAIN_CAP_MIN_VAL_V01 = INT_MIN, + WLFW_RD_CARD_CHAIN_CAP_UNSPECIFIED_V01 = 0, + WLFW_RD_CARD_CHAIN_CAP_1x1_V01 = 1, + WLFW_RD_CARD_CHAIN_CAP_2x2_V01 = 2, + WLFW_RD_CARD_CHAIN_CAP_MAX_VAL_V01 = INT_MAX, +}; + +enum wlfw_pcie_gen_speed_v01 { + WLFW_PCIE_GEN_SPEED_MIN_VAL_V01 = INT_MIN, + QMI_PCIE_GEN_SPEED_INVALID_V01 = 0, + QMI_PCIE_GEN_SPEED_1_V01 = 1, + QMI_PCIE_GEN_SPEED_2_V01 = 2, + QMI_PCIE_GEN_SPEED_3_V01 = 3, + WLFW_PCIE_GEN_SPEED_MAX_VAL_V01 = INT_MAX, +}; + +enum wlfw_power_save_mode_v01 { + WLFW_POWER_SAVE_MODE_MIN_VAL_V01 = INT_MIN, + WLFW_POWER_SAVE_ENTER_V01 = 0, + WLFW_POWER_SAVE_EXIT_V01 = 1, + WLFW_POWER_SAVE_MODE_MAX_VAL_V01 = INT_MAX, +}; + #define QMI_WLFW_CE_ATTR_FLAGS_V01 ((u32)0x00) #define QMI_WLFW_CE_ATTR_NO_SNOOP_V01 ((u32)0x01) #define QMI_WLFW_CE_ATTR_BYTE_SWAP_DATA_V01 ((u32)0x02) @@ -212,6 +244,11 @@ enum wlfw_qmi_param_value_v01 { #define QMI_WLFW_FW_REJUVENATE_V01 ((u64)0x01ULL) +#define QMI_WLFW_HW_XPA_V01 ((u64)0x01ULL) +#define QMI_WLFW_CBC_FILE_DOWNLOAD_V01 ((u64)0x02ULL) + +#define QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01 ((u64)0x01ULL) + struct wlfw_ce_tgt_pipe_cfg_s_v01 { u32 pipe_num; enum wlfw_pipedir_enum_v01 pipe_dir; @@ -331,9 +368,11 @@ struct wlfw_ind_register_req_msg_v01 { u8 m3_dump_upload_req_enable; u8 wfc_call_twt_config_enable_valid; u8 wfc_call_twt_config_enable; + u8 qdss_mem_ready_enable_valid; + u8 qdss_mem_ready_enable; }; -#define WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN 78 +#define WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN 82 extern struct qmi_elem_info wlfw_ind_register_req_msg_v01_ei[]; struct wlfw_ind_register_resp_msg_v01 { @@ -341,14 +380,12 @@ struct wlfw_ind_register_resp_msg_v01 { u8 fw_status_valid; u64 fw_status; }; - #define WLFW_IND_REGISTER_RESP_MSG_V01_MAX_MSG_LEN 18 extern struct qmi_elem_info wlfw_ind_register_resp_msg_v01_ei[]; struct wlfw_fw_ready_ind_msg_v01 { char placeholder; }; - #define WLFW_FW_READY_IND_MSG_V01_MAX_MSG_LEN 0 extern struct qmi_elem_info wlfw_fw_ready_ind_msg_v01_ei[]; @@ -358,7 +395,6 @@ struct wlfw_msa_ready_ind_msg_v01 { u8 hang_data_length_valid; u16 hang_data_length; }; - #define WLFW_MSA_READY_IND_MSG_V01_MAX_MSG_LEN 12 extern struct qmi_elem_info wlfw_msa_ready_ind_msg_v01_ei[]; @@ -370,7 +406,6 @@ struct wlfw_pin_connect_result_ind_msg_v01 { u8 rf_pin_result_valid; u32 rf_pin_result; }; - #define WLFW_PIN_CONNECT_RESULT_IND_MSG_V01_MAX_MSG_LEN 21 extern struct qmi_elem_info wlfw_pin_connect_result_ind_msg_v01_ei[]; @@ -379,14 +414,12 @@ struct wlfw_wlan_mode_req_msg_v01 { u8 hw_debug_valid; u8 hw_debug; }; - #define WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN 11 extern struct qmi_elem_info wlfw_wlan_mode_req_msg_v01_ei[]; struct wlfw_wlan_mode_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_WLAN_MODE_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_wlan_mode_resp_msg_v01_ei[]; @@ -413,21 +446,18 @@ struct wlfw_wlan_cfg_req_msg_v01 { u32 msi_cfg_len; struct wlfw_msi_cfg_s_v01 msi_cfg[QMI_WLFW_MAX_NUM_CE_V01]; }; - #define WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN 866 extern struct qmi_elem_info wlfw_wlan_cfg_req_msg_v01_ei[]; struct wlfw_wlan_cfg_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_WLAN_CFG_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_wlan_cfg_resp_msg_v01_ei[]; struct wlfw_cap_req_msg_v01 { char placeholder; }; - #define WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN 0 extern struct qmi_elem_info wlfw_cap_req_msg_v01_ei[]; @@ -453,9 +483,13 @@ struct wlfw_cap_resp_msg_v01 { u32 otp_version; u8 eeprom_caldata_read_timeout_valid; u32 eeprom_caldata_read_timeout; + u8 fw_caps_valid; + u64 fw_caps; + u8 rd_card_chain_cap_valid; + enum wlfw_rd_card_chain_cap_v01 rd_card_chain_cap; }; -#define WLFW_CAP_RESP_MSG_V01_MAX_MSG_LEN 235 +#define WLFW_CAP_RESP_MSG_V01_MAX_MSG_LEN 253 extern struct qmi_elem_info wlfw_cap_resp_msg_v01_ei[]; struct wlfw_bdf_download_req_msg_v01 { @@ -474,15 +508,16 @@ struct wlfw_bdf_download_req_msg_v01 { u8 bdf_type_valid; u8 bdf_type; }; - #define WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN 6182 extern struct qmi_elem_info wlfw_bdf_download_req_msg_v01_ei[]; struct wlfw_bdf_download_resp_msg_v01 { struct qmi_response_type_v01 resp; + u8 host_bdf_data_valid; + u64 host_bdf_data; }; -#define WLFW_BDF_DOWNLOAD_RESP_MSG_V01_MAX_MSG_LEN 7 +#define WLFW_BDF_DOWNLOAD_RESP_MSG_V01_MAX_MSG_LEN 18 extern struct qmi_elem_info wlfw_bdf_download_resp_msg_v01_ei[]; struct wlfw_cal_report_req_msg_v01 { @@ -493,14 +528,12 @@ struct wlfw_cal_report_req_msg_v01 { u8 cal_remove_supported_valid; u8 cal_remove_supported; }; - #define WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN 32 extern struct qmi_elem_info wlfw_cal_report_req_msg_v01_ei[]; struct wlfw_cal_report_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_CAL_REPORT_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_cal_report_resp_msg_v01_ei[]; @@ -511,7 +544,6 @@ struct wlfw_initiate_cal_download_ind_msg_v01 { u8 cal_data_location_valid; u32 cal_data_location; }; - #define WLFW_INITIATE_CAL_DOWNLOAD_IND_MSG_V01_MAX_MSG_LEN 21 extern struct qmi_elem_info wlfw_initiate_cal_download_ind_msg_v01_ei[]; @@ -531,14 +563,12 @@ struct wlfw_cal_download_req_msg_v01 { u8 cal_data_location_valid; u32 cal_data_location; }; - #define WLFW_CAL_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN 6185 extern struct qmi_elem_info wlfw_cal_download_req_msg_v01_ei[]; struct wlfw_cal_download_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_CAL_DOWNLOAD_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_cal_download_resp_msg_v01_ei[]; @@ -548,7 +578,6 @@ struct wlfw_initiate_cal_update_ind_msg_v01 { u8 cal_data_location_valid; u32 cal_data_location; }; - #define WLFW_INITIATE_CAL_UPDATE_IND_MSG_V01_MAX_MSG_LEN 21 extern struct qmi_elem_info wlfw_initiate_cal_update_ind_msg_v01_ei[]; @@ -556,7 +585,6 @@ struct wlfw_cal_update_req_msg_v01 { enum wlfw_cal_temp_id_enum_v01 cal_id; u32 seg_id; }; - #define WLFW_CAL_UPDATE_REQ_MSG_V01_MAX_MSG_LEN 14 extern struct qmi_elem_info wlfw_cal_update_req_msg_v01_ei[]; @@ -576,7 +604,6 @@ struct wlfw_cal_update_resp_msg_v01 { u8 cal_data_location_valid; u32 cal_data_location; }; - #define WLFW_CAL_UPDATE_RESP_MSG_V01_MAX_MSG_LEN 6188 extern struct qmi_elem_info wlfw_cal_update_resp_msg_v01_ei[]; @@ -584,7 +611,6 @@ struct wlfw_msa_info_req_msg_v01 { u64 msa_addr; u32 size; }; - #define WLFW_MSA_INFO_REQ_MSG_V01_MAX_MSG_LEN 18 extern struct qmi_elem_info wlfw_msa_info_req_msg_v01_ei[]; @@ -594,21 +620,18 @@ struct wlfw_msa_info_resp_msg_v01 { struct wlfw_memory_region_info_s_v01 mem_region_info[QMI_WLFW_MAX_NUM_MEMORY_REGIONS_V01]; }; - #define WLFW_MSA_INFO_RESP_MSG_V01_MAX_MSG_LEN 37 extern struct qmi_elem_info wlfw_msa_info_resp_msg_v01_ei[]; struct wlfw_msa_ready_req_msg_v01 { char placeholder; }; - #define WLFW_MSA_READY_REQ_MSG_V01_MAX_MSG_LEN 0 extern struct qmi_elem_info wlfw_msa_ready_req_msg_v01_ei[]; struct wlfw_msa_ready_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_MSA_READY_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_msa_ready_resp_msg_v01_ei[]; @@ -616,14 +639,12 @@ struct wlfw_ini_req_msg_v01 { u8 enablefwlog_valid; u8 enablefwlog; }; - #define WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN 4 extern struct qmi_elem_info wlfw_ini_req_msg_v01_ei[]; struct wlfw_ini_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_INI_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_ini_resp_msg_v01_ei[]; @@ -632,7 +653,6 @@ struct wlfw_athdiag_read_req_msg_v01 { u32 mem_type; u32 data_len; }; - #define WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN 21 extern struct qmi_elem_info wlfw_athdiag_read_req_msg_v01_ei[]; @@ -642,7 +662,6 @@ struct wlfw_athdiag_read_resp_msg_v01 { u32 data_len; u8 data[QMI_WLFW_MAX_ATHDIAG_DATA_SIZE_V01]; }; - #define WLFW_ATHDIAG_READ_RESP_MSG_V01_MAX_MSG_LEN 6156 extern struct qmi_elem_info wlfw_athdiag_read_resp_msg_v01_ei[]; @@ -652,28 +671,24 @@ struct wlfw_athdiag_write_req_msg_v01 { u32 data_len; u8 data[QMI_WLFW_MAX_ATHDIAG_DATA_SIZE_V01]; }; - #define WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN 6163 extern struct qmi_elem_info wlfw_athdiag_write_req_msg_v01_ei[]; struct wlfw_athdiag_write_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_ATHDIAG_WRITE_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_athdiag_write_resp_msg_v01_ei[]; struct wlfw_vbatt_req_msg_v01 { u64 voltage_uv; }; - #define WLFW_VBATT_REQ_MSG_V01_MAX_MSG_LEN 11 extern struct qmi_elem_info wlfw_vbatt_req_msg_v01_ei[]; struct wlfw_vbatt_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_VBATT_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_vbatt_resp_msg_v01_ei[]; @@ -681,14 +696,12 @@ struct wlfw_mac_addr_req_msg_v01 { u8 mac_addr_valid; u8 mac_addr[QMI_WLFW_MAC_ADDR_SIZE_V01]; }; - #define WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN 9 extern struct qmi_elem_info wlfw_mac_addr_req_msg_v01_ei[]; struct wlfw_mac_addr_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_MAC_ADDR_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_mac_addr_resp_msg_v01_ei[]; @@ -730,14 +743,12 @@ struct wlfw_host_cap_req_msg_v01 { u8 host_build_type_valid; enum wlfw_host_build_type_v01 host_build_type; }; - #define WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN 319 extern struct qmi_elem_info wlfw_host_cap_req_msg_v01_ei[]; struct wlfw_host_cap_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_HOST_CAP_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_host_cap_resp_msg_v01_ei[]; @@ -745,7 +756,6 @@ struct wlfw_request_mem_ind_msg_v01 { u32 mem_seg_len; struct wlfw_mem_seg_s_v01 mem_seg[QMI_WLFW_MAX_NUM_MEM_SEG_V01]; }; - #define WLFW_REQUEST_MEM_IND_MSG_V01_MAX_MSG_LEN 1124 extern struct qmi_elem_info wlfw_request_mem_ind_msg_v01_ei[]; @@ -753,28 +763,24 @@ struct wlfw_respond_mem_req_msg_v01 { u32 mem_seg_len; struct wlfw_mem_seg_resp_s_v01 mem_seg[QMI_WLFW_MAX_NUM_MEM_SEG_V01]; }; - #define WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN 548 extern struct qmi_elem_info wlfw_respond_mem_req_msg_v01_ei[]; struct wlfw_respond_mem_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_RESPOND_MEM_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_respond_mem_resp_msg_v01_ei[]; struct wlfw_fw_mem_ready_ind_msg_v01 { char placeholder; }; - #define WLFW_FW_MEM_READY_IND_MSG_V01_MAX_MSG_LEN 0 extern struct qmi_elem_info wlfw_fw_mem_ready_ind_msg_v01_ei[]; struct wlfw_fw_init_done_ind_msg_v01 { char placeholder; }; - #define WLFW_FW_INIT_DONE_IND_MSG_V01_MAX_MSG_LEN 0 extern struct qmi_elem_info wlfw_fw_init_done_ind_msg_v01_ei[]; @@ -788,21 +794,18 @@ struct wlfw_rejuvenate_ind_msg_v01 { u8 function_name_valid; char function_name[QMI_WLFW_FUNCTION_NAME_LEN_V01 + 1]; }; - #define WLFW_REJUVENATE_IND_MSG_V01_MAX_MSG_LEN 144 extern struct qmi_elem_info wlfw_rejuvenate_ind_msg_v01_ei[]; struct wlfw_rejuvenate_ack_req_msg_v01 { char placeholder; }; - #define WLFW_REJUVENATE_ACK_REQ_MSG_V01_MAX_MSG_LEN 0 extern struct qmi_elem_info wlfw_rejuvenate_ack_req_msg_v01_ei[]; struct wlfw_rejuvenate_ack_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_REJUVENATE_ACK_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_rejuvenate_ack_resp_msg_v01_ei[]; @@ -810,7 +813,6 @@ struct wlfw_dynamic_feature_mask_req_msg_v01 { u8 mask_valid; u64 mask; }; - #define WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN 11 extern struct qmi_elem_info wlfw_dynamic_feature_mask_req_msg_v01_ei[]; @@ -821,7 +823,6 @@ struct wlfw_dynamic_feature_mask_resp_msg_v01 { u8 curr_mask_valid; u64 curr_mask; }; - #define WLFW_DYNAMIC_FEATURE_MASK_RESP_MSG_V01_MAX_MSG_LEN 29 extern struct qmi_elem_info wlfw_dynamic_feature_mask_resp_msg_v01_ei[]; @@ -829,28 +830,24 @@ struct wlfw_m3_info_req_msg_v01 { u64 addr; u32 size; }; - #define WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN 18 extern struct qmi_elem_info wlfw_m3_info_req_msg_v01_ei[]; struct wlfw_m3_info_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_M3_INFO_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_m3_info_resp_msg_v01_ei[]; struct wlfw_xo_cal_ind_msg_v01 { u8 xo_cal_data; }; - #define WLFW_XO_CAL_IND_MSG_V01_MAX_MSG_LEN 4 extern struct qmi_elem_info wlfw_xo_cal_ind_msg_v01_ei[]; struct wlfw_cal_done_ind_msg_v01 { char placeholder; }; - #define WLFW_CAL_DONE_IND_MSG_V01_MAX_MSG_LEN 0 extern struct qmi_elem_info wlfw_cal_done_ind_msg_v01_ei[]; @@ -858,7 +855,6 @@ struct wlfw_qdss_trace_req_mem_ind_msg_v01 { u32 mem_seg_len; struct wlfw_mem_seg_s_v01 mem_seg[QMI_WLFW_MAX_NUM_MEM_SEG_V01]; }; - #define WLFW_QDSS_TRACE_REQ_MEM_IND_MSG_V01_MAX_MSG_LEN 1124 extern struct qmi_elem_info wlfw_qdss_trace_req_mem_ind_msg_v01_ei[]; @@ -866,14 +862,12 @@ struct wlfw_qdss_trace_mem_info_req_msg_v01 { u32 mem_seg_len; struct wlfw_mem_seg_resp_s_v01 mem_seg[QMI_WLFW_MAX_NUM_MEM_SEG_V01]; }; - #define WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN 548 extern struct qmi_elem_info wlfw_qdss_trace_mem_info_req_msg_v01_ei[]; struct wlfw_qdss_trace_mem_info_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_QDSS_TRACE_MEM_INFO_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_qdss_trace_mem_info_resp_msg_v01_ei[]; @@ -886,14 +880,12 @@ struct wlfw_qdss_trace_save_ind_msg_v01 { u8 file_name_valid; char file_name[QMI_WLFW_MAX_STR_LEN_V01 + 1]; }; - #define WLFW_QDSS_TRACE_SAVE_IND_MSG_V01_MAX_MSG_LEN 581 extern struct qmi_elem_info wlfw_qdss_trace_save_ind_msg_v01_ei[]; struct wlfw_qdss_trace_data_req_msg_v01 { u32 seg_id; }; - #define WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_qdss_trace_data_req_msg_v01_ei[]; @@ -909,7 +901,6 @@ struct wlfw_qdss_trace_data_resp_msg_v01 { u8 end_valid; u8 end; }; - #define WLFW_QDSS_TRACE_DATA_RESP_MSG_V01_MAX_MSG_LEN 6174 extern struct qmi_elem_info wlfw_qdss_trace_data_resp_msg_v01_ei[]; @@ -924,14 +915,12 @@ struct wlfw_qdss_trace_config_download_req_msg_v01 { u8 end_valid; u8 end; }; - #define WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN 6167 extern struct qmi_elem_info wlfw_qdss_trace_config_download_req_msg_v01_ei[]; struct wlfw_qdss_trace_config_download_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_qdss_trace_config_download_resp_msg_v01_ei[]; @@ -943,14 +932,12 @@ struct wlfw_qdss_trace_mode_req_msg_v01 { u8 hw_trc_disable_override_valid; enum wlfw_qmi_param_value_v01 hw_trc_disable_override; }; - #define WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN 25 extern struct qmi_elem_info wlfw_qdss_trace_mode_req_msg_v01_ei[]; struct wlfw_qdss_trace_mode_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_QDSS_TRACE_MODE_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_qdss_trace_mode_resp_msg_v01_ei[]; @@ -959,7 +946,6 @@ struct wlfw_qdss_trace_free_ind_msg_v01 { u32 mem_seg_len; struct wlfw_mem_seg_resp_s_v01 mem_seg[QMI_WLFW_MAX_NUM_MEM_SEG_V01]; }; - #define WLFW_QDSS_TRACE_FREE_IND_MSG_V01_MAX_MSG_LEN 548 extern struct qmi_elem_info wlfw_qdss_trace_free_ind_msg_v01_ei[]; @@ -967,21 +953,18 @@ struct wlfw_shutdown_req_msg_v01 { u8 shutdown_valid; u8 shutdown; }; - #define WLFW_SHUTDOWN_REQ_MSG_V01_MAX_MSG_LEN 4 extern struct qmi_elem_info wlfw_shutdown_req_msg_v01_ei[]; struct wlfw_shutdown_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_SHUTDOWN_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_shutdown_resp_msg_v01_ei[]; struct wlfw_antenna_switch_req_msg_v01 { char placeholder; }; - #define WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN 0 extern struct qmi_elem_info wlfw_antenna_switch_req_msg_v01_ei[]; @@ -990,7 +973,6 @@ struct wlfw_antenna_switch_resp_msg_v01 { u8 antenna_valid; u64 antenna; }; - #define WLFW_ANTENNA_SWITCH_RESP_MSG_V01_MAX_MSG_LEN 18 extern struct qmi_elem_info wlfw_antenna_switch_resp_msg_v01_ei[]; @@ -998,14 +980,12 @@ struct wlfw_antenna_grant_req_msg_v01 { u8 grant_valid; u64 grant; }; - #define WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN 11 extern struct qmi_elem_info wlfw_antenna_grant_req_msg_v01_ei[]; struct wlfw_antenna_grant_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_ANTENNA_GRANT_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_antenna_grant_resp_msg_v01_ei[]; @@ -1025,14 +1005,12 @@ struct wlfw_wfc_call_status_req_msg_v01 { u8 media_quality_valid; enum wlfw_wfc_media_quality_v01 media_quality; }; - #define WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN 296 extern struct qmi_elem_info wlfw_wfc_call_status_req_msg_v01_ei[]; struct wlfw_wfc_call_status_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_WFC_CALL_STATUS_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_wfc_call_status_resp_msg_v01_ei[]; @@ -1041,14 +1019,12 @@ struct wlfw_get_info_req_msg_v01 { u32 data_len; u8 data[QMI_WLFW_MAX_DATA_SIZE_V01]; }; - #define WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN 6153 extern struct qmi_elem_info wlfw_get_info_req_msg_v01_ei[]; struct wlfw_get_info_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_GET_INFO_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_get_info_resp_msg_v01_ei[]; @@ -1062,14 +1038,12 @@ struct wlfw_respond_get_info_ind_msg_v01 { u8 seq_no_valid; u32 seq_no; }; - #define WLFW_RESPOND_GET_INFO_IND_MSG_V01_MAX_MSG_LEN 6164 extern struct qmi_elem_info wlfw_respond_get_info_ind_msg_v01_ei[]; struct wlfw_device_info_req_msg_v01 { char placeholder; }; - #define WLFW_DEVICE_INFO_REQ_MSG_V01_MAX_MSG_LEN 0 extern struct qmi_elem_info wlfw_device_info_req_msg_v01_ei[]; @@ -1080,7 +1054,6 @@ struct wlfw_device_info_resp_msg_v01 { u8 bar_size_valid; u32 bar_size; }; - #define WLFW_DEVICE_INFO_RESP_MSG_V01_MAX_MSG_LEN 25 extern struct qmi_elem_info wlfw_device_info_resp_msg_v01_ei[]; @@ -1089,7 +1062,6 @@ struct wlfw_m3_dump_upload_req_ind_msg_v01 { u64 addr; u64 size; }; - #define WLFW_M3_DUMP_UPLOAD_REQ_IND_MSG_V01_MAX_MSG_LEN 29 extern struct qmi_elem_info wlfw_m3_dump_upload_req_ind_msg_v01_ei[]; @@ -1097,14 +1069,12 @@ struct wlfw_m3_dump_upload_done_req_msg_v01 { u32 pdev_id; u32 status; }; - #define WLFW_M3_DUMP_UPLOAD_DONE_REQ_MSG_V01_MAX_MSG_LEN 14 extern struct qmi_elem_info wlfw_m3_dump_upload_done_req_msg_v01_ei[]; struct wlfw_m3_dump_upload_done_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_M3_DUMP_UPLOAD_DONE_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_m3_dump_upload_done_resp_msg_v01_ei[]; @@ -1112,30 +1082,29 @@ struct wlfw_soc_wake_req_msg_v01 { u8 wake_valid; enum wlfw_soc_wake_enum_v01 wake; }; - #define WLFW_SOC_WAKE_REQ_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_soc_wake_req_msg_v01_ei[]; struct wlfw_soc_wake_resp_msg_v01 { struct qmi_response_type_v01 resp; }; - #define WLFW_SOC_WAKE_RESP_MSG_V01_MAX_MSG_LEN 7 extern struct qmi_elem_info wlfw_soc_wake_resp_msg_v01_ei[]; -struct wlfw_exit_power_save_req_msg_v01 { - char placeholder; +struct wlfw_power_save_req_msg_v01 { + u8 power_save_mode_valid; + enum wlfw_power_save_mode_v01 power_save_mode; }; -#define WLFW_EXIT_POWER_SAVE_REQ_MSG_V01_MAX_MSG_LEN 0 -extern struct qmi_elem_info wlfw_exit_power_save_req_msg_v01_ei[]; +#define WLFW_POWER_SAVE_REQ_MSG_V01_MAX_MSG_LEN 7 +extern struct qmi_elem_info wlfw_power_save_req_msg_v01_ei[]; -struct wlfw_exit_power_save_resp_msg_v01 { +struct wlfw_power_save_resp_msg_v01 { struct qmi_response_type_v01 resp; }; -#define WLFW_EXIT_POWER_SAVE_RESP_MSG_V01_MAX_MSG_LEN 7 -extern struct qmi_elem_info wlfw_exit_power_save_resp_msg_v01_ei[]; +#define WLFW_POWER_SAVE_RESP_MSG_V01_MAX_MSG_LEN 7 +extern struct qmi_elem_info wlfw_power_save_resp_msg_v01_ei[]; struct wlfw_wfc_call_twt_config_ind_msg_v01 { u8 twt_sta_start_valid; @@ -1155,4 +1124,25 @@ struct wlfw_wfc_call_twt_config_ind_msg_v01 { #define WLFW_WFC_CALL_TWT_CONFIG_IND_MSG_V01_MAX_MSG_LEN 35 extern struct qmi_elem_info wlfw_wfc_call_twt_config_ind_msg_v01_ei[]; +struct wlfw_qdss_mem_ready_ind_msg_v01 { + char placeholder; +}; + +#define WLFW_QDSS_MEM_READY_IND_MSG_V01_MAX_MSG_LEN 0 +extern struct qmi_elem_info wlfw_qdss_mem_ready_ind_msg_v01_ei[]; + +struct wlfw_pcie_gen_switch_req_msg_v01 { + enum wlfw_pcie_gen_speed_v01 pcie_speed; +}; + +#define WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN 7 +extern struct qmi_elem_info wlfw_pcie_gen_switch_req_msg_v01_ei[]; + +struct wlfw_pcie_gen_switch_resp_msg_v01 { + struct qmi_response_type_v01 resp; +}; + +#define WLFW_PCIE_GEN_SWITCH_RESP_MSG_V01_MAX_MSG_LEN 7 +extern struct qmi_elem_info wlfw_pcie_gen_switch_resp_msg_v01_ei[]; + #endif