mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie:
"I Was Almost Tempted To Capitalise Every Word, but then I decided I
couldn't read it myself!
I've also got one pull request for the sti driver outstanding. It
relied on a commit in Greg's tree and I didn't find out in time, that
commit is in your tree now so I might send that along once this is
merged.
I also had the accidental misfortune to have access to a Skylake on my
desk for a few days, and I've had to encourage Intel to try harder,
which seems to be happening now.
Here is the main drm-next pull request for 4.4.
Highlights:
New driver:
vc4 driver for the Rasberry Pi VPU.
(From Eric Anholt at Broadcom.)
Core:
Atomic fbdev support
Atomic helpers for runtime pm
dp/aux i2c STATUS_UPDATE handling
struct_mutex usage cleanups.
Generic of probing support.
Documentation:
Kerneldoc for VGA switcheroo code.
Rename to gpu instead of drm to reflect scope.
i915:
Skylake GuC firmware fixes
HPD A support
VBT backlight fallbacks
Fastboot by default for some systems
FBC work
BXT/SKL workarounds
Skylake deeper sleep state fixes
amdgpu:
Enable GPU scheduler by default
New atombios opcodes
GPUVM debugging options
Stoney support.
Fencing cleanups.
radeon:
More efficient CS checking
nouveau:
gk20a instance memory handling improvements.
Improved PGOB detection and GK107 support
Kepler GDDR5 PLL statbility improvement
G8x/GT2xx reclock improvements
new userspace API compatiblity fixes.
virtio-gpu:
Add 3D support - qemu 2.5 has it merged for it's gtk backend.
msm:
Initial msm88896 (snapdragon 8200)
exynos:
HDMI cleanups
Enable mixer driver byt default
Add DECON-TV support
vmwgfx:
Move to using memremap + fixes.
rcar-du:
Add support for R8A7793/4 DU
armada:
Remove support for non-component mode
Improved plane handling
Power savings while in DPMS off.
tda998x:
Remove unused slave encoder support
Use more HDMI helpers
Fix EDID read handling
dwhdmi:
Interlace video mode support for ipu-v3/dw_hdmi
Hotplug state fixes
Audio driver integration
imx:
More color formats support.
tegra:
Minor fixes/improvements"
[ Merge fixup: remove unused variable 'dev' that had all uses removed in
commit 4e270f0880: "drm/gem: Drop struct_mutex requirement from
drm_gem_mmap_obj" ]
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (764 commits)
drm/vmwgfx: Relax irq locking somewhat
drm/vmwgfx: Properly flush cursor updates and page-flips
drm/i915/skl: disable display side power well support for now
drm/i915: Extend DSL readout fix to BDW and SKL.
drm/i915: Do graphics device reset under forcewake
drm/i915: Skip fence installation for objects with rotated views (v4)
vga_switcheroo: Drop client power state VGA_SWITCHEROO_INIT
drm/amdgpu: group together common fence implementation
drm/amdgpu: remove AMDGPU_FENCE_OWNER_MOVE
drm/amdgpu: remove now unused fence functions
drm/amdgpu: fix fence fallback check
drm/amdgpu: fix stoping the scheduler timeout
drm/amdgpu: cleanup on error in amdgpu_cs_ioctl()
drm/i915: Fix locking around GuC firmware load
drm/amdgpu: update Fiji's Golden setting
drm/amdgpu: update Fiji's rev id
drm/amdgpu: extract common code in vi_common_early_init
drm/amd/scheduler: don't oops on failure to load
drm/amdgpu: don't oops on failure to load (v2)
drm/amdgpu: don't VT switch on suspend
...
This commit is contained in:
Linus Torvalds
commit
3e82806b97
468 changed files with 53369 additions and 9828 deletions
65
Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt
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65
Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt
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@ -0,0 +1,65 @@
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Broadcom VC4 (VideoCore4) GPU
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The VC4 device present on the Raspberry Pi includes a display system
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with HDMI output and the HVS (Hardware Video Scaler) for compositing
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display planes.
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Required properties for VC4:
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- compatible: Should be "brcm,bcm2835-vc4"
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Required properties for Pixel Valve:
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- compatible: Should be one of "brcm,bcm2835-pixelvalve0",
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"brcm,bcm2835-pixelvalve1", or "brcm,bcm2835-pixelvalve2"
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- reg: Physical base address and length of the PV's registers
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- interrupts: The interrupt number
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See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
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Required properties for HVS:
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- compatible: Should be "brcm,bcm2835-hvs"
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- reg: Physical base address and length of the HVS's registers
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- interrupts: The interrupt number
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See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
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Required properties for HDMI
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- compatible: Should be "brcm,bcm2835-hdmi"
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- reg: Physical base address and length of the two register ranges
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("HDMI" and "HD", in that order)
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- interrupts: The interrupt numbers
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See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
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- ddc: phandle of the I2C controller used for DDC EDID probing
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- clocks: a) hdmi: The HDMI state machine clock
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b) pixel: The pixel clock.
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Optional properties for HDMI:
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- hpd-gpios: The GPIO pin for HDMI hotplug detect (if it doesn't appear
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as an interrupt/status bit in the HDMI controller
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itself). See bindings/pinctrl/brcm,bcm2835-gpio.txt
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Example:
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pixelvalve@7e807000 {
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compatible = "brcm,bcm2835-pixelvalve2";
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reg = <0x7e807000 0x100>;
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interrupts = <2 10>; /* pixelvalve */
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};
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hvs@7e400000 {
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compatible = "brcm,bcm2835-hvs";
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reg = <0x7e400000 0x6000>;
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interrupts = <2 1>;
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};
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hdmi: hdmi@7e902000 {
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compatible = "brcm,bcm2835-hdmi";
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reg = <0x7e902000 0x600>,
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<0x7e808000 0x100>;
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interrupts = <2 8>, <2 9>;
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ddc = <&i2c2>;
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hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
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clocks = <&clocks BCM2835_PLLH_PIX>,
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<&clocks BCM2835_CLOCK_HSM>;
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clock-names = "pixel", "hdmi";
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};
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vc4: gpu {
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compatible = "brcm,bcm2835-vc4";
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};
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@ -2,6 +2,7 @@ Qualcomm adreno/snapdragon hdmi output
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Required properties:
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- compatible: one of the following
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* "qcom,hdmi-tx-8996"
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* "qcom,hdmi-tx-8994"
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* "qcom,hdmi-tx-8084"
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* "qcom,hdmi-tx-8974"
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@ -21,6 +22,7 @@ Required properties:
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Optional properties:
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- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
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- qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin
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- power-domains: reference to the power domain(s), if available.
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- pinctrl-names: the pin control state names; should contain "default"
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- pinctrl-0: the default pinctrl state (active)
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- pinctrl-1: the "sleep" pinctrl state
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@ -35,6 +37,7 @@ Example:
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reg-names = "core_physical";
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reg = <0x04a00000 0x1000>;
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interrupts = <GIC_SPI 79 0>;
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power-domains = <&mmcc MDSS_GDSC>;
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clock-names =
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"core_clk",
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"master_iface_clk",
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@ -11,13 +11,14 @@ Required properties:
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- clock-names: the following clocks are required:
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* "core_clk"
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* "iface_clk"
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* "lut_clk"
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* "src_clk"
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* "hdmi_clk"
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* "mpd_clk"
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Optional properties:
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- gpus: phandle for gpu device
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- clock-names: the following clocks are optional:
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* "lut_clk"
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Example:
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@ -5,7 +5,9 @@ Required Properties:
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- compatible: must be one of the following.
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- "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
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- "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
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- "renesas,du-r8a7791" for R8A7791 (R-Car M2) compatible DU
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- "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU
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- "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU
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- "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
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- reg: A list of base address and length of each memory resource, one for
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each entry in the reg-names property.
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@ -22,9 +24,9 @@ Required Properties:
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- clock-names: Name of the clocks. This property is model-dependent.
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- R8A7779 uses a single functional clock. The clock doesn't need to be
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named.
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- R8A7790 and R8A7791 use one functional clock per channel and one clock
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per LVDS encoder. The functional clocks must be named "du.x" with "x"
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being the channel numerical index. The LVDS clocks must be named
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- R8A779[0134] use one functional clock per channel and one clock per LVDS
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encoder (if available). The functional clocks must be named "du.x" with
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"x" being the channel numerical index. The LVDS clocks must be named
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"lvds.x" with "x" being the LVDS encoder numerical index.
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- In addition to the functional and encoder clocks, all DU versions also
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support externally supplied pixel clocks. Those clocks are optional.
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@ -43,7 +45,9 @@ corresponding to each DU output.
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-----------------------------------------------------------------------------
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R8A7779 (H1) DPAD 0 DPAD 1 -
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R8A7790 (H2) DPAD LVDS 0 LVDS 1
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R8A7791 (M2) DPAD LVDS 0 -
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R8A7791 (M2-W) DPAD LVDS 0 -
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R8A7793 (M2-N) DPAD LVDS 0 -
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R8A7794 (E2) DPAD 0 DPAD 1 -
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Example: R8A7790 (R-Car H2) DU
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