From 8a9285a50905b0b38c782c3957489cb20212b16a Mon Sep 17 00:00:00 2001 From: George Shen Date: Fri, 28 Feb 2020 13:15:20 -0800 Subject: [PATCH] ARM: dts: msm: Add CVP AXI reset pulse CVP hardware programming guide requires inserting a AXI clock reset pulse in CVP power on sequence. Change-Id: I10dd30b229a6a772a247144986da52c917268e38 --- qcom/lahaina-cvp.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/qcom/lahaina-cvp.dtsi b/qcom/lahaina-cvp.dtsi index d97273a025a2..4d71b71e1dcc 100644 --- a/qcom/lahaina-cvp.dtsi +++ b/qcom/lahaina-cvp.dtsi @@ -28,8 +28,10 @@ qcom,clock-configs = <0x0 0x1 0x1>; qcom,allowed-clock-rates = <280000000 366000000 444000000>; - resets = <&clock_videocc VIDEO_CC_MVS1C_CLK_ARES>; - reset-names = "cvp_core_reset"; + resets = <&clock_gcc GCC_VIDEO_AXI1_CLK_ARES>, + <&clock_videocc VIDEO_CC_MVS1C_CLK_ARES>; + reset-names = "cvp_axi_reset", "cvp_core_reset"; + reset-power-status = <0x2 0x1>; qcom,reg-presets = <0xB0088 0x0>;