From 7fbf5d40ebba18209c039b3496932742b44d3fe2 Mon Sep 17 00:00:00 2001
From: Odelu Kukatla <okukatla@qti.qualcomm.com>
Date: Tue, 17 Nov 2020 22:37:48 +0530
Subject: [PATCH] ARM: dts: msm: add interconnect devices for sdxnightjar

Add the interconnect devices for pcnoc, snoc and  bimc to enable
the real interconenct devices. This will allow consumers to get
their path and set bandwidth constraints on them.

Change-Id: If1809eee334af77081fe525b4bfe9566116d5284
---
 qcom/sdxnightjar.dtsi | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/qcom/sdxnightjar.dtsi b/qcom/sdxnightjar.dtsi
index e26f40eb7346..8337f22edeb9 100644
--- a/qcom/sdxnightjar.dtsi
+++ b/qcom/sdxnightjar.dtsi
@@ -1,3 +1,5 @@
+#include <dt-bindings/interconnect/qcom,icc.h>
+#include <dt-bindings/interconnect/qcom,sdxnightjar.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-sdxnightjar.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
@@ -673,6 +675,37 @@
 		#size-cells = <0>;
 		cell-index = <0>;
 	};
+
+	bimc: interconnect@400000 {
+		reg = <0x400000 0x62000>;
+		compatible = "qcom,sdxnightjar-bimc";
+		qcom,util-factor = <153>;
+		qcom,keepalive;
+		#interconnect-cells = <1>;
+		clock-names = "bus", "bus_a";
+		clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
+			<&rpmcc RPM_SMD_BIMC_A_CLK>;
+	};
+
+	pc_noc: interconnect@500000 {
+		reg = <0x500000 0x11000>;
+		compatible = "qcom,sdxnightjar-pcnoc";
+		qcom,keepalive;
+		#interconnect-cells = <1>;
+		clock-names = "bus", "bus_a";
+		clocks = <&rpmcc RPM_SMD_PCNOC_CLK>,
+			<&rpmcc RPM_SMD_PCNOC_A_CLK>;
+	};
+
+	system_noc: interconnect@580000 {
+		reg = <0x580000 0x14000>;
+		compatible = "qcom,sdxnightjar-snoc";
+		qcom,keepalive;
+		#interconnect-cells = <1>;
+		clock-names = "bus", "bus_a";
+		clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
+			<&rpmcc RPM_SMD_SNOC_A_CLK>;
+	};
 };
 
 #include "pmd9650.dtsi"