From 2ff9429f38e319446205ee6d886b0927a78e9e6d Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Fri, 17 Jul 2020 12:09:42 +0530 Subject: [PATCH] icc: dt-bindings: add endpoint IDs for interconnects for SCSHRIKE Add master and slave ID constants for all Qualcomm Technologies, Inc. SCSHRIKE interconnect providers which consumers can use to set bandwidth constraints and find paths in the NoC (Network-On-Chip) topology. Change-Id: I69fdeddf756a12aa17868ddf7130243d5852d978 Signed-off-by: Veera Vegivada --- .../dt-bindings/interconnect/qcom,scshrike.h | 170 ++++++++++++++++++ 1 file changed, 170 insertions(+) create mode 100644 include/dt-bindings/interconnect/qcom,scshrike.h diff --git a/include/dt-bindings/interconnect/qcom,scshrike.h b/include/dt-bindings/interconnect/qcom,scshrike.h new file mode 100644 index 000000000000..56f0e98cbe0d --- /dev/null +++ b/include/dt-bindings/interconnect/qcom,scshrike.h @@ -0,0 +1,170 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2020, The Linux Foundation. All rights reserved. + */ + +#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SCSHRIKE_H +#define __DT_BINDINGS_INTERCONNECT_QCOM_SCSHRIKE_H + +#define MASTER_APPSS_PROC 0 +#define MASTER_GPU_TCU 1 +#define MASTER_SYS_TCU 2 +#define MASTER_IPA_CORE 3 +#define MASTER_LLCC 4 +#define MASTER_A1NOC_CFG 5 +#define MASTER_A2NOC_CFG 6 +#define MASTER_CNOC_DC_NOC 7 +#define MASTER_GEM_NOC_CFG 8 +#define MASTER_CNOC_MNOC_CFG 9 +#define MASTER_QDSS_BAM 10 +#define MASTER_QSPI_0 11 +#define MASTER_QSPI_1 12 +#define MASTER_QUP_0 13 +#define MASTER_QUP_1 14 +#define MASTER_QUP_2 15 +#define MASTER_SNOC_CFG 16 +#define MASTER_A1NOC_SNOC 17 +#define MASTER_A2NOC_SNOC 18 +#define MASTER_COMPUTE_NOC 19 +#define MASTER_GEM_NOC_SNOC 20 +#define MASTER_GFX3D 21 +#define MASTER_MNOC_HF_MEM_NOC 22 +#define MASTER_MNOC_SF_MEM_NOC 23 +#define MASTER_NPU 24 +#define MASTER_GEM_NOC_PCIE_SNOC 25 +#define MASTER_SNOC_CNOC 26 +#define MASTER_SNOC_GC_MEM_NOC 27 +#define MASTER_SNOC_SF_MEM_NOC 28 +#define MASTER_CAMNOC_HF0 29 +#define MASTER_CAMNOC_HF0_UNCOMP 30 +#define MASTER_CAMNOC_HF1 31 +#define MASTER_CAMNOC_HF1_UNCOMP 32 +#define MASTER_CAMNOC_SF 33 +#define MASTER_CAMNOC_SF_UNCOMP 34 +#define MASTER_CRYPTO 35 +#define MASTER_ECC 36 +#define MASTER_IPA 37 +#define MASTER_MDP0 38 +#define MASTER_MDP1 39 +#define MASTER_PIMEM 40 +#define MASTER_ROTATOR 41 +#define MASTER_VIDEO_P0 42 +#define MASTER_VIDEO_P1 43 +#define MASTER_VIDEO_PROC 44 +#define MASTER_EMAC 45 +#define MASTER_GIC 46 +#define MASTER_PCIE_0 47 +#define MASTER_PCIE_1 48 +#define MASTER_PCIE_2 49 +#define MASTER_PCIE_3 50 +#define MASTER_QDSS_ETR 51 +#define MASTER_SDCC_2 52 +#define MASTER_SDCC_4 53 +#define MASTER_UFS_CARD 54 +#define MASTER_UFS_GEN4 55 +#define MASTER_UFS_MEM 56 +#define MASTER_USB3_0 57 +#define MASTER_USB3_1 58 +#define MASTER_USB3_2 59 +#define MASTER_SENSORS_AHB 60 +#define SLAVE_EBI1 512 +#define SLAVE_IPA_CORE 513 +#define SLAVE_A1NOC_CFG 514 +#define SLAVE_A2NOC_CFG 515 +#define SLAVE_AHB2PHY_CENTER 516 +#define SLAVE_AHB2PHY_EAST 517 +#define SLAVE_AHB2PHY_WEST 518 +#define SLAVE_AHB2PHY_SOUTH 519 +#define SLAVE_AOP 520 +#define SLAVE_AOSS 521 +#define SLAVE_APPSS 522 +#define SLAVE_CAMERA_CFG 523 +#define SLAVE_CLK_CTL 524 +#define SLAVE_CDSP_CFG 525 +#define SLAVE_RBCPR_CX_CFG 526 +#define SLAVE_RBCPR_MMCX_CFG 527 +#define SLAVE_RBCPR_MX_CFG 528 +#define SLAVE_CRYPTO_0_CFG 529 +#define SLAVE_CNOC_DDRSS 530 +#define SLAVE_DISPLAY_CFG 531 +#define SLAVE_EMAC_CFG 532 +#define SLAVE_GEM_NOC_CFG 533 +#define SLAVE_GLM 534 +#define SLAVE_GFX3D_CFG 535 +#define SLAVE_IMEM_CFG 536 +#define SLAVE_IPA_CFG 537 +#define SLAVE_LLCC_CFG 538 +#define SLAVE_MSS_PROC_MS_MPU_CFG 539 +#define SLAVE_CNOC_MNOC_CFG 540 +#define SLAVE_NPU_CFG 541 +#define SLAVE_PCIE_0_CFG 542 +#define SLAVE_PCIE_1_CFG 543 +#define SLAVE_PCIE_2_CFG 544 +#define SLAVE_PCIE_3_CFG 545 +#define SLAVE_PDM 546 +#define SLAVE_PIMEM_CFG 547 +#define SLAVE_PRNG 548 +#define SLAVE_QDSS_CFG 549 +#define SLAVE_QSPI_0 550 +#define SLAVE_QSPI_1 551 +#define SLAVE_QUP_1 552 +#define SLAVE_QUP_2 553 +#define SLAVE_QUP_0 554 +#define SLAVE_SDCC_2 555 +#define SLAVE_SDCC_4 556 +#define SLAVE_SECURITY 557 +#define SLAVE_SNOC_CFG 558 +#define SLAVE_SPSS_CFG 559 +#define SLAVE_TCSR 560 +#define SLAVE_TLMM_EAST 561 +#define SLAVE_TLMM_SOUTH 562 +#define SLAVE_TLMM_WEST 563 +#define SLAVE_TSIF 564 +#define SLAVE_UFS_CARD_CFG 565 +#define SLAVE_UFS_MEM_0_CFG 566 +#define SLAVE_UFS_MEM_1_CFG 567 +#define SLAVE_USB3_0 568 +#define SLAVE_USB3_1 569 +#define SLAVE_USB3_2 570 +#define SLAVE_VENUS_CFG 571 +#define SLAVE_VSENSE_CTRL_CFG 572 +#define SLAVE_MNOC_SF_MEM_NOC 573 +#define SLAVE_A1NOC_SNOC 574 +#define SLAVE_A2NOC_SNOC 575 +#define SLAVE_CAMNOC_UNCOMP 576 +#define SLAVE_CDSP_MEM_NOC 577 +#define SLAVE_SNOC_CNOC 578 +#define SLAVE_ECC 579 +#define SLAVE_GEM_NOC_SNOC 580 +#define SLAVE_SNOC_GEM_NOC_GC 581 +#define SLAVE_SNOC_GEM_NOC_SF 582 +#define SLAVE_LLCC 583 +#define SLAVE_MNOC_HF_MEM_NOC 584 +#define SLAVE_ANOC_PCIE_GEM_NOC 585 +#define SLAVE_IMEM 586 +#define SLAVE_PIMEM 587 +#define SLAVE_SERVICE_A1NOC 588 +#define SLAVE_SERVICE_A2NOC 589 +#define SLAVE_SERVICE_CNOC 590 +#define SLAVE_SERVICE_GEM_NOC 591 +#define SLAVE_SERVICE_GEM_NOC_1 592 +#define SLAVE_SERVICE_MNOC 593 +#define SLAVE_SERVICE_SNOC 594 +#define SLAVE_PCIE_0 595 +#define SLAVE_PCIE_1 596 +#define SLAVE_PCIE_2 597 +#define SLAVE_PCIE_3 598 +#define SLAVE_QDSS_STM 599 +#define SLAVE_TCU 600 +#define MASTER_LLCC_DISP 1000 +#define MASTER_MNOC_HF_MEM_NOC_DISP 1001 +#define MASTER_MNOC_SF_MEM_NOC_DISP 1002 +#define MASTER_MDP0_DISP 1003 +#define MASTER_MDP1_DISP 1004 +#define MASTER_ROTATOR_DISP 1005 +#define SLAVE_EBI1_DISP 1512 +#define SLAVE_MNOC_SF_MEM_NOC_DISP 1513 +#define SLAVE_LLCC_DISP 1514 +#define SLAVE_MNOC_HF_MEM_NOC_DISP 1515 + +#endif