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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-09 05:39:54 -04:00
Merge "msm: pcie: remove unnecessary global PCI device table"
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qctecmdr
Gerrit - the friendly Code Review server
commit
406e430dc8
1 changed files with 46 additions and 115 deletions
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@ -874,10 +874,6 @@ static u32 corr_counter_limit = 5;
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/* CRC8 table for BDF to SID translation */
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static u8 msm_pcie_crc8_table[CRC8_TABLE_SIZE];
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/* Table to track info of PCIe devices */
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static struct msm_pcie_device_info
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msm_pcie_dev_tbl[MAX_RC_NUM * MAX_DEVICE_NUM];
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/* PCIe driver state */
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static struct pcie_drv_sta {
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u32 rc_num;
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@ -2933,20 +2929,13 @@ static void msm_pcie_save_shadow(struct msm_pcie_dev_t *dev,
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u32 word_offset, u32 wr_val,
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u32 bdf, bool rc)
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{
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int i, j;
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u32 max_dev = MAX_RC_NUM * MAX_DEVICE_NUM;
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int i;
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if (rc) {
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dev->rc_shadow[word_offset / 4] = wr_val;
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} else {
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for (i = 0; i < MAX_DEVICE_NUM; i++) {
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if (!dev->pcidev_table[i].bdf) {
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for (j = 0; j < max_dev; j++) {
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if (!msm_pcie_dev_tbl[j].bdf) {
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msm_pcie_dev_tbl[j].bdf = bdf;
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break;
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}
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}
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dev->pcidev_table[i].bdf = bdf;
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if ((!dev->bridge_found) && (i > 0))
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dev->bridge_found = true;
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@ -4617,27 +4606,18 @@ static void msm_pcie_config_ep_aer(struct msm_pcie_dev_t *dev,
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readl_relaxed(ep_base + ep_dev_info->dev_ctrlstts_offset));
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}
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static int msm_pcie_config_device_table(struct device *dev, void *pdev)
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static int msm_pcie_config_device_table(struct pci_dev *pcidev, void *pdev)
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{
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struct pci_dev *pcidev = to_pci_dev(dev);
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struct msm_pcie_dev_t *pcie_dev = (struct msm_pcie_dev_t *) pdev;
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struct msm_pcie_device_info *dev_table_t = pcie_dev->pcidev_table;
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struct resource *axi_conf = pcie_dev->res[MSM_PCIE_RES_CONF].resource;
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int ret = 0;
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u32 rc_idx = pcie_dev->rc_idx;
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u32 i, index;
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u32 i;
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u32 bdf = 0;
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u8 type;
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u32 h_type;
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u32 bme;
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if (!pcidev) {
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PCIE_ERR(pcie_dev,
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"PCIe: Did not find PCI device in list for RC%d.\n",
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pcie_dev->rc_idx);
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return -ENODEV;
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}
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PCIE_DBG(pcie_dev,
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"PCI device found: vendor-id:0x%x device-id:0x%x\n",
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pcidev->vendor, pcidev->device);
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@ -4649,81 +4629,51 @@ static int msm_pcie_config_device_table(struct device *dev, void *pdev)
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type = pcidev->bus->number == 1 ?
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PCIE20_CTRL1_TYPE_CFG0 : PCIE20_CTRL1_TYPE_CFG1;
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for (i = 0; i < (MAX_RC_NUM * MAX_DEVICE_NUM); i++) {
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if (msm_pcie_dev_tbl[i].bdf == bdf &&
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!msm_pcie_dev_tbl[i].dev) {
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for (index = 0; index < MAX_DEVICE_NUM; index++) {
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if (dev_table_t[index].bdf == bdf) {
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msm_pcie_dev_tbl[i].dev = pcidev;
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msm_pcie_dev_tbl[i].domain = rc_idx;
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msm_pcie_dev_tbl[i].conf_base =
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pcie_dev->conf + index * SZ_4K;
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msm_pcie_dev_tbl[i].phy_address =
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axi_conf->start + index * SZ_4K;
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for (i = 0; i < MAX_DEVICE_NUM; i++) {
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struct msm_pcie_device_info *dev_table_t =
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&pcie_dev->pcidev_table[i];
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dev_table_t[index].dev = pcidev;
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dev_table_t[index].domain = rc_idx;
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dev_table_t[index].conf_base =
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pcie_dev->conf + index * SZ_4K;
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dev_table_t[index].phy_address =
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axi_conf->start + index * SZ_4K;
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if (dev_table_t->bdf != bdf)
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continue;
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msm_pcie_iatu_config(pcie_dev, index,
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type,
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dev_table_t[index].phy_address,
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dev_table_t[index].phy_address
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+ SZ_4K - 1,
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bdf);
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dev_table_t->dev = pcidev;
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dev_table_t->domain = rc_idx;
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dev_table_t->conf_base = pcie_dev->conf + i * SZ_4K;
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dev_table_t->phy_address = axi_conf->start + i * SZ_4K;
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h_type = readl_relaxed(
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dev_table_t[index].conf_base +
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PCIE20_HEADER_TYPE);
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msm_pcie_iatu_config(pcie_dev, i, type,
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dev_table_t->phy_address,
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dev_table_t->phy_address + SZ_4K - 1, bdf);
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bme = readl_relaxed(
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dev_table_t[index].conf_base +
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PCIE20_COMMAND_STATUS);
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h_type = readl_relaxed(dev_table_t->conf_base +
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PCIE20_HEADER_TYPE);
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if (h_type & (1 << 16)) {
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pci_write_config_dword(pcidev,
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PCIE20_COMMAND_STATUS,
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bme | 0x06);
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} else {
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pcie_dev->num_ep++;
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dev_table_t[index].registered =
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false;
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}
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bme = readl_relaxed(dev_table_t->conf_base +
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PCIE20_COMMAND_STATUS);
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if (pcie_dev->num_ep > 1)
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pcie_dev->pending_ep_reg = true;
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if (pcie_dev->aer_enable)
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msm_pcie_config_ep_aer(pcie_dev,
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&dev_table_t[index]);
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break;
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}
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}
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if (index == MAX_DEVICE_NUM) {
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PCIE_ERR(pcie_dev,
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"RC%d PCI device table is full.\n",
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rc_idx);
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ret = index;
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} else {
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break;
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}
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} else if (msm_pcie_dev_tbl[i].bdf == bdf &&
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pcidev == msm_pcie_dev_tbl[i].dev) {
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break;
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if (h_type & (1 << 16)) {
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pci_write_config_dword(pcidev, PCIE20_COMMAND_STATUS,
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bme | 0x06);
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} else {
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pcie_dev->num_ep++;
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dev_table_t->registered = false;
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}
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if (pcie_dev->num_ep > 1)
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pcie_dev->pending_ep_reg = true;
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if (pcie_dev->aer_enable)
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msm_pcie_config_ep_aer(pcie_dev, dev_table_t);
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break;
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}
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if (i == MAX_RC_NUM * MAX_DEVICE_NUM) {
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if (i == MAX_DEVICE_NUM) {
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PCIE_ERR(pcie_dev,
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"Global PCI device table is full: %d elements.\n",
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i);
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PCIE_ERR(pcie_dev,
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"Bus number is 0x%x\nDevice number is 0x%x\n",
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pcidev->bus->number, pcidev->devfn);
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ret = i;
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"PCIe: RC%d: could not find device in the table: %02x:%02x:%01x\n",
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pcie_dev->rc_idx, pcidev->bus->number,
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PCI_SLOT(pcidev->devfn), PCI_FUNC(pcidev->devfn));
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ret = -ENODEV;
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}
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return ret;
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}
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@ -4803,7 +4753,7 @@ static void msm_pcie_config_sid(struct msm_pcie_dev_t *dev)
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int msm_pcie_enumerate(u32 rc_idx)
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{
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int ret = 0, bus_ret = 0;
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int ret = 0;
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struct msm_pcie_dev_t *dev = &msm_pcie_dev[rc_idx];
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struct pci_dev *pcidev = NULL;
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struct pci_host_bridge *bridge;
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@ -4925,14 +4875,7 @@ int msm_pcie_enumerate(u32 rc_idx)
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goto out;
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}
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bus_ret = bus_for_each_dev(&pci_bus_type, NULL, dev,
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&msm_pcie_config_device_table);
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if (bus_ret) {
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PCIE_ERR(dev, "PCIe: RC%d: Failed to set up device table\n",
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dev->rc_idx);
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ret = -ENODEV;
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goto out;
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}
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pci_walk_bus(dev->dev->bus, msm_pcie_config_device_table, dev);
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msm_pcie_check_l1ss_support_all(dev);
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msm_pcie_config_link_pm(dev, true);
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@ -7010,18 +6953,6 @@ static int __init pcie_init(void)
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INIT_WORK(&msm_pcie_dev[i].drv_enable_pc_work,
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msm_pcie_drv_enable_pc);
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}
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for (i = 0; i < MAX_RC_NUM * MAX_DEVICE_NUM; i++) {
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msm_pcie_dev_tbl[i].bdf = 0;
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msm_pcie_dev_tbl[i].dev = NULL;
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msm_pcie_dev_tbl[i].short_bdf = 0;
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msm_pcie_dev_tbl[i].sid = 0;
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msm_pcie_dev_tbl[i].domain = -1;
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msm_pcie_dev_tbl[i].conf_base = NULL;
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msm_pcie_dev_tbl[i].phy_address = 0;
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msm_pcie_dev_tbl[i].dev_ctrlstts_offset = 0;
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msm_pcie_dev_tbl[i].event_reg = NULL;
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msm_pcie_dev_tbl[i].registered = true;
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}
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crc8_populate_msb(msm_pcie_crc8_table, MSM_PCIE_CRC8_POLYNOMIAL);
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