mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 18:51:56 -04:00
Merge branch 'depends/rmk/restart' into next/cleanup
Conflicts: arch/arm/mach-at91/at91cap9.c arch/arm/mach-at91/at91sam9260.c arch/arm/mach-at91/at91sam9261.c arch/arm/mach-at91/at91sam9263.c arch/arm/mach-at91/at91sam9g45.c arch/arm/mach-at91/at91sam9rl.c arch/arm/mach-exynos/cpu.c arch/arm/mach-shmobile/board-kota2.c This resolves a bunch of conflicts between the arm-soc tree and changes from the arm tree that have gone upstream. Signed-off-by: Arnd Bergmann <[email protected]>
This commit is contained in:
Arnd Bergmann
commit
40ba95fdf1
931 changed files with 8065 additions and 7936 deletions
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|
@ -232,6 +232,7 @@ struct fec_enet_private {
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struct platform_device *pdev;
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int opened;
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int dev_id;
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/* Phylib and MDIO interface */
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struct mii_bus *mii_bus;
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@ -837,7 +838,7 @@ static void __inline__ fec_get_mac(struct net_device *ndev)
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/* Adjust MAC if using macaddr */
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if (iap == macaddr)
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ndev->dev_addr[ETH_ALEN-1] = macaddr[ETH_ALEN-1] + fep->pdev->id;
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ndev->dev_addr[ETH_ALEN-1] = macaddr[ETH_ALEN-1] + fep->dev_id;
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}
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/* ------------------------------------------------------------------------- */
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@ -953,7 +954,7 @@ static int fec_enet_mii_probe(struct net_device *ndev)
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char mdio_bus_id[MII_BUS_ID_SIZE];
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char phy_name[MII_BUS_ID_SIZE + 3];
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int phy_id;
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int dev_id = fep->pdev->id;
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int dev_id = fep->dev_id;
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fep->phy_dev = NULL;
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@ -1031,7 +1032,7 @@ static int fec_enet_mii_init(struct platform_device *pdev)
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* mdio interface in board design, and need to be configured by
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* fec0 mii_bus.
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*/
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if ((id_entry->driver_data & FEC_QUIRK_ENET_MAC) && pdev->id > 0) {
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if ((id_entry->driver_data & FEC_QUIRK_ENET_MAC) && fep->dev_id > 0) {
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/* fec1 uses fec0 mii_bus */
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fep->mii_bus = fec0_mii_bus;
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return 0;
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@ -1063,7 +1064,7 @@ static int fec_enet_mii_init(struct platform_device *pdev)
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fep->mii_bus->read = fec_enet_mdio_read;
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fep->mii_bus->write = fec_enet_mdio_write;
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fep->mii_bus->reset = fec_enet_mdio_reset;
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snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id + 1);
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snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%x", fep->dev_id + 1);
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fep->mii_bus->priv = fep;
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fep->mii_bus->parent = &pdev->dev;
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@ -1521,6 +1522,7 @@ fec_probe(struct platform_device *pdev)
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int i, irq, ret = 0;
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struct resource *r;
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const struct of_device_id *of_id;
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static int dev_id;
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of_id = of_match_device(fec_dt_ids, &pdev->dev);
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if (of_id)
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@ -1548,6 +1550,7 @@ fec_probe(struct platform_device *pdev)
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fep->hwp = ioremap(r->start, resource_size(r));
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fep->pdev = pdev;
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fep->dev_id = dev_id++;
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if (!fep->hwp) {
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ret = -ENOMEM;
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@ -183,28 +183,10 @@ void fsl_pq_mdio_bus_name(char *name, struct device_node *np)
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}
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EXPORT_SYMBOL_GPL(fsl_pq_mdio_bus_name);
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/* Scan the bus in reverse, looking for an empty spot */
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static int fsl_pq_mdio_find_free(struct mii_bus *new_bus)
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{
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int i;
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for (i = PHY_MAX_ADDR; i > 0; i--) {
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u32 phy_id;
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if (get_phy_id(new_bus, i, &phy_id))
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return -1;
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if (phy_id == 0xffffffff)
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break;
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}
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return i;
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}
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#if defined(CONFIG_GIANFAR) || defined(CONFIG_GIANFAR_MODULE)
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static u32 __iomem *get_gfar_tbipa(struct fsl_pq_mdio __iomem *regs, struct device_node *np)
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{
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#if defined(CONFIG_GIANFAR) || defined(CONFIG_GIANFAR_MODULE)
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struct gfar __iomem *enet_regs;
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/*
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@ -220,15 +202,15 @@ static u32 __iomem *get_gfar_tbipa(struct fsl_pq_mdio __iomem *regs, struct devi
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} else if (of_device_is_compatible(np, "fsl,etsec2-mdio") ||
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of_device_is_compatible(np, "fsl,etsec2-tbi")) {
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return of_iomap(np, 1);
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} else
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return NULL;
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}
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}
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#endif
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return NULL;
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}
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#if defined(CONFIG_UCC_GETH) || defined(CONFIG_UCC_GETH_MODULE)
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static int get_ucc_id_for_range(u64 start, u64 end, u32 *ucc_id)
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{
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#if defined(CONFIG_UCC_GETH) || defined(CONFIG_UCC_GETH_MODULE)
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struct device_node *np = NULL;
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int err = 0;
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@ -261,9 +243,10 @@ static int get_ucc_id_for_range(u64 start, u64 end, u32 *ucc_id)
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return err;
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else
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return -EINVAL;
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}
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#else
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return -ENODEV;
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#endif
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}
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static int fsl_pq_mdio_probe(struct platform_device *ofdev)
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{
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@ -339,19 +322,13 @@ static int fsl_pq_mdio_probe(struct platform_device *ofdev)
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of_device_is_compatible(np, "fsl,etsec2-mdio") ||
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of_device_is_compatible(np, "fsl,etsec2-tbi") ||
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of_device_is_compatible(np, "gianfar")) {
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#if defined(CONFIG_GIANFAR) || defined(CONFIG_GIANFAR_MODULE)
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tbipa = get_gfar_tbipa(regs, np);
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if (!tbipa) {
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err = -EINVAL;
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goto err_free_irqs;
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}
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#else
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err = -ENODEV;
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goto err_free_irqs;
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#endif
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} else if (of_device_is_compatible(np, "fsl,ucc-mdio") ||
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of_device_is_compatible(np, "ucc_geth_phy")) {
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#if defined(CONFIG_UCC_GETH) || defined(CONFIG_UCC_GETH_MODULE)
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u32 id;
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static u32 mii_mng_master;
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@ -364,10 +341,6 @@ static int fsl_pq_mdio_probe(struct platform_device *ofdev)
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mii_mng_master = id;
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ucc_set_qe_mux_mii_mng(id - 1);
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}
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#else
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err = -ENODEV;
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goto err_free_irqs;
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#endif
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} else {
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err = -ENODEV;
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goto err_free_irqs;
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@ -386,16 +359,6 @@ static int fsl_pq_mdio_probe(struct platform_device *ofdev)
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}
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if (tbiaddr == -1) {
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out_be32(tbipa, 0);
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tbiaddr = fsl_pq_mdio_find_free(new_bus);
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}
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/*
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* We define TBIPA at 0 to be illegal, opting to fail for boards that
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* have PHYs at 1-31, rather than change tbipa and rescan.
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*/
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if (tbiaddr == 0) {
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err = -EBUSY;
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goto err_free_irqs;
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@ -477,7 +477,6 @@ enum rtl_register_content {
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/* Config1 register p.24 */
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LEDS1 = (1 << 7),
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LEDS0 = (1 << 6),
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MSIEnable = (1 << 5), /* Enable Message Signaled Interrupt */
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Speed_down = (1 << 4),
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MEMMAP = (1 << 3),
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IOMAP = (1 << 2),
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@ -485,6 +484,7 @@ enum rtl_register_content {
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PMEnable = (1 << 0), /* Power Management Enable */
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/* Config2 register p. 25 */
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MSIEnable = (1 << 5), /* 8169 only. Reserved in the 8168. */
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PCI_Clock_66MHz = 0x01,
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PCI_Clock_33MHz = 0x00,
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@ -3426,22 +3426,24 @@ static const struct rtl_cfg_info {
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};
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/* Cfg9346_Unlock assumed. */
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static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr,
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static unsigned rtl_try_msi(struct rtl8169_private *tp,
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const struct rtl_cfg_info *cfg)
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{
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void __iomem *ioaddr = tp->mmio_addr;
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unsigned msi = 0;
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u8 cfg2;
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cfg2 = RTL_R8(Config2) & ~MSIEnable;
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if (cfg->features & RTL_FEATURE_MSI) {
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if (pci_enable_msi(pdev)) {
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dev_info(&pdev->dev, "no MSI. Back to INTx.\n");
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if (pci_enable_msi(tp->pci_dev)) {
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netif_info(tp, hw, tp->dev, "no MSI. Back to INTx.\n");
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} else {
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cfg2 |= MSIEnable;
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msi = RTL_FEATURE_MSI;
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}
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}
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RTL_W8(Config2, cfg2);
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if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
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RTL_W8(Config2, cfg2);
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return msi;
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}
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|
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|
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@ -4077,7 +4079,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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tp->features |= RTL_FEATURE_WOL;
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if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0)
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tp->features |= RTL_FEATURE_WOL;
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tp->features |= rtl_try_msi(pdev, ioaddr, cfg);
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tp->features |= rtl_try_msi(tp, cfg);
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RTL_W8(Cfg9346, Cfg9346_Lock);
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if (rtl_tbi_enabled(tp)) {
|
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|
|
|
|||
|
|
@ -836,11 +836,13 @@ int cpdma_chan_stop(struct cpdma_chan *chan)
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chan_write(chan, cp, CPDMA_TEARDOWN_VALUE);
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||||
|
||||
/* handle completed packets */
|
||||
spin_unlock_irqrestore(&chan->lock, flags);
|
||||
do {
|
||||
ret = __cpdma_chan_process(chan);
|
||||
if (ret < 0)
|
||||
break;
|
||||
} while ((ret & CPDMA_DESC_TD_COMPLETE) == 0);
|
||||
spin_lock_irqsave(&chan->lock, flags);
|
||||
|
||||
/* remaining packets haven't been tx/rx'ed, clean them up */
|
||||
while (chan->head) {
|
||||
|
|
|
|||
|
|
@ -423,10 +423,8 @@ static int pptp_bind(struct socket *sock, struct sockaddr *uservaddr,
|
|||
lock_sock(sk);
|
||||
|
||||
opt->src_addr = sp->sa_addr.pptp;
|
||||
if (add_chan(po)) {
|
||||
release_sock(sk);
|
||||
if (add_chan(po))
|
||||
error = -EBUSY;
|
||||
}
|
||||
|
||||
release_sock(sk);
|
||||
return error;
|
||||
|
|
|
|||
|
|
@ -1655,6 +1655,10 @@ static const struct usb_device_id products [] = {
|
|||
// ASIX 88772a
|
||||
USB_DEVICE(0x0db0, 0xa877),
|
||||
.driver_info = (unsigned long) &ax88772_info,
|
||||
}, {
|
||||
// Asus USB Ethernet Adapter
|
||||
USB_DEVICE (0x0b95, 0x7e2b),
|
||||
.driver_info = (unsigned long) &ax88772_info,
|
||||
},
|
||||
{ }, // END
|
||||
};
|
||||
|
|
|
|||
|
|
@ -286,7 +286,7 @@ static bool ath_complete_reset(struct ath_softc *sc, bool start)
|
|||
ath_start_ani(common);
|
||||
}
|
||||
|
||||
if (ath9k_hw_ops(ah)->antdiv_comb_conf_get && sc->ant_rx != 3) {
|
||||
if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
|
||||
struct ath_hw_antcomb_conf div_ant_conf;
|
||||
u8 lna_conf;
|
||||
|
||||
|
|
|
|||
|
|
@ -1271,7 +1271,9 @@ static void ath_rc_init(struct ath_softc *sc,
|
|||
|
||||
ath_rc_priv->max_valid_rate = k;
|
||||
ath_rc_sort_validrates(rate_table, ath_rc_priv);
|
||||
ath_rc_priv->rate_max_phy = ath_rc_priv->valid_rate_index[k-4];
|
||||
ath_rc_priv->rate_max_phy = (k > 4) ?
|
||||
ath_rc_priv->valid_rate_index[k-4] :
|
||||
ath_rc_priv->valid_rate_index[k-1];
|
||||
ath_rc_priv->rate_table = rate_table;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
|
|
|
|||
|
|
@ -606,8 +606,8 @@ int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed)
|
|||
if (ctx->ht.enabled) {
|
||||
/* if HT40 is used, it should not change
|
||||
* after associated except channel switch */
|
||||
if (iwl_is_associated_ctx(ctx) &&
|
||||
!ctx->ht.is_40mhz)
|
||||
if (!ctx->ht.is_40mhz ||
|
||||
!iwl_is_associated_ctx(ctx))
|
||||
iwlagn_config_ht40(conf, ctx);
|
||||
} else
|
||||
ctx->ht.is_40mhz = false;
|
||||
|
|
|
|||
|
|
@ -91,7 +91,10 @@ static void iwlagn_tx_cmd_build_basic(struct iwl_priv *priv,
|
|||
tx_cmd->tid_tspec = qc[0] & 0xf;
|
||||
tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
|
||||
} else {
|
||||
tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
|
||||
if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
|
||||
tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
|
||||
else
|
||||
tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
|
||||
}
|
||||
|
||||
iwlagn_tx_cmd_protection(priv, info, fc, &tx_flags);
|
||||
|
|
|
|||
|
|
@ -2850,6 +2850,9 @@ static int iwlagn_mac_tx_sync(struct ieee80211_hw *hw,
|
|||
int ret;
|
||||
u8 sta_id;
|
||||
|
||||
if (ctx->ctxid != IWL_RXON_CTX_PAN)
|
||||
return 0;
|
||||
|
||||
IWL_DEBUG_MAC80211(priv, "enter\n");
|
||||
mutex_lock(&priv->shrd->mutex);
|
||||
|
||||
|
|
@ -2898,6 +2901,9 @@ static void iwlagn_mac_finish_tx_sync(struct ieee80211_hw *hw,
|
|||
struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
|
||||
struct iwl_rxon_context *ctx = vif_priv->ctx;
|
||||
|
||||
if (ctx->ctxid != IWL_RXON_CTX_PAN)
|
||||
return;
|
||||
|
||||
IWL_DEBUG_MAC80211(priv, "enter\n");
|
||||
mutex_lock(&priv->shrd->mutex);
|
||||
|
||||
|
|
|
|||
|
|
@ -1197,9 +1197,7 @@ static int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb,
|
|||
iwl_print_hex_dump(trans, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len);
|
||||
|
||||
/* Set up entry for this TFD in Tx byte-count array */
|
||||
if (is_agg)
|
||||
iwl_trans_txq_update_byte_cnt_tbl(trans, txq,
|
||||
le16_to_cpu(tx_cmd->len));
|
||||
iwl_trans_txq_update_byte_cnt_tbl(trans, txq, le16_to_cpu(tx_cmd->len));
|
||||
|
||||
dma_sync_single_for_device(bus(trans)->dev, txcmd_phys, firstlen,
|
||||
DMA_BIDIRECTIONAL);
|
||||
|
|
|
|||
|
|
@ -939,7 +939,6 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter)
|
|||
{
|
||||
struct cmd_ctrl_node *cmd_node = NULL, *tmp_node = NULL;
|
||||
unsigned long cmd_flags;
|
||||
unsigned long cmd_pending_q_flags;
|
||||
unsigned long scan_pending_q_flags;
|
||||
uint16_t cancel_scan_cmd = false;
|
||||
|
||||
|
|
@ -949,12 +948,9 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter)
|
|||
cmd_node = adapter->curr_cmd;
|
||||
cmd_node->wait_q_enabled = false;
|
||||
cmd_node->cmd_flag |= CMD_F_CANCELED;
|
||||
spin_lock_irqsave(&adapter->cmd_pending_q_lock,
|
||||
cmd_pending_q_flags);
|
||||
list_del(&cmd_node->list);
|
||||
spin_unlock_irqrestore(&adapter->cmd_pending_q_lock,
|
||||
cmd_pending_q_flags);
|
||||
mwifiex_insert_cmd_to_free_q(adapter, cmd_node);
|
||||
mwifiex_complete_cmd(adapter, adapter->curr_cmd);
|
||||
adapter->curr_cmd = NULL;
|
||||
spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, cmd_flags);
|
||||
}
|
||||
|
||||
|
|
@ -981,7 +977,6 @@ mwifiex_cancel_pending_ioctl(struct mwifiex_adapter *adapter)
|
|||
spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, cmd_flags);
|
||||
}
|
||||
adapter->cmd_wait_q.status = -1;
|
||||
mwifiex_complete_cmd(adapter, adapter->curr_cmd);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -569,7 +569,7 @@ static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
|
|||
}
|
||||
case ERFSLEEP:{
|
||||
if (ppsc->rfpwr_state == ERFOFF)
|
||||
break;
|
||||
return false;
|
||||
for (queue_id = 0, i = 0;
|
||||
queue_id < RTL_PCI_MAX_TX_QUEUE_COUNT;) {
|
||||
ring = &pcipriv->dev.tx_ring[queue_id];
|
||||
|
|
|
|||
|
|
@ -548,7 +548,7 @@ static bool _rtl92cu_phy_set_rf_power_state(struct ieee80211_hw *hw,
|
|||
break;
|
||||
case ERFSLEEP:
|
||||
if (ppsc->rfpwr_state == ERFOFF)
|
||||
break;
|
||||
return false;
|
||||
for (queue_id = 0, i = 0;
|
||||
queue_id < RTL_PCI_MAX_TX_QUEUE_COUNT;) {
|
||||
ring = &pcipriv->dev.tx_ring[queue_id];
|
||||
|
|
|
|||
|
|
@ -3374,7 +3374,7 @@ bool rtl92d_phy_set_rf_power_state(struct ieee80211_hw *hw,
|
|||
break;
|
||||
case ERFSLEEP:
|
||||
if (ppsc->rfpwr_state == ERFOFF)
|
||||
break;
|
||||
return false;
|
||||
|
||||
for (queue_id = 0, i = 0;
|
||||
queue_id < RTL_PCI_MAX_TX_QUEUE_COUNT;) {
|
||||
|
|
|
|||
|
|
@ -602,7 +602,7 @@ bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
|
|||
}
|
||||
case ERFSLEEP:
|
||||
if (ppsc->rfpwr_state == ERFOFF)
|
||||
break;
|
||||
return false;
|
||||
|
||||
for (queue_id = 0, i = 0;
|
||||
queue_id < RTL_PCI_MAX_TX_QUEUE_COUNT;) {
|
||||
|
|
|
|||
Loading…
Reference in a new issue