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Merge "disp: msm: sde: add support for monaco capabilities"
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commit
40dce79003
2 changed files with 15 additions and 0 deletions
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@ -4740,6 +4740,19 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
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sde_cfg->sui_block_xin_mask = 0x1;
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sde_cfg->has_hdr = false;
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sde_cfg->has_sui_blendstage = true;
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} else if (IS_MONACO_TARGET(hw_rev)) {
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sde_cfg->has_cwb_support = false;
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sde_cfg->has_qsync = true;
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sde_cfg->perf.min_prefill_lines = 24;
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sde_cfg->vbif_qos_nlvl = 8;
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sde_cfg->ts_prefill_rev = 2;
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sde_cfg->ctl_rev = SDE_CTL_CFG_VERSION_1_0_0;
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sde_cfg->delay_prg_fetch_start = true;
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sde_cfg->sui_ns_allowed = true;
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sde_cfg->sui_misr_supported = true;
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sde_cfg->sui_block_xin_mask = 0x1;
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sde_cfg->has_hdr = false;
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sde_cfg->has_sui_blendstage = true;
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} else if (IS_LAHAINA_TARGET(hw_rev)) {
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sde_cfg->has_demura = true;
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sde_cfg->demura_supported[SSPP_DMA1][0] = 0;
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@ -46,6 +46,7 @@
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#define SDE_HW_VER_650 SDE_HW_VER(6, 5, 0) /* scuba */
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#define SDE_HW_VER_660 SDE_HW_VER(6, 6, 0) /* holi */
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#define SDE_HW_VER_670 SDE_HW_VER(6, 7, 0) /* shima */
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#define SDE_HW_VER_680 SDE_HW_VER(6, 8, 0) /* monaco */
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#define SDE_HW_VER_690 SDE_HW_VER(6, 9, 0) /* blair */
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#define SDE_HW_VER_700 SDE_HW_VER(7, 0, 0) /* lahaina */
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#define SDE_HW_VER_720 SDE_HW_VER(7, 2, 0) /* yupik */
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@ -72,6 +73,7 @@
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#define IS_SCUBA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_650)
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#define IS_HOLI_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_660)
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#define IS_SHIMA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_670)
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#define IS_MONACO_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_680)
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#define IS_BLAIR_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_690)
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#define IS_LAHAINA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_700)
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#define IS_YUPIK_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_720)
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