From c902c442f1af4776bdf94afc4445522b3edb3075 Mon Sep 17 00:00:00 2001 From: Suraj Jaiswal Date: Tue, 14 Jul 2020 15:03:25 +0530 Subject: [PATCH] ARM: dts: msm: STMMAC changes for SA8155 LV Add support for STMMAC in SA8155 dts. Change-Id: I68855a9bb8492abdf366e07959c398534b28788e --- qcom/sa8155-v2.dtsi | 4 ++ qcom/sa8155.dtsi | 82 ++++++++++++++++++++++++++++++++++++++++ qcom/sm8150-pinctrl.dtsi | 28 +++++++------- 3 files changed, 100 insertions(+), 14 deletions(-) diff --git a/qcom/sa8155-v2.dtsi b/qcom/sa8155-v2.dtsi index bb97a5bc3ec3..70cfeff90489 100644 --- a/qcom/sa8155-v2.dtsi +++ b/qcom/sa8155-v2.dtsi @@ -342,3 +342,7 @@ &camcc { compatible = "qcom,sa8155-camcc-v2", "syscon"; }; + +ðqos_hw { + emac-core-version = <0x20010002>; +}; diff --git a/qcom/sa8155.dtsi b/qcom/sa8155.dtsi index a64466f5e6ad..7bab1ef03a9e 100644 --- a/qcom/sa8155.dtsi +++ b/qcom/sa8155.dtsi @@ -62,6 +62,88 @@ read-only; ranges; }; + ethqos_hw: qcom,ethernet@00020000 { + compatible = "qcom,stmmac-ethqos"; + qcom,arm-smmu; + reg = <0x20000 0x10000>, + <0x36000 0x100>, + <0x3D00000 0x300000>; + reg-names = "stmmaceth", "rgmii","tlmm-central-base"; + clocks = <&gcc GCC_EMAC_AXI_CLK>, + <&gcc GCC_EMAC_SLV_AHB_CLK>, + <&gcc GCC_EMAC_PTP_CLK>, + <&gcc GCC_EMAC_RGMII_CLK>; + clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; + interrupts-extended = <&intc 0 689 4>, <&intc 0 699 4>, + <&tlmm 124 2>; + interrupt-names = "macirq", "eth_lpi", + "phy-intr"; + qcom,msm-bus,name = "emac"; + qcom,msm-bus,num-cases = <4>; + qcom,msm-bus,num-paths = <2>; + qcom,msm-bus,vectors-KBps = + <98 512 0 0>, <1 781 0 0>, /* No vote */ + <98 512 2500 0>, <1 781 0 40000>, /* 10Mbps vote */ + <98 512 25000 0>, <1 781 0 40000>, /* 100Mbps vote */ + <98 512 250000 0>, <1 781 0 40000>; /* 1000Mbps vote */ + qcom,bus-vector-names = "0", "10", "100", "1000"; + snps,tso; + rx-fifo-depth = <4096>; + tx-fifo-depth = <4096>; + snps,reset-gpios = <&tlmm 79 GPIO_ACTIVE_HIGH>; + qcom,phy-intr-redirect = <&tlmm 124 GPIO_ACTIVE_LOW>; + gdsc_emac-supply = <&emac_gdsc>; + + pinctrl-names = "dev-emac-mdc", + "dev-emac-mdio", + "dev-emac-rgmii_txd0_state", + "dev-emac-rgmii_txd1_state", + "dev-emac-rgmii_txd2_state", + "dev-emac-rgmii_txd3_state", + "dev-emac-rgmii_txc_state", + "dev-emac-rgmii_tx_ctl_state", + "dev-emac-rgmii_rxd0_state", + "dev-emac-rgmii_rxd1_state", + "dev-emac-rgmii_rxd2_state", + "dev-emac-rgmii_rxd3_state", + "dev-emac-rgmii_rxc_state", + "dev-emac-rgmii_rx_ctl_state", + "dev-emac-phy_intr", + "dev-emac-phy_reset_state", + "dev-emac_pin_pps_0"; + + pinctrl-0 = <&emac_mdc>; + pinctrl-1 = <&emac_mdio>; + + pinctrl-2 = <&emac_rgmii_txd0>; + pinctrl-3 = <&emac_rgmii_txd1>; + pinctrl-4 = <&emac_rgmii_txd2>; + pinctrl-5 = <&emac_rgmii_txd3>; + pinctrl-6 = <&emac_rgmii_txc>; + pinctrl-7 = <&emac_rgmii_tx_ctl>; + + pinctrl-8 = <&emac_rgmii_rxd0>; + pinctrl-9 = <&emac_rgmii_rxd1>; + pinctrl-10 = <&emac_rgmii_rxd2>; + pinctrl-11 = <&emac_rgmii_rxd3>; + pinctrl-12 = <&emac_rgmii_rxc>; + pinctrl-13 = <&emac_rgmii_rx_ctl>; + + pinctrl-14 = <&emac_phy_intr>; + pinctrl-15 = <&emac_phy_reset_state>; + pinctrl-16 = <&emac_pin_pps_0>; + + snps,reset-delays-us = <0 11000 70000>; + phy-mode = "rgmii"; + + ethqos_emb_smmu: ethqos_emb_smmu { + compatible = "qcom,emac-smmu-embedded"; + iommus = <&apps_smmu 0x3C0 0x0>; + qcom,iommu-dma = "atomic"; + qcom,iommu-dma-addr-pool = <0x80000000 0x40000000>; + }; + }; + }; &usb2_phy0 { diff --git a/qcom/sm8150-pinctrl.dtsi b/qcom/sm8150-pinctrl.dtsi index 56c504fcab24..33a90ce5e00e 100644 --- a/qcom/sm8150-pinctrl.dtsi +++ b/qcom/sm8150-pinctrl.dtsi @@ -4802,7 +4802,7 @@ emac_mdc: emac_mdc { mux { pins = "gpio7"; - function = "rgmii_mdc"; + function = "rgmii"; }; config { @@ -4814,7 +4814,7 @@ emac_mdio: emac_mdio { mux { pins = "gpio59"; - function = "rgmii_mdio"; + function = "rgmii"; }; config { @@ -4826,7 +4826,7 @@ emac_rgmii_txd0: emac_rgmii_txd0 { mux { pins = "gpio122"; - function = "rgmii_txd0"; + function = "rgmii"; }; config { @@ -4839,7 +4839,7 @@ emac_rgmii_txd1: emac_rgmii_txd1 { mux { pins = "gpio4"; - function = "rgmii_txd1"; + function = "rgmii"; }; config { @@ -4852,7 +4852,7 @@ emac_rgmii_txd2: emac_rgmii_txd2 { mux { pins = "gpio5"; - function = "rgmii_txd2"; + function = "rgmii"; }; config { @@ -4865,7 +4865,7 @@ emac_rgmii_txd3: emac_rgmii_txd3 { mux { pins = "gpio6"; - function = "rgmii_txd3"; + function = "rgmii"; }; config { @@ -4878,7 +4878,7 @@ emac_rgmii_txc: emac_rgmii_txc { mux { pins = "gpio114"; - function = "rgmii_txc"; + function = "rgmii"; }; config { @@ -4891,7 +4891,7 @@ emac_rgmii_tx_ctl: emac_rgmii_tx_ctl { mux { pins = "gpio121"; - function = "rgmii_tx"; + function = "rgmii"; }; config { @@ -4905,7 +4905,7 @@ emac_rgmii_rxd0: emac_rgmii_rxd0 { mux { pins = "gpio117"; - function = "rgmii_rxd0"; + function = "rgmii"; }; config { @@ -4918,7 +4918,7 @@ emac_rgmii_rxd1: emac_rgmii_rxd1 { mux { pins = "gpio118"; - function = "rgmii_rxd1"; + function = "rgmii"; }; config { @@ -4931,7 +4931,7 @@ emac_rgmii_rxd2: emac_rgmii_rxd2 { mux { pins = "gpio119"; - function = "rgmii_rxd2"; + function = "rgmii"; }; config { @@ -4944,7 +4944,7 @@ emac_rgmii_rxd3: emac_rgmii_rxd3 { mux { pins = "gpio120"; - function = "rgmii_rxd3"; + function = "rgmii"; }; config { @@ -4957,7 +4957,7 @@ emac_rgmii_rxc: emac_rgmii_rxc { mux { pins = "gpio115"; - function = "rgmii_rxc"; + function = "rgmii"; }; config { @@ -4970,7 +4970,7 @@ emac_rgmii_rx_ctl: emac_rgmii_rx_ctl { mux { pins = "gpio116"; - function = "rgmii_rx"; + function = "rgmii"; }; config {