From 411a3dba3b425b7db34771b0ce4fcd9c20871457 Mon Sep 17 00:00:00 2001
From: Harigovindan P <harigovi@qti.qualcomm.com>
Date: Thu, 15 Oct 2020 12:20:10 +0530
Subject: [PATCH] ARM: dts: msm: Enable LCD_REG_EN gpio and LCD_BKLT_PWM on
 shima

Enabling LCD_REG_EN gpio on shima pinctrls and LCD_BKLT_PWM
on shima pmic overlays on shima target.

Change-Id: If02438f5c28160b643248e3b403c65083e9b6e56
---
 qcom/shima-pinctrl.dtsi      |  8 ++++----
 qcom/shima-pmic-overlay.dtsi | 12 ++++++++++++
 2 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/qcom/shima-pinctrl.dtsi b/qcom/shima-pinctrl.dtsi
index 91e3b21c26af..eeb47a49d145 100644
--- a/qcom/shima-pinctrl.dtsi
+++ b/qcom/shima-pinctrl.dtsi
@@ -2872,12 +2872,12 @@
 		pmx_sde: pmx_sde {
 			sde_dsi_active: sde_dsi_active {
 				mux {
-					pins = "gpio24";
+					pins = "gpio24", "gpio47";
 					function = "gpio";
 				};
 
 				config {
-					pins = "gpio24";
+					pins = "gpio24", "gpio47";
 					drive-strength = <8>;   /* 8 mA */
 					bias-disable = <0>;     /* no pull */
 				};
@@ -2885,12 +2885,12 @@
 
 			sde_dsi_suspend: sde_dsi_suspend {
 				mux {
-					pins = "gpio24";
+					pins = "gpio24", "gpio47";
 					function = "gpio";
 				};
 
 				config {
-					pins = "gpio24";
+					pins = "gpio24", "gpio47";
 					drive-strength = <2>;   /* 2 mA */
 					bias-pull-down;         /* PULL DOWN */
 				};
diff --git a/qcom/shima-pmic-overlay.dtsi b/qcom/shima-pmic-overlay.dtsi
index de365f79de68..d83e6fa3b45c 100644
--- a/qcom/shima-pmic-overlay.dtsi
+++ b/qcom/shima-pmic-overlay.dtsi
@@ -47,6 +47,18 @@
 			power-source = <1>;
 		};
 	};
+
+	lcd_backlight_ctrl {
+		lcd_backlight_ctrl_default: lcd_backlight_ctrl_default {
+			pins = "gpio9";
+			function = "func1";
+			input-disable;
+			output-enable;
+			bias-disable;
+			power-source = <1>;     /* 1.8V */
+			qcom,drive-strength = <2>;
+		};
+	};
 };
 
 &pmk8350_vadc {