From a617d78e48a4cd264745c5cd58aaa42fd1302984 Mon Sep 17 00:00:00 2001 From: George Shen Date: Thu, 18 Jun 2020 16:14:13 -0700 Subject: [PATCH] msm: cvp: Add IPCC mapping for CVP FW Enable CVP to handle IPCC interrupts. Change-Id: I086f63dc77728c91c80f9832009ff7d25ba9bccd Signed-off-by: George Shen --- drivers/media/platform/msm/cvp/cvp_hfi.c | 7 ++++ drivers/media/platform/msm/cvp/msm_cvp_buf.h | 1 + .../platform/msm/cvp/msm_cvp_res_parse.c | 23 +++++++++++ .../platform/msm/cvp/msm_cvp_resources.h | 2 + drivers/media/platform/msm/cvp/msm_smem.c | 39 +++++++++++++++++++ 5 files changed, 72 insertions(+) diff --git a/drivers/media/platform/msm/cvp/cvp_hfi.c b/drivers/media/platform/msm/cvp/cvp_hfi.c index ada9ce10e71c..b26ca36a0d99 100644 --- a/drivers/media/platform/msm/cvp/cvp_hfi.c +++ b/drivers/media/platform/msm/cvp/cvp_hfi.c @@ -1964,6 +1964,7 @@ static int __sys_set_power_control(struct iris_hfi_device *device, static int iris_hfi_core_init(void *device) { int rc = 0; + u32 ipcc_iova; struct cvp_hfi_cmd_sys_init_packet pkt; struct cvp_hfi_cmd_sys_get_property_packet version_pkt; struct iris_hfi_device *dev; @@ -2011,6 +2012,12 @@ static int iris_hfi_core_init(void *device) goto err_core_init; } + rc = msm_cvp_map_ipcc_regs(&ipcc_iova); + if (!rc) { + dprintk(CVP_CORE, "IPCC iova 0x%x\n", ipcc_iova); + __write_register(dev, CVP_MMAP_ADDR, ipcc_iova); + } + rc = __boot_firmware(dev); if (rc) { dprintk(CVP_ERR, "Failed to start core\n"); diff --git a/drivers/media/platform/msm/cvp/msm_cvp_buf.h b/drivers/media/platform/msm/cvp/msm_cvp_buf.h index 112a2881c795..0b3fef0d1cc6 100644 --- a/drivers/media/platform/msm/cvp/msm_cvp_buf.h +++ b/drivers/media/platform/msm/cvp/msm_cvp_buf.h @@ -167,6 +167,7 @@ int msm_cvp_smem_cache_operations(struct dma_buf *dbuf, enum smem_cache_ops cache_op, unsigned long offset, unsigned long size); +int msm_cvp_map_ipcc_regs(u32 *iova); /* CVP driver internal buffer management functions*/ struct cvp_internal_buf *cvp_allocate_arp_bufs(struct msm_cvp_inst *inst, diff --git a/drivers/media/platform/msm/cvp/msm_cvp_res_parse.c b/drivers/media/platform/msm/cvp/msm_cvp_res_parse.c index 59fc1d3bfa26..2ff704c8ca9e 100644 --- a/drivers/media/platform/msm/cvp/msm_cvp_res_parse.c +++ b/drivers/media/platform/msm/cvp/msm_cvp_res_parse.c @@ -115,6 +115,25 @@ void msm_cvp_free_platform_resources( msm_cvp_free_bus_vectors(res); } +static int msm_cvp_load_ipcc_regs(struct msm_cvp_platform_resources *res) +{ + int ret = 0; + unsigned int reg_config[2]; + struct platform_device *pdev = res->pdev; + + ret = of_property_read_u32_array(pdev->dev.of_node, "qcom,ipcc-reg", + reg_config, 2); + if (ret) { + dprintk(CVP_ERR, "Failed to read ipcc reg: %d\n", ret); + return ret; + } + + res->ipcc_reg_base = reg_config[0]; + res->ipcc_reg_size = reg_config[1]; + + return ret; +} + static int msm_cvp_load_reg_table(struct msm_cvp_platform_resources *res) { struct reg_set *reg_set; @@ -783,6 +802,10 @@ int cvp_read_platform_resources_from_dt( goto err_load_reg_table; } + rc = msm_cvp_load_ipcc_regs(res); + if (rc) + dprintk(CVP_ERR, "Failed to load IPCC regs: %d\n", rc); + rc = msm_cvp_load_regulator_table(res); if (rc) { dprintk(CVP_ERR, "Failed to load list of regulators %d\n", rc); diff --git a/drivers/media/platform/msm/cvp/msm_cvp_resources.h b/drivers/media/platform/msm/cvp/msm_cvp_resources.h index 7ce228cbe32a..ad254fb87f0a 100644 --- a/drivers/media/platform/msm/cvp/msm_cvp_resources.h +++ b/drivers/media/platform/msm/cvp/msm_cvp_resources.h @@ -136,7 +136,9 @@ struct msm_cvp_mem_cdsp { struct msm_cvp_platform_resources { phys_addr_t firmware_base; phys_addr_t register_base; + phys_addr_t ipcc_reg_base; uint32_t register_size; + uint32_t ipcc_reg_size; uint32_t irq; uint32_t sku_version; struct allowed_clock_rates_table *allowed_clks_tbl; diff --git a/drivers/media/platform/msm/cvp/msm_smem.c b/drivers/media/platform/msm/cvp/msm_smem.c index 22cc131ecd10..808019151836 100644 --- a/drivers/media/platform/msm/cvp/msm_smem.c +++ b/drivers/media/platform/msm/cvp/msm_smem.c @@ -14,6 +14,7 @@ #include "msm_cvp_core.h" #include "msm_cvp_debug.h" #include "msm_cvp_resources.h" +#include "cvp_core_hfi.h" static int msm_dma_get_device_address(struct dma_buf *dbuf, u32 align, @@ -471,3 +472,41 @@ struct context_bank_info *msm_cvp_smem_get_context_bank(bool is_secure, return match; } + +int msm_cvp_map_ipcc_regs(u32 *iova) +{ + struct context_bank_info *cb; + struct msm_cvp_core *core; + struct cvp_hfi_device *hfi_ops; + struct iris_hfi_device *dev = NULL; + phys_addr_t paddr; + u32 size; + + core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list); + if (core) { + hfi_ops = core->device; + if (hfi_ops) + dev = hfi_ops->hfi_device_data; + } + + if (!dev) + return -EINVAL; + + paddr = dev->res->ipcc_reg_base; + size = dev->res->ipcc_reg_size; + + if (!paddr || !size) + return -EINVAL; + + cb = msm_cvp_smem_get_context_bank(false, dev->res, 0); + if (!cb) { + dprintk(CVP_ERR, "%s: fail to get context bank\n", __func__); + return -EINVAL; + } + *iova = dma_map_resource(cb->dev, paddr, size, DMA_BIDIRECTIONAL, 0); + if (*iova == DMA_MAPPING_ERROR) { + dprintk(CVP_WARN, "%s: fail to map IPCC regs\n", __func__); + return -EFAULT; + } + return 0; +}