From 09301e3a937b18b7ba71f24b86f56a5c6453c20a Mon Sep 17 00:00:00 2001
From: Manuel Gomez <gomez@quicinc.com>
Date: Wed, 15 Sep 2021 14:42:19 -0700
Subject: [PATCH] ARM: dts: msm: WoL IRQ support for AQR

Add interrupt property to configure the WoL interrupt line
connected to GPIO103 from AQR PHY for MBB platforms.

Change-Id: I902832cc1b924d442351f80f73d148853acd3651
---
 qcom/sdxlemur-mtp-mbb-ntn3-pcie.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/qcom/sdxlemur-mtp-mbb-ntn3-pcie.dtsi b/qcom/sdxlemur-mtp-mbb-ntn3-pcie.dtsi
index 68b6c30f9859..a1782da1890d 100644
--- a/qcom/sdxlemur-mtp-mbb-ntn3-pcie.dtsi
+++ b/qcom/sdxlemur-mtp-mbb-ntn3-pcie.dtsi
@@ -114,6 +114,9 @@
 				/* ipa shares this group */
 				qcom,iommu-group = <&ipa_eth_group1>;
 
+				interrupts-extended = <&tlmm 103 IRQ_TYPE_EDGE_FALLING>;
+				interrupt-names = "wol_irq";
+
 				#address-cells = <1>;
 				#size-cells = <1>;
 			};