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x86, UV: add uv_setup_irq() and uv_teardown_irq() functions, v3
Provide a means for UV interrupt MMRs to be setup with the message to be sent when an MSI is raised. Signed-off-by: Dean Nelson <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
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4 changed files with 182 additions and 1 deletions
36
include/asm-x86/uv/uv_irq.h
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include/asm-x86/uv/uv_irq.h
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* SGI UV IRQ definitions
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*
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* Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved.
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*/
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#ifndef ASM_X86__UV__UV_IRQ_H
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#define ASM_X86__UV__UV_IRQ_H
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/* If a generic version of this structure gets defined, eliminate this one. */
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struct uv_IO_APIC_route_entry {
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__u64 vector : 8,
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delivery_mode : 3,
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dest_mode : 1,
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delivery_status : 1,
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polarity : 1,
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__reserved_1 : 1,
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trigger : 1,
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mask : 1,
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__reserved_2 : 15,
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dest : 32;
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};
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extern struct irq_chip uv_irq_chip;
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extern int arch_enable_uv_irq(char *, unsigned int, int, int, unsigned long);
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extern void arch_disable_uv_irq(int, unsigned long);
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extern int uv_setup_irq(char *, int, int, unsigned long);
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extern void uv_teardown_irq(unsigned int, int, unsigned long);
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#endif /* ASM_X86__UV__UV_IRQ_H */
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