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staging: most: dim2: Remove function dimcb_io_read()
Remove function dimcb_io_read as it does nothing except call inbuilt function readl. Modify call sites accordingly. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lore.kernel.org/r/20190708064145.3250-2-nishkadg.linux@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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parent
8826a1985f
commit
41e359e6da
3 changed files with 8 additions and 18 deletions
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@ -128,15 +128,6 @@ bool dim2_sysfs_get_state_cb(void)
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return state;
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}
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/**
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* dimcb_io_read - callback from HAL to read an I/O register
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* @ptr32: register address
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*/
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u32 dimcb_io_read(u32 __iomem *ptr32)
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{
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return readl(ptr32);
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}
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/**
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* dimcb_io_write - callback from HAL to write value to an I/O register
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* @ptr32: register address
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@ -13,6 +13,7 @@
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#include "reg.h"
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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/*
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* Size factor for isochronous DBR buffer.
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@ -146,7 +147,7 @@ static void dim2_transfer_madr(u32 val)
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dimcb_io_write(&g.dim2->MADR, val);
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/* wait for transfer completion */
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while ((dimcb_io_read(&g.dim2->MCTL) & 1) != 1)
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while ((readl(&g.dim2->MCTL) & 1) != 1)
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continue;
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dimcb_io_write(&g.dim2->MCTL, 0); /* clear transfer complete */
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@ -170,7 +171,7 @@ static u32 dim2_read_ctr(u32 ctr_addr, u16 mdat_idx)
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{
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dim2_transfer_madr(ctr_addr);
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return dimcb_io_read((&g.dim2->MDAT0) + mdat_idx);
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return readl((&g.dim2->MDAT0) + mdat_idx);
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}
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static void dim2_write_ctr_mask(u32 ctr_addr, const u32 *mask, const u32 *value)
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@ -357,14 +358,14 @@ static void dim2_configure_channel(
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/* unmask interrupt for used channel, enable mlb_sys_int[0] interrupt */
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dimcb_io_write(&g.dim2->ACMR0,
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dimcb_io_read(&g.dim2->ACMR0) | bit_mask(ch_addr));
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readl(&g.dim2->ACMR0) | bit_mask(ch_addr));
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}
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static void dim2_clear_channel(u8 ch_addr)
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{
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/* mask interrupt for used channel, disable mlb_sys_int[0] interrupt */
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dimcb_io_write(&g.dim2->ACMR0,
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dimcb_io_read(&g.dim2->ACMR0) & ~bit_mask(ch_addr));
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readl(&g.dim2->ACMR0) & ~bit_mask(ch_addr));
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dim2_clear_cat(AHB_CAT, ch_addr);
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dim2_clear_adt(ch_addr);
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@ -562,12 +563,12 @@ static bool dim2_is_mlb_locked(void)
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u32 const mask0 = bit_mask(MLBC0_MLBLK_BIT);
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u32 const mask1 = bit_mask(MLBC1_CLKMERR_BIT) |
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bit_mask(MLBC1_LOCKERR_BIT);
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u32 const c1 = dimcb_io_read(&g.dim2->MLBC1);
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u32 const c1 = readl(&g.dim2->MLBC1);
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u32 const nda_mask = (u32)MLBC1_NDA_MASK << MLBC1_NDA_SHIFT;
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dimcb_io_write(&g.dim2->MLBC1, c1 & nda_mask);
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return (dimcb_io_read(&g.dim2->MLBC1) & mask1) == 0 &&
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(dimcb_io_read(&g.dim2->MLBC0) & mask0) != 0;
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return (readl(&g.dim2->MLBC1) & mask1) == 0 &&
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(readl(&g.dim2->MLBC0) & mask0) != 0;
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}
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/* -------------------------------------------------------------------------- */
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@ -97,8 +97,6 @@ bool dim_enqueue_buffer(struct dim_channel *ch, u32 buffer_addr,
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bool dim_detach_buffers(struct dim_channel *ch, u16 buffers_number);
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u32 dimcb_io_read(u32 __iomem *ptr32);
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void dimcb_io_write(u32 __iomem *ptr32, u32 value);
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void dimcb_on_error(u8 error_id, const char *error_message);
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