mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 10:41:38 -04:00
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next into for-davem
This commit is contained in:
commit
4205e6ef4e
210 changed files with 7702 additions and 4987 deletions
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@ -31,6 +31,8 @@ int __init bcma_bus_early_register(struct bcma_bus *bus,
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int bcma_bus_suspend(struct bcma_bus *bus);
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int bcma_bus_resume(struct bcma_bus *bus);
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#endif
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struct bcma_device *bcma_find_core_unit(struct bcma_bus *bus, u16 coreid,
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u8 unit);
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/* scan.c */
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int bcma_bus_scan(struct bcma_bus *bus);
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@ -329,7 +329,7 @@ void bcma_chipco_serial_init(struct bcma_drv_cc *cc)
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return;
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}
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irq = bcma_core_mips_irq(cc->core);
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irq = bcma_core_irq(cc->core);
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/* Determine the registers of the UARTs */
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cc->nr_serial_ports = (cc->capabilities & BCMA_CC_CAP_NRUART);
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@ -74,28 +74,41 @@ static u32 bcma_core_mips_irqflag(struct bcma_device *dev)
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return dev->core_index;
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flag = bcma_aread32(dev, BCMA_MIPS_OOBSELOUTA30);
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return flag & 0x1F;
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if (flag)
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return flag & 0x1F;
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else
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return 0x3f;
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}
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/* Get the MIPS IRQ assignment for a specified device.
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* If unassigned, 0 is returned.
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* If disabled, 5 is returned.
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* If not supported, 6 is returned.
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*/
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unsigned int bcma_core_mips_irq(struct bcma_device *dev)
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static unsigned int bcma_core_mips_irq(struct bcma_device *dev)
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{
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struct bcma_device *mdev = dev->bus->drv_mips.core;
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u32 irqflag;
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unsigned int irq;
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irqflag = bcma_core_mips_irqflag(dev);
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if (irqflag == 0x3f)
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return 6;
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for (irq = 1; irq <= 4; irq++)
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for (irq = 0; irq <= 4; irq++)
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if (bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq)) &
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(1 << irqflag))
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return irq;
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return 0;
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return 5;
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}
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EXPORT_SYMBOL(bcma_core_mips_irq);
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unsigned int bcma_core_irq(struct bcma_device *dev)
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{
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unsigned int mips_irq = bcma_core_mips_irq(dev);
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return mips_irq <= 4 ? mips_irq + 2 : 0;
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}
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EXPORT_SYMBOL(bcma_core_irq);
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static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
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{
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@ -114,7 +127,7 @@ static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
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bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0),
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bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) &
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~(1 << irqflag));
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else
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else if (oldirq != 5)
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bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(oldirq), 0);
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/* assign the new one */
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@ -123,9 +136,9 @@ static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
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bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) |
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(1 << irqflag));
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} else {
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u32 oldirqflag = bcma_read32(mdev,
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BCMA_MIPS_MIPS74K_INTMASK(irq));
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if (oldirqflag) {
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u32 irqinitmask = bcma_read32(mdev,
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BCMA_MIPS_MIPS74K_INTMASK(irq));
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if (irqinitmask) {
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struct bcma_device *core;
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/* backplane irq line is in use, find out who uses
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@ -133,7 +146,7 @@ static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
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*/
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list_for_each_entry(core, &bus->cores, list) {
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if ((1 << bcma_core_mips_irqflag(core)) ==
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oldirqflag) {
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irqinitmask) {
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bcma_core_mips_set_irq(core, 0);
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break;
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}
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@ -143,15 +156,31 @@ static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
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1 << irqflag);
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}
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bcma_info(bus, "set_irq: core 0x%04x, irq %d => %d\n",
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dev->id.id, oldirq + 2, irq + 2);
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bcma_debug(bus, "set_irq: core 0x%04x, irq %d => %d\n",
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dev->id.id, oldirq <= 4 ? oldirq + 2 : 0, irq + 2);
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}
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static void bcma_core_mips_set_irq_name(struct bcma_bus *bus, unsigned int irq,
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u16 coreid, u8 unit)
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{
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struct bcma_device *core;
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core = bcma_find_core_unit(bus, coreid, unit);
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if (!core) {
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bcma_warn(bus,
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"Can not find core (id: 0x%x, unit %i) for IRQ configuration.\n",
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coreid, unit);
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return;
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}
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bcma_core_mips_set_irq(core, irq);
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}
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static void bcma_core_mips_print_irq(struct bcma_device *dev, unsigned int irq)
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{
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int i;
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static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"};
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printk(KERN_INFO KBUILD_MODNAME ": core 0x%04x, irq :", dev->id.id);
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printk(KERN_DEBUG KBUILD_MODNAME ": core 0x%04x, irq :", dev->id.id);
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for (i = 0; i <= 6; i++)
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printk(" %s%s", irq_name[i], i == irq ? "*" : " ");
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printk("\n");
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@ -227,6 +256,32 @@ void bcma_core_mips_early_init(struct bcma_drv_mips *mcore)
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mcore->early_setup_done = true;
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}
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static void bcma_fix_i2s_irqflag(struct bcma_bus *bus)
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{
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struct bcma_device *cpu, *pcie, *i2s;
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/* Fixup the interrupts in 4716/4748 for i2s core (2010 Broadcom SDK)
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* (IRQ flags > 7 are ignored when setting the interrupt masks)
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*/
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if (bus->chipinfo.id != BCMA_CHIP_ID_BCM4716 &&
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bus->chipinfo.id != BCMA_CHIP_ID_BCM4748)
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return;
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cpu = bcma_find_core(bus, BCMA_CORE_MIPS_74K);
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pcie = bcma_find_core(bus, BCMA_CORE_PCIE);
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i2s = bcma_find_core(bus, BCMA_CORE_I2S);
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if (cpu && pcie && i2s &&
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bcma_aread32(cpu, BCMA_MIPS_OOBSELINA74) == 0x08060504 &&
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bcma_aread32(pcie, BCMA_MIPS_OOBSELINA74) == 0x08060504 &&
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bcma_aread32(i2s, BCMA_MIPS_OOBSELOUTA30) == 0x88) {
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bcma_awrite32(cpu, BCMA_MIPS_OOBSELINA74, 0x07060504);
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bcma_awrite32(pcie, BCMA_MIPS_OOBSELINA74, 0x07060504);
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bcma_awrite32(i2s, BCMA_MIPS_OOBSELOUTA30, 0x87);
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bcma_debug(bus,
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"Moved i2s interrupt to oob line 7 instead of 8\n");
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}
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}
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void bcma_core_mips_init(struct bcma_drv_mips *mcore)
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{
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struct bcma_bus *bus;
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@ -236,43 +291,55 @@ void bcma_core_mips_init(struct bcma_drv_mips *mcore)
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if (mcore->setup_done)
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return;
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bcma_info(bus, "Initializing MIPS core...\n");
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bcma_debug(bus, "Initializing MIPS core...\n");
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bcma_core_mips_early_init(mcore);
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mcore->assigned_irqs = 1;
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bcma_fix_i2s_irqflag(bus);
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/* Assign IRQs to all cores on the bus */
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list_for_each_entry(core, &bus->cores, list) {
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int mips_irq;
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if (core->irq)
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continue;
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mips_irq = bcma_core_mips_irq(core);
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if (mips_irq > 4)
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core->irq = 0;
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else
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core->irq = mips_irq + 2;
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if (core->irq > 5)
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continue;
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switch (core->id.id) {
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case BCMA_CORE_PCI:
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case BCMA_CORE_PCIE:
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case BCMA_CORE_ETHERNET:
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case BCMA_CORE_ETHERNET_GBIT:
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case BCMA_CORE_MAC_GBIT:
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case BCMA_CORE_80211:
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case BCMA_CORE_USB20_HOST:
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/* These devices get their own IRQ line if available,
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* the rest goes on IRQ0
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*/
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if (mcore->assigned_irqs <= 4)
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bcma_core_mips_set_irq(core,
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mcore->assigned_irqs++);
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break;
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switch (bus->chipinfo.id) {
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case BCMA_CHIP_ID_BCM4716:
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case BCMA_CHIP_ID_BCM4748:
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bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_80211, 0);
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bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_MAC_GBIT, 0);
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bcma_core_mips_set_irq_name(bus, 3, BCMA_CORE_USB20_HOST, 0);
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bcma_core_mips_set_irq_name(bus, 4, BCMA_CORE_PCIE, 0);
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bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_CHIPCOMMON, 0);
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bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_I2S, 0);
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break;
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case BCMA_CHIP_ID_BCM5356:
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case BCMA_CHIP_ID_BCM47162:
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case BCMA_CHIP_ID_BCM53572:
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bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_80211, 0);
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bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_MAC_GBIT, 0);
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bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_CHIPCOMMON, 0);
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break;
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case BCMA_CHIP_ID_BCM5357:
|
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case BCMA_CHIP_ID_BCM4749:
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bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_80211, 0);
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bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_MAC_GBIT, 0);
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bcma_core_mips_set_irq_name(bus, 3, BCMA_CORE_USB20_HOST, 0);
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bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_CHIPCOMMON, 0);
|
||||
bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_I2S, 0);
|
||||
break;
|
||||
case BCMA_CHIP_ID_BCM4706:
|
||||
bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_PCIE, 0);
|
||||
bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_4706_MAC_GBIT,
|
||||
0);
|
||||
bcma_core_mips_set_irq_name(bus, 3, BCMA_CORE_PCIE, 1);
|
||||
bcma_core_mips_set_irq_name(bus, 4, BCMA_CORE_USB20_HOST, 0);
|
||||
bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_4706_CHIPCOMMON,
|
||||
0);
|
||||
break;
|
||||
default:
|
||||
list_for_each_entry(core, &bus->cores, list) {
|
||||
core->irq = bcma_core_irq(core);
|
||||
}
|
||||
bcma_err(bus,
|
||||
"Unknown device (0x%x) found, can not configure IRQs\n",
|
||||
bus->chipinfo.id);
|
||||
}
|
||||
bcma_info(bus, "IRQ reconfiguration done\n");
|
||||
bcma_debug(bus, "IRQ reconfiguration done\n");
|
||||
bcma_core_mips_dump_irq(bus);
|
||||
|
||||
mcore->setup_done = true;
|
||||
|
|
|
|||
|
|
@ -94,19 +94,19 @@ static int bcma_extpci_read_config(struct bcma_drv_pci *pc, unsigned int dev,
|
|||
if (dev == 0) {
|
||||
/* we support only two functions on device 0 */
|
||||
if (func > 1)
|
||||
return -EINVAL;
|
||||
goto out;
|
||||
|
||||
/* accesses to config registers with offsets >= 256
|
||||
* requires indirect access.
|
||||
*/
|
||||
if (off >= PCI_CONFIG_SPACE_SIZE) {
|
||||
addr = (func << 12);
|
||||
addr |= (off & 0x0FFF);
|
||||
addr |= (off & 0x0FFC);
|
||||
val = bcma_pcie_read_config(pc, addr);
|
||||
} else {
|
||||
addr = BCMA_CORE_PCI_PCICFG0;
|
||||
addr |= (func << 8);
|
||||
addr |= (off & 0xfc);
|
||||
addr |= (off & 0xFC);
|
||||
val = pcicore_read32(pc, addr);
|
||||
}
|
||||
} else {
|
||||
|
|
@ -119,11 +119,9 @@ static int bcma_extpci_read_config(struct bcma_drv_pci *pc, unsigned int dev,
|
|||
goto out;
|
||||
|
||||
if (mips_busprobe32(val, mmio)) {
|
||||
val = 0xffffffff;
|
||||
val = 0xFFFFFFFF;
|
||||
goto unmap;
|
||||
}
|
||||
|
||||
val = readl(mmio);
|
||||
}
|
||||
val >>= (8 * (off & 3));
|
||||
|
||||
|
|
@ -151,7 +149,7 @@ static int bcma_extpci_write_config(struct bcma_drv_pci *pc, unsigned int dev,
|
|||
const void *buf, int len)
|
||||
{
|
||||
int err = -EINVAL;
|
||||
u32 addr = 0, val = 0;
|
||||
u32 addr, val;
|
||||
void __iomem *mmio = 0;
|
||||
u16 chipid = pc->core->bus->chipinfo.id;
|
||||
|
||||
|
|
@ -159,16 +157,22 @@ static int bcma_extpci_write_config(struct bcma_drv_pci *pc, unsigned int dev,
|
|||
if (unlikely(len != 1 && len != 2 && len != 4))
|
||||
goto out;
|
||||
if (dev == 0) {
|
||||
/* we support only two functions on device 0 */
|
||||
if (func > 1)
|
||||
goto out;
|
||||
|
||||
/* accesses to config registers with offsets >= 256
|
||||
* requires indirect access.
|
||||
*/
|
||||
if (off < PCI_CONFIG_SPACE_SIZE) {
|
||||
addr = pc->core->addr + BCMA_CORE_PCI_PCICFG0;
|
||||
if (off >= PCI_CONFIG_SPACE_SIZE) {
|
||||
addr = (func << 12);
|
||||
addr |= (off & 0x0FFC);
|
||||
val = bcma_pcie_read_config(pc, addr);
|
||||
} else {
|
||||
addr = BCMA_CORE_PCI_PCICFG0;
|
||||
addr |= (func << 8);
|
||||
addr |= (off & 0xfc);
|
||||
mmio = ioremap_nocache(addr, sizeof(val));
|
||||
if (!mmio)
|
||||
goto out;
|
||||
addr |= (off & 0xFC);
|
||||
val = pcicore_read32(pc, addr);
|
||||
}
|
||||
} else {
|
||||
addr = bcma_get_cfgspace_addr(pc, dev, func, off);
|
||||
|
|
@ -180,19 +184,17 @@ static int bcma_extpci_write_config(struct bcma_drv_pci *pc, unsigned int dev,
|
|||
goto out;
|
||||
|
||||
if (mips_busprobe32(val, mmio)) {
|
||||
val = 0xffffffff;
|
||||
val = 0xFFFFFFFF;
|
||||
goto unmap;
|
||||
}
|
||||
}
|
||||
|
||||
switch (len) {
|
||||
case 1:
|
||||
val = readl(mmio);
|
||||
val &= ~(0xFF << (8 * (off & 3)));
|
||||
val |= *((const u8 *)buf) << (8 * (off & 3));
|
||||
break;
|
||||
case 2:
|
||||
val = readl(mmio);
|
||||
val &= ~(0xFFFF << (8 * (off & 3)));
|
||||
val |= *((const u16 *)buf) << (8 * (off & 3));
|
||||
break;
|
||||
|
|
@ -200,13 +202,14 @@ static int bcma_extpci_write_config(struct bcma_drv_pci *pc, unsigned int dev,
|
|||
val = *((const u32 *)buf);
|
||||
break;
|
||||
}
|
||||
if (dev == 0 && !addr) {
|
||||
if (dev == 0) {
|
||||
/* accesses to config registers with offsets >= 256
|
||||
* requires indirect access.
|
||||
*/
|
||||
addr = (func << 12);
|
||||
addr |= (off & 0x0FFF);
|
||||
bcma_pcie_write_config(pc, addr, val);
|
||||
if (off >= PCI_CONFIG_SPACE_SIZE)
|
||||
bcma_pcie_write_config(pc, addr, val);
|
||||
else
|
||||
pcicore_write32(pc, addr, val);
|
||||
} else {
|
||||
writel(val, mmio);
|
||||
|
||||
|
|
@ -276,7 +279,7 @@ static u8 bcma_find_pci_capability(struct bcma_drv_pci *pc, unsigned int dev,
|
|||
/* check for Header type 0 */
|
||||
bcma_extpci_read_config(pc, dev, func, PCI_HEADER_TYPE, &byte_val,
|
||||
sizeof(u8));
|
||||
if ((byte_val & 0x7f) != PCI_HEADER_TYPE_NORMAL)
|
||||
if ((byte_val & 0x7F) != PCI_HEADER_TYPE_NORMAL)
|
||||
return cap_ptr;
|
||||
|
||||
/* check if the capability pointer field exists */
|
||||
|
|
@ -426,7 +429,7 @@ void bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc)
|
|||
/* Reset RC */
|
||||
usleep_range(3000, 5000);
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_CTL, BCMA_CORE_PCI_CTL_RST_OE);
|
||||
usleep_range(1000, 2000);
|
||||
msleep(50);
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_CTL, BCMA_CORE_PCI_CTL_RST |
|
||||
BCMA_CORE_PCI_CTL_RST_OE);
|
||||
|
||||
|
|
@ -488,6 +491,17 @@ void bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc)
|
|||
|
||||
bcma_core_pci_enable_crs(pc);
|
||||
|
||||
if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4706 ||
|
||||
bus->chipinfo.id == BCMA_CHIP_ID_BCM4716) {
|
||||
u16 val16;
|
||||
bcma_extpci_read_config(pc, 0, 0, BCMA_CORE_PCI_CFG_DEVCTRL,
|
||||
&val16, sizeof(val16));
|
||||
val16 |= (2 << 5); /* Max payload size of 512 */
|
||||
val16 |= (2 << 12); /* MRRS 512 */
|
||||
bcma_extpci_write_config(pc, 0, 0, BCMA_CORE_PCI_CFG_DEVCTRL,
|
||||
&val16, sizeof(val16));
|
||||
}
|
||||
|
||||
/* Enable PCI bridge BAR0 memory & master access */
|
||||
tmp = PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
|
||||
bcma_extpci_write_config(pc, 0, 0, PCI_COMMAND, &tmp, sizeof(tmp));
|
||||
|
|
@ -576,7 +590,7 @@ int bcma_core_pci_plat_dev_init(struct pci_dev *dev)
|
|||
pr_info("PCI: Fixing up device %s\n", pci_name(dev));
|
||||
|
||||
/* Fix up interrupt lines */
|
||||
dev->irq = bcma_core_mips_irq(pc_host->pdev->core) + 2;
|
||||
dev->irq = bcma_core_irq(pc_host->pdev->core);
|
||||
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
|
||||
|
||||
return 0;
|
||||
|
|
@ -595,6 +609,6 @@ int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev)
|
|||
|
||||
pc_host = container_of(dev->bus->ops, struct bcma_drv_pci_host,
|
||||
pci_ops);
|
||||
return bcma_core_mips_irq(pc_host->pdev->core) + 2;
|
||||
return bcma_core_irq(pc_host->pdev->core);
|
||||
}
|
||||
EXPORT_SYMBOL(bcma_core_pci_pcibios_map_irq);
|
||||
|
|
|
|||
|
|
@ -81,8 +81,8 @@ struct bcma_device *bcma_find_core(struct bcma_bus *bus, u16 coreid)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(bcma_find_core);
|
||||
|
||||
static struct bcma_device *bcma_find_core_unit(struct bcma_bus *bus, u16 coreid,
|
||||
u8 unit)
|
||||
struct bcma_device *bcma_find_core_unit(struct bcma_bus *bus, u16 coreid,
|
||||
u8 unit)
|
||||
{
|
||||
struct bcma_device *core;
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue