mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 19:21:31 -04:00
PCI changes for the v3.16 merge window:
Enumeration
- Notify driver before and after device reset (Keith Busch)
- Use reset notification in NVMe (Keith Busch)
NUMA
- Warn if we have to guess host bridge node information (Myron Stowe)
- Work around AMD Fam15h BIOSes that fail to provide _PXM (Suravee Suthikulpanit)
- Clean up and mark early_root_info_init() as deprecated (Suravee Suthikulpanit)
Driver binding
- Add "driver_override" for force specific binding (Alex Williamson)
- Fail "new_id" addition for devices we already know about (Bandan Das)
Resource management
- Support BAR sizes up to 8GB (Nikhil Rao, Alan Cox)
- Don't move IORESOURCE_PCI_FIXED resources (Bjorn Helgaas)
- Mark SBx00 HPET BAR as IORESOURCE_PCI_FIXED (Bjorn Helgaas)
- Fail safely if we can't handle BARs larger than 4GB (Bjorn Helgaas)
- Reject BAR above 4GB if dma_addr_t is too small (Bjorn Helgaas)
- Don't convert BAR address to resource if dma_addr_t is too small (Bjorn Helgaas)
- Don't set BAR to zero if dma_addr_t is too small (Bjorn Helgaas)
- Don't print anything while decoding is disabled (Bjorn Helgaas)
- Don't add disabled subtractive decode bus resources (Bjorn Helgaas)
- Add resource allocation comments (Bjorn Helgaas)
- Restrict 64-bit prefetchable bridge windows to 64-bit resources (Yinghai Lu)
- Assign i82875p_edac PCI resources before adding device (Yinghai Lu)
PCI device hotplug
- Remove unnecessary "dev->bus" test (Bjorn Helgaas)
- Use PCI_EXP_SLTCAP_PSN define (Bjorn Helgaas)
- Fix rphahp endianess issues (Laurent Dufour)
- Acknowledge spurious "cmd completed" event (Rajat Jain)
- Allow hotplug service drivers to operate in polling mode (Rajat Jain)
- Fix cpqphp possible NULL dereference (Rickard Strandqvist)
MSI
- Replace pci_enable_msi_block() by pci_enable_msi_exact() (Alexander Gordeev)
- Replace pci_enable_msix() by pci_enable_msix_exact() (Alexander Gordeev)
- Simplify populate_msi_sysfs() (Jan Beulich)
Virtualization
- Add Intel Patsburg (X79) root port ACS quirk (Alex Williamson)
- Mark RTL8110SC INTx masking as broken (Alex Williamson)
Generic host bridge driver
- Add generic PCI host controller driver (Will Deacon)
Freescale i.MX6
- Use new clock names (Lucas Stach)
- Drop old IRQ mapping (Lucas Stach)
- Remove optional (and unused) IRQs (Lucas Stach)
- Add support for MSI (Lucas Stach)
- Fix imx6_add_pcie_port() section mismatch warning (Sachin Kamat)
Renesas R-Car
- Add gen2 device tree support (Ben Dooks)
- Use new OF interrupt mapping when possible (Lucas Stach)
- Add PCIe driver (Phil Edworthy)
- Add PCIe MSI support (Phil Edworthy)
- Add PCIe device tree bindings (Phil Edworthy)
Samsung Exynos
- Remove unnecessary OOM messages (Jingoo Han)
- Fix add_pcie_port() section mismatch warning (Sachin Kamat)
Synopsys DesignWare
- Make MSI ISR shared IRQ aware (Lucas Stach)
Miscellaneous
- Check for broken config space aliasing (Alex Williamson)
- Update email address (Ben Hutchings)
- Fix Broadcom CNB20LE unintended sign extension (Bjorn Helgaas)
- Fix incorrect vgaarb conditional in WARN_ON() (Bjorn Helgaas)
- Remove unnecessary __ref annotations (Bjorn Helgaas)
- Add arch/x86/kernel/quirks.c to MAINTAINERS PCI file patterns (Bjorn Helgaas)
- Fix use of uninitialized MPS value (Bjorn Helgaas)
- Tidy x86/gart messages (Bjorn Helgaas)
- Fix return value from pci_user_{read,write}_config_*() (Gavin Shan)
- Turn pcibios_penalize_isa_irq() into a weak function (Hanjun Guo)
- Remove unused serial device IDs (Jean Delvare)
- Use designated initialization in PCI_VDEVICE (Mark Rustad)
- Fix powerpc NULL dereference in pci_root_buses traversal (Mike Qiu)
- Configure MPS on ARM (Murali Karicheri)
- Remove unnecessary includes of <linux/init.h> (Paul Gortmaker)
- Move Open Firmware devspec attribute to PCI common code (Sebastian Ott)
- Use pdev->dev.groups for attribute creation on s390 (Sebastian Ott)
- Remove pcibios_add_platform_entries() (Sebastian Ott)
- Add new ID for Intel GPU "spurious interrupt" quirk (Thomas Jarosch)
- Rename pci_is_bridge() to pci_has_subordinate() (Yijing Wang)
- Add and use new pci_is_bridge() interface (Yijing Wang)
- Make pci_bus_add_device() void (Yijing Wang)
DMA API
- Clarify physical/bus address distinction in docs (Bjorn Helgaas)
- Fix typos in docs (Emilio López)
- Update dma_pool_create ()and dma_pool_alloc() descriptions (Gioh Kim)
- Change dma_declare_coherent_memory() CPU address to phys_addr_t (Bjorn Helgaas)
- Pass GAPSPCI_DMA_BASE CPU & bus address to dma_declare_coherent_memory() (Bjorn Helgaas)
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Merge tag 'pci-v3.16-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci into next
Pull PCI changes from Bjorn Helgaas:
"Enumeration
- Notify driver before and after device reset (Keith Busch)
- Use reset notification in NVMe (Keith Busch)
NUMA
- Warn if we have to guess host bridge node information (Myron Stowe)
- Work around AMD Fam15h BIOSes that fail to provide _PXM (Suravee
Suthikulpanit)
- Clean up and mark early_root_info_init() as deprecated (Suravee
Suthikulpanit)
Driver binding
- Add "driver_override" for force specific binding (Alex Williamson)
- Fail "new_id" addition for devices we already know about (Bandan
Das)
Resource management
- Support BAR sizes up to 8GB (Nikhil Rao, Alan Cox)
- Don't move IORESOURCE_PCI_FIXED resources (Bjorn Helgaas)
- Mark SBx00 HPET BAR as IORESOURCE_PCI_FIXED (Bjorn Helgaas)
- Fail safely if we can't handle BARs larger than 4GB (Bjorn Helgaas)
- Reject BAR above 4GB if dma_addr_t is too small (Bjorn Helgaas)
- Don't convert BAR address to resource if dma_addr_t is too small
(Bjorn Helgaas)
- Don't set BAR to zero if dma_addr_t is too small (Bjorn Helgaas)
- Don't print anything while decoding is disabled (Bjorn Helgaas)
- Don't add disabled subtractive decode bus resources (Bjorn Helgaas)
- Add resource allocation comments (Bjorn Helgaas)
- Restrict 64-bit prefetchable bridge windows to 64-bit resources
(Yinghai Lu)
- Assign i82875p_edac PCI resources before adding device (Yinghai Lu)
PCI device hotplug
- Remove unnecessary "dev->bus" test (Bjorn Helgaas)
- Use PCI_EXP_SLTCAP_PSN define (Bjorn Helgaas)
- Fix rphahp endianess issues (Laurent Dufour)
- Acknowledge spurious "cmd completed" event (Rajat Jain)
- Allow hotplug service drivers to operate in polling mode (Rajat Jain)
- Fix cpqphp possible NULL dereference (Rickard Strandqvist)
MSI
- Replace pci_enable_msi_block() by pci_enable_msi_exact()
(Alexander Gordeev)
- Replace pci_enable_msix() by pci_enable_msix_exact() (Alexander Gordeev)
- Simplify populate_msi_sysfs() (Jan Beulich)
Virtualization
- Add Intel Patsburg (X79) root port ACS quirk (Alex Williamson)
- Mark RTL8110SC INTx masking as broken (Alex Williamson)
Generic host bridge driver
- Add generic PCI host controller driver (Will Deacon)
Freescale i.MX6
- Use new clock names (Lucas Stach)
- Drop old IRQ mapping (Lucas Stach)
- Remove optional (and unused) IRQs (Lucas Stach)
- Add support for MSI (Lucas Stach)
- Fix imx6_add_pcie_port() section mismatch warning (Sachin Kamat)
Renesas R-Car
- Add gen2 device tree support (Ben Dooks)
- Use new OF interrupt mapping when possible (Lucas Stach)
- Add PCIe driver (Phil Edworthy)
- Add PCIe MSI support (Phil Edworthy)
- Add PCIe device tree bindings (Phil Edworthy)
Samsung Exynos
- Remove unnecessary OOM messages (Jingoo Han)
- Fix add_pcie_port() section mismatch warning (Sachin Kamat)
Synopsys DesignWare
- Make MSI ISR shared IRQ aware (Lucas Stach)
Miscellaneous
- Check for broken config space aliasing (Alex Williamson)
- Update email address (Ben Hutchings)
- Fix Broadcom CNB20LE unintended sign extension (Bjorn Helgaas)
- Fix incorrect vgaarb conditional in WARN_ON() (Bjorn Helgaas)
- Remove unnecessary __ref annotations (Bjorn Helgaas)
- Add arch/x86/kernel/quirks.c to MAINTAINERS PCI file patterns
(Bjorn Helgaas)
- Fix use of uninitialized MPS value (Bjorn Helgaas)
- Tidy x86/gart messages (Bjorn Helgaas)
- Fix return value from pci_user_{read,write}_config_*() (Gavin Shan)
- Turn pcibios_penalize_isa_irq() into a weak function (Hanjun Guo)
- Remove unused serial device IDs (Jean Delvare)
- Use designated initialization in PCI_VDEVICE (Mark Rustad)
- Fix powerpc NULL dereference in pci_root_buses traversal (Mike Qiu)
- Configure MPS on ARM (Murali Karicheri)
- Remove unnecessary includes of <linux/init.h> (Paul Gortmaker)
- Move Open Firmware devspec attribute to PCI common code (Sebastian Ott)
- Use pdev->dev.groups for attribute creation on s390 (Sebastian Ott)
- Remove pcibios_add_platform_entries() (Sebastian Ott)
- Add new ID for Intel GPU "spurious interrupt" quirk (Thomas Jarosch)
- Rename pci_is_bridge() to pci_has_subordinate() (Yijing Wang)
- Add and use new pci_is_bridge() interface (Yijing Wang)
- Make pci_bus_add_device() void (Yijing Wang)
DMA API
- Clarify physical/bus address distinction in docs (Bjorn Helgaas)
- Fix typos in docs (Emilio López)
- Update dma_pool_create ()and dma_pool_alloc() descriptions (Gioh Kim)
- Change dma_declare_coherent_memory() CPU address to phys_addr_t
(Bjorn Helgaas)
- Pass GAPSPCI_DMA_BASE CPU & bus address to dma_declare_coherent_memory()
(Bjorn Helgaas)"
* tag 'pci-v3.16-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (92 commits)
MAINTAINERS: Add generic PCI host controller driver
PCI: generic: Add generic PCI host controller driver
PCI: imx6: Add support for MSI
PCI: designware: Make MSI ISR shared IRQ aware
PCI: imx6: Remove optional (and unused) IRQs
PCI: imx6: Drop old IRQ mapping
PCI: imx6: Use new clock names
i82875p_edac: Assign PCI resources before adding device
ARM/PCI: Call pcie_bus_configure_settings() to set MPS
PCI: imx6: Fix imx6_add_pcie_port() section mismatch warning
PCI: Make pci_bus_add_device() void
PCI: exynos: Fix add_pcie_port() section mismatch warning
PCI: Introduce new device binding path using pci_dev.driver_override
PCI: rcar: Add gen2 device tree support
PCI: cpqphp: Fix possible null pointer dereference
PCI: rcar: Add R-Car PCIe device tree bindings
PCI: rcar: Add MSI support for PCIe
PCI: rcar: Add Renesas R-Car PCIe driver
PCI: Fix return value from pci_user_{read,write}_config_*()
PCI: exynos: Remove unnecessary OOM messages
...
This commit is contained in:
Linus Torvalds
commit
425553209b
98 changed files with 2710 additions and 824 deletions
|
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@ -148,7 +148,7 @@ static noinline void pci_wait_cfg(struct pci_dev *dev)
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int pci_user_read_config_##size \
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(struct pci_dev *dev, int pos, type *val) \
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{ \
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int ret = 0; \
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int ret = PCIBIOS_SUCCESSFUL; \
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u32 data = -1; \
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if (PCI_##size##_BAD) \
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return -EINVAL; \
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@ -159,9 +159,7 @@ int pci_user_read_config_##size \
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pos, sizeof(type), &data); \
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raw_spin_unlock_irq(&pci_lock); \
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*val = (type)data; \
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if (ret > 0) \
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ret = -EINVAL; \
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return ret; \
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return pcibios_err_to_errno(ret); \
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} \
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EXPORT_SYMBOL_GPL(pci_user_read_config_##size);
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@ -170,7 +168,7 @@ EXPORT_SYMBOL_GPL(pci_user_read_config_##size);
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int pci_user_write_config_##size \
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(struct pci_dev *dev, int pos, type val) \
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{ \
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int ret = -EIO; \
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int ret = PCIBIOS_SUCCESSFUL; \
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if (PCI_##size##_BAD) \
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return -EINVAL; \
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raw_spin_lock_irq(&pci_lock); \
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@ -179,9 +177,7 @@ int pci_user_write_config_##size \
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ret = dev->bus->ops->write(dev->bus, dev->devfn, \
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pos, sizeof(type), val); \
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raw_spin_unlock_irq(&pci_lock); \
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if (ret > 0) \
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ret = -EINVAL; \
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return ret; \
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return pcibios_err_to_errno(ret); \
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} \
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EXPORT_SYMBOL_GPL(pci_user_write_config_##size);
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@ -13,7 +13,6 @@
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/proc_fs.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include "pci.h"
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@ -236,7 +235,7 @@ void __weak pcibios_resource_survey_bus(struct pci_bus *bus) { }
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*
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* This adds add sysfs entries and start device drivers
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*/
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int pci_bus_add_device(struct pci_dev *dev)
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void pci_bus_add_device(struct pci_dev *dev)
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{
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int retval;
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@ -253,8 +252,6 @@ int pci_bus_add_device(struct pci_dev *dev)
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WARN_ON(retval < 0);
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dev->is_added = 1;
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return 0;
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}
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/**
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@ -267,16 +264,12 @@ void pci_bus_add_devices(const struct pci_bus *bus)
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{
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struct pci_dev *dev;
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struct pci_bus *child;
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int retval;
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list_for_each_entry(dev, &bus->devices, bus_list) {
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/* Skip already-added devices */
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if (dev->is_added)
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continue;
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retval = pci_bus_add_device(dev);
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if (retval)
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dev_err(&dev->dev, "Error adding device (%d)\n",
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retval);
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pci_bus_add_device(dev);
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}
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list_for_each_entry(dev, &bus->devices, bus_list) {
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@ -3,7 +3,6 @@
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/module.h>
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@ -33,4 +33,17 @@ config PCI_RCAR_GEN2
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There are 3 internal PCI controllers available with a single
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built-in EHCI/OHCI host controller present on each one.
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config PCI_RCAR_GEN2_PCIE
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bool "Renesas R-Car PCIe controller"
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depends on ARCH_SHMOBILE || (ARM && COMPILE_TEST)
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help
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Say Y here if you want PCIe controller support on R-Car Gen2 SoCs.
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config PCI_HOST_GENERIC
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bool "Generic PCI host controller"
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depends on ARM && OF
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help
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Say Y here if you want to support a simple generic PCI host
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controller, such as the one emulated by kvmtool.
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endmenu
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@ -4,3 +4,5 @@ obj-$(CONFIG_PCI_IMX6) += pci-imx6.o
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obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o
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obj-$(CONFIG_PCI_TEGRA) += pci-tegra.o
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obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o
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obj-$(CONFIG_PCI_RCAR_GEN2_PCIE) += pcie-rcar.o
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obj-$(CONFIG_PCI_HOST_GENERIC) += pci-host-generic.o
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@ -415,9 +415,7 @@ static irqreturn_t exynos_pcie_msi_irq_handler(int irq, void *arg)
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{
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struct pcie_port *pp = arg;
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dw_handle_msi_irq(pp);
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return IRQ_HANDLED;
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return dw_handle_msi_irq(pp);
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}
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static void exynos_pcie_msi_init(struct pcie_port *pp)
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@ -511,7 +509,8 @@ static struct pcie_host_ops exynos_pcie_host_ops = {
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.host_init = exynos_pcie_host_init,
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};
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static int add_pcie_port(struct pcie_port *pp, struct platform_device *pdev)
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static int __init add_pcie_port(struct pcie_port *pp,
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struct platform_device *pdev)
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{
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int ret;
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@ -568,10 +567,8 @@ static int __init exynos_pcie_probe(struct platform_device *pdev)
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exynos_pcie = devm_kzalloc(&pdev->dev, sizeof(*exynos_pcie),
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GFP_KERNEL);
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if (!exynos_pcie) {
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dev_err(&pdev->dev, "no memory for exynos pcie\n");
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if (!exynos_pcie)
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return -ENOMEM;
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}
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pp = &exynos_pcie->pp;
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388
drivers/pci/host/pci-host-generic.c
Normal file
388
drivers/pci/host/pci-host-generic.c
Normal file
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@ -0,0 +1,388 @@
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/*
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* Simple, generic PCI host controller driver targetting firmware-initialised
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* systems and virtual machines (e.g. the PCI emulation provided by kvmtool).
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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* GNU General Public License for more details.
|
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*
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* You should have received a copy of the GNU General Public License
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||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Copyright (C) 2014 ARM Limited
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*
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* Author: Will Deacon <will.deacon@arm.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_pci.h>
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#include <linux/platform_device.h>
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struct gen_pci_cfg_bus_ops {
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u32 bus_shift;
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void __iomem *(*map_bus)(struct pci_bus *, unsigned int, int);
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};
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struct gen_pci_cfg_windows {
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struct resource res;
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struct resource bus_range;
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void __iomem **win;
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const struct gen_pci_cfg_bus_ops *ops;
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};
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struct gen_pci {
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struct pci_host_bridge host;
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struct gen_pci_cfg_windows cfg;
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struct list_head resources;
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};
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static void __iomem *gen_pci_map_cfg_bus_cam(struct pci_bus *bus,
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unsigned int devfn,
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int where)
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{
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struct pci_sys_data *sys = bus->sysdata;
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struct gen_pci *pci = sys->private_data;
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resource_size_t idx = bus->number - pci->cfg.bus_range.start;
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return pci->cfg.win[idx] + ((devfn << 8) | where);
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}
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static struct gen_pci_cfg_bus_ops gen_pci_cfg_cam_bus_ops = {
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.bus_shift = 16,
|
||||
.map_bus = gen_pci_map_cfg_bus_cam,
|
||||
};
|
||||
|
||||
static void __iomem *gen_pci_map_cfg_bus_ecam(struct pci_bus *bus,
|
||||
unsigned int devfn,
|
||||
int where)
|
||||
{
|
||||
struct pci_sys_data *sys = bus->sysdata;
|
||||
struct gen_pci *pci = sys->private_data;
|
||||
resource_size_t idx = bus->number - pci->cfg.bus_range.start;
|
||||
|
||||
return pci->cfg.win[idx] + ((devfn << 12) | where);
|
||||
}
|
||||
|
||||
static struct gen_pci_cfg_bus_ops gen_pci_cfg_ecam_bus_ops = {
|
||||
.bus_shift = 20,
|
||||
.map_bus = gen_pci_map_cfg_bus_ecam,
|
||||
};
|
||||
|
||||
static int gen_pci_config_read(struct pci_bus *bus, unsigned int devfn,
|
||||
int where, int size, u32 *val)
|
||||
{
|
||||
void __iomem *addr;
|
||||
struct pci_sys_data *sys = bus->sysdata;
|
||||
struct gen_pci *pci = sys->private_data;
|
||||
|
||||
addr = pci->cfg.ops->map_bus(bus, devfn, where);
|
||||
|
||||
switch (size) {
|
||||
case 1:
|
||||
*val = readb(addr);
|
||||
break;
|
||||
case 2:
|
||||
*val = readw(addr);
|
||||
break;
|
||||
default:
|
||||
*val = readl(addr);
|
||||
}
|
||||
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static int gen_pci_config_write(struct pci_bus *bus, unsigned int devfn,
|
||||
int where, int size, u32 val)
|
||||
{
|
||||
void __iomem *addr;
|
||||
struct pci_sys_data *sys = bus->sysdata;
|
||||
struct gen_pci *pci = sys->private_data;
|
||||
|
||||
addr = pci->cfg.ops->map_bus(bus, devfn, where);
|
||||
|
||||
switch (size) {
|
||||
case 1:
|
||||
writeb(val, addr);
|
||||
break;
|
||||
case 2:
|
||||
writew(val, addr);
|
||||
break;
|
||||
default:
|
||||
writel(val, addr);
|
||||
}
|
||||
|
||||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static struct pci_ops gen_pci_ops = {
|
||||
.read = gen_pci_config_read,
|
||||
.write = gen_pci_config_write,
|
||||
};
|
||||
|
||||
static const struct of_device_id gen_pci_of_match[] = {
|
||||
{ .compatible = "pci-host-cam-generic",
|
||||
.data = &gen_pci_cfg_cam_bus_ops },
|
||||
|
||||
{ .compatible = "pci-host-ecam-generic",
|
||||
.data = &gen_pci_cfg_ecam_bus_ops },
|
||||
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, gen_pci_of_match);
|
||||
|
||||
static int gen_pci_calc_io_offset(struct device *dev,
|
||||
struct of_pci_range *range,
|
||||
struct resource *res,
|
||||
resource_size_t *offset)
|
||||
{
|
||||
static atomic_t wins = ATOMIC_INIT(0);
|
||||
int err, idx, max_win;
|
||||
unsigned int window;
|
||||
|
||||
if (!PAGE_ALIGNED(range->cpu_addr))
|
||||
return -EINVAL;
|
||||
|
||||
max_win = (IO_SPACE_LIMIT + 1) / SZ_64K;
|
||||
idx = atomic_inc_return(&wins);
|
||||
if (idx > max_win)
|
||||
return -ENOSPC;
|
||||
|
||||
window = (idx - 1) * SZ_64K;
|
||||
err = pci_ioremap_io(window, range->cpu_addr);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
of_pci_range_to_resource(range, dev->of_node, res);
|
||||
res->start = window;
|
||||
res->end = res->start + range->size - 1;
|
||||
*offset = window - range->pci_addr;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int gen_pci_calc_mem_offset(struct device *dev,
|
||||
struct of_pci_range *range,
|
||||
struct resource *res,
|
||||
resource_size_t *offset)
|
||||
{
|
||||
of_pci_range_to_resource(range, dev->of_node, res);
|
||||
*offset = range->cpu_addr - range->pci_addr;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void gen_pci_release_of_pci_ranges(struct gen_pci *pci)
|
||||
{
|
||||
struct pci_host_bridge_window *win;
|
||||
|
||||
list_for_each_entry(win, &pci->resources, list)
|
||||
release_resource(win->res);
|
||||
|
||||
pci_free_resource_list(&pci->resources);
|
||||
}
|
||||
|
||||
static int gen_pci_parse_request_of_pci_ranges(struct gen_pci *pci)
|
||||
{
|
||||
struct of_pci_range range;
|
||||
struct of_pci_range_parser parser;
|
||||
int err, res_valid = 0;
|
||||
struct device *dev = pci->host.dev.parent;
|
||||
struct device_node *np = dev->of_node;
|
||||
|
||||
if (of_pci_range_parser_init(&parser, np)) {
|
||||
dev_err(dev, "missing \"ranges\" property\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
for_each_of_pci_range(&parser, &range) {
|
||||
struct resource *parent, *res;
|
||||
resource_size_t offset;
|
||||
u32 restype = range.flags & IORESOURCE_TYPE_BITS;
|
||||
|
||||
res = devm_kmalloc(dev, sizeof(*res), GFP_KERNEL);
|
||||
if (!res) {
|
||||
err = -ENOMEM;
|
||||
goto out_release_res;
|
||||
}
|
||||
|
||||
switch (restype) {
|
||||
case IORESOURCE_IO:
|
||||
parent = &ioport_resource;
|
||||
err = gen_pci_calc_io_offset(dev, &range, res, &offset);
|
||||
break;
|
||||
case IORESOURCE_MEM:
|
||||
parent = &iomem_resource;
|
||||
err = gen_pci_calc_mem_offset(dev, &range, res, &offset);
|
||||
res_valid |= !(res->flags & IORESOURCE_PREFETCH || err);
|
||||
break;
|
||||
default:
|
||||
err = -EINVAL;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (err) {
|
||||
dev_warn(dev,
|
||||
"error %d: failed to add resource [type 0x%x, %lld bytes]\n",
|
||||
err, restype, range.size);
|
||||
continue;
|
||||
}
|
||||
|
||||
err = request_resource(parent, res);
|
||||
if (err)
|
||||
goto out_release_res;
|
||||
|
||||
pci_add_resource_offset(&pci->resources, res, offset);
|
||||
}
|
||||
|
||||
if (!res_valid) {
|
||||
dev_err(dev, "non-prefetchable memory resource required\n");
|
||||
err = -EINVAL;
|
||||
goto out_release_res;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
out_release_res:
|
||||
gen_pci_release_of_pci_ranges(pci);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int gen_pci_parse_map_cfg_windows(struct gen_pci *pci)
|
||||
{
|
||||
int err;
|
||||
u8 bus_max;
|
||||
resource_size_t busn;
|
||||
struct resource *bus_range;
|
||||
struct device *dev = pci->host.dev.parent;
|
||||
struct device_node *np = dev->of_node;
|
||||
|
||||
if (of_pci_parse_bus_range(np, &pci->cfg.bus_range))
|
||||
pci->cfg.bus_range = (struct resource) {
|
||||
.name = np->name,
|
||||
.start = 0,
|
||||
.end = 0xff,
|
||||
.flags = IORESOURCE_BUS,
|
||||
};
|
||||
|
||||
err = of_address_to_resource(np, 0, &pci->cfg.res);
|
||||
if (err) {
|
||||
dev_err(dev, "missing \"reg\" property\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
pci->cfg.win = devm_kcalloc(dev, resource_size(&pci->cfg.bus_range),
|
||||
sizeof(*pci->cfg.win), GFP_KERNEL);
|
||||
if (!pci->cfg.win)
|
||||
return -ENOMEM;
|
||||
|
||||
/* Limit the bus-range to fit within reg */
|
||||
bus_max = pci->cfg.bus_range.start +
|
||||
(resource_size(&pci->cfg.res) >> pci->cfg.ops->bus_shift) - 1;
|
||||
pci->cfg.bus_range.end = min_t(resource_size_t, pci->cfg.bus_range.end,
|
||||
bus_max);
|
||||
|
||||
/* Map our Configuration Space windows */
|
||||
if (!devm_request_mem_region(dev, pci->cfg.res.start,
|
||||
resource_size(&pci->cfg.res),
|
||||
"Configuration Space"))
|
||||
return -ENOMEM;
|
||||
|
||||
bus_range = &pci->cfg.bus_range;
|
||||
for (busn = bus_range->start; busn <= bus_range->end; ++busn) {
|
||||
u32 idx = busn - bus_range->start;
|
||||
u32 sz = 1 << pci->cfg.ops->bus_shift;
|
||||
|
||||
pci->cfg.win[idx] = devm_ioremap(dev,
|
||||
pci->cfg.res.start + busn * sz,
|
||||
sz);
|
||||
if (!pci->cfg.win[idx])
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* Register bus resource */
|
||||
pci_add_resource(&pci->resources, bus_range);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int gen_pci_setup(int nr, struct pci_sys_data *sys)
|
||||
{
|
||||
struct gen_pci *pci = sys->private_data;
|
||||
list_splice_init(&pci->resources, &sys->resources);
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int gen_pci_probe(struct platform_device *pdev)
|
||||
{
|
||||
int err;
|
||||
const char *type;
|
||||
const struct of_device_id *of_id;
|
||||
const int *prop;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct device_node *np = dev->of_node;
|
||||
struct gen_pci *pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
|
||||
struct hw_pci hw = {
|
||||
.nr_controllers = 1,
|
||||
.private_data = (void **)&pci,
|
||||
.setup = gen_pci_setup,
|
||||
.map_irq = of_irq_parse_and_map_pci,
|
||||
.ops = &gen_pci_ops,
|
||||
};
|
||||
|
||||
if (!pci)
|
||||
return -ENOMEM;
|
||||
|
||||
type = of_get_property(np, "device_type", NULL);
|
||||
if (!type || strcmp(type, "pci")) {
|
||||
dev_err(dev, "invalid \"device_type\" %s\n", type);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
prop = of_get_property(of_chosen, "linux,pci-probe-only", NULL);
|
||||
if (prop) {
|
||||
if (*prop)
|
||||
pci_add_flags(PCI_PROBE_ONLY);
|
||||
else
|
||||
pci_clear_flags(PCI_PROBE_ONLY);
|
||||
}
|
||||
|
||||
of_id = of_match_node(gen_pci_of_match, np);
|
||||
pci->cfg.ops = of_id->data;
|
||||
pci->host.dev.parent = dev;
|
||||
INIT_LIST_HEAD(&pci->host.windows);
|
||||
INIT_LIST_HEAD(&pci->resources);
|
||||
|
||||
/* Parse our PCI ranges and request their resources */
|
||||
err = gen_pci_parse_request_of_pci_ranges(pci);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* Parse and map our Configuration Space windows */
|
||||
err = gen_pci_parse_map_cfg_windows(pci);
|
||||
if (err) {
|
||||
gen_pci_release_of_pci_ranges(pci);
|
||||
return err;
|
||||
}
|
||||
|
||||
pci_common_init_dev(dev, &hw);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver gen_pci_driver = {
|
||||
.driver = {
|
||||
.name = "pci-host-generic",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = gen_pci_of_match,
|
||||
},
|
||||
.probe = gen_pci_probe,
|
||||
};
|
||||
module_platform_driver(gen_pci_driver);
|
||||
|
||||
MODULE_DESCRIPTION("Generic PCI host driver");
|
||||
MODULE_AUTHOR("Will Deacon <[email protected]>");
|
||||
MODULE_LICENSE("GPLv2");
|
||||
|
|
@ -25,6 +25,7 @@
|
|||
#include <linux/resource.h>
|
||||
#include <linux/signal.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include "pcie-designware.h"
|
||||
|
||||
|
|
@ -32,13 +33,9 @@
|
|||
|
||||
struct imx6_pcie {
|
||||
int reset_gpio;
|
||||
int power_on_gpio;
|
||||
int wake_up_gpio;
|
||||
int disable_gpio;
|
||||
struct clk *lvds_gate;
|
||||
struct clk *sata_ref_100m;
|
||||
struct clk *pcie_ref_125m;
|
||||
struct clk *pcie_axi;
|
||||
struct clk *pcie_bus;
|
||||
struct clk *pcie_phy;
|
||||
struct clk *pcie;
|
||||
struct pcie_port pp;
|
||||
struct regmap *iomuxc_gpr;
|
||||
void __iomem *mem_base;
|
||||
|
|
@ -231,36 +228,27 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
|
|||
struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
|
||||
int ret;
|
||||
|
||||
if (gpio_is_valid(imx6_pcie->power_on_gpio))
|
||||
gpio_set_value(imx6_pcie->power_on_gpio, 1);
|
||||
|
||||
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
|
||||
IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18);
|
||||
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
|
||||
IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16);
|
||||
|
||||
ret = clk_prepare_enable(imx6_pcie->sata_ref_100m);
|
||||
ret = clk_prepare_enable(imx6_pcie->pcie_phy);
|
||||
if (ret) {
|
||||
dev_err(pp->dev, "unable to enable sata_ref_100m\n");
|
||||
goto err_sata_ref;
|
||||
dev_err(pp->dev, "unable to enable pcie_phy clock\n");
|
||||
goto err_pcie_phy;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(imx6_pcie->pcie_ref_125m);
|
||||
ret = clk_prepare_enable(imx6_pcie->pcie_bus);
|
||||
if (ret) {
|
||||
dev_err(pp->dev, "unable to enable pcie_ref_125m\n");
|
||||
goto err_pcie_ref;
|
||||
dev_err(pp->dev, "unable to enable pcie_bus clock\n");
|
||||
goto err_pcie_bus;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(imx6_pcie->lvds_gate);
|
||||
ret = clk_prepare_enable(imx6_pcie->pcie);
|
||||
if (ret) {
|
||||
dev_err(pp->dev, "unable to enable lvds_gate\n");
|
||||
goto err_lvds_gate;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(imx6_pcie->pcie_axi);
|
||||
if (ret) {
|
||||
dev_err(pp->dev, "unable to enable pcie_axi\n");
|
||||
goto err_pcie_axi;
|
||||
dev_err(pp->dev, "unable to enable pcie clock\n");
|
||||
goto err_pcie;
|
||||
}
|
||||
|
||||
/* allow the clocks to stabilize */
|
||||
|
|
@ -274,13 +262,11 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp)
|
|||
}
|
||||
return 0;
|
||||
|
||||
err_pcie_axi:
|
||||
clk_disable_unprepare(imx6_pcie->lvds_gate);
|
||||
err_lvds_gate:
|
||||
clk_disable_unprepare(imx6_pcie->pcie_ref_125m);
|
||||
err_pcie_ref:
|
||||
clk_disable_unprepare(imx6_pcie->sata_ref_100m);
|
||||
err_sata_ref:
|
||||
err_pcie:
|
||||
clk_disable_unprepare(imx6_pcie->pcie_bus);
|
||||
err_pcie_bus:
|
||||
clk_disable_unprepare(imx6_pcie->pcie_phy);
|
||||
err_pcie_phy:
|
||||
return ret;
|
||||
|
||||
}
|
||||
|
|
@ -329,6 +315,13 @@ static int imx6_pcie_wait_for_link(struct pcie_port *pp)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static irqreturn_t imx6_pcie_msi_handler(int irq, void *arg)
|
||||
{
|
||||
struct pcie_port *pp = arg;
|
||||
|
||||
return dw_handle_msi_irq(pp);
|
||||
}
|
||||
|
||||
static int imx6_pcie_start_link(struct pcie_port *pp)
|
||||
{
|
||||
struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
|
||||
|
|
@ -403,6 +396,9 @@ static void imx6_pcie_host_init(struct pcie_port *pp)
|
|||
dw_pcie_setup_rc(pp);
|
||||
|
||||
imx6_pcie_start_link(pp);
|
||||
|
||||
if (IS_ENABLED(CONFIG_PCI_MSI))
|
||||
dw_pcie_msi_init(pp);
|
||||
}
|
||||
|
||||
static void imx6_pcie_reset_phy(struct pcie_port *pp)
|
||||
|
|
@ -487,15 +483,25 @@ static struct pcie_host_ops imx6_pcie_host_ops = {
|
|||
.host_init = imx6_pcie_host_init,
|
||||
};
|
||||
|
||||
static int imx6_add_pcie_port(struct pcie_port *pp,
|
||||
static int __init imx6_add_pcie_port(struct pcie_port *pp,
|
||||
struct platform_device *pdev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
pp->irq = platform_get_irq(pdev, 0);
|
||||
if (!pp->irq) {
|
||||
dev_err(&pdev->dev, "failed to get irq\n");
|
||||
return -ENODEV;
|
||||
if (IS_ENABLED(CONFIG_PCI_MSI)) {
|
||||
pp->msi_irq = platform_get_irq_byname(pdev, "msi");
|
||||
if (pp->msi_irq <= 0) {
|
||||
dev_err(&pdev->dev, "failed to get MSI irq\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
ret = devm_request_irq(&pdev->dev, pp->msi_irq,
|
||||
imx6_pcie_msi_handler,
|
||||
IRQF_SHARED, "mx6-pcie-msi", pp);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "failed to request MSI irq\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
}
|
||||
|
||||
pp->root_bus_nr = -1;
|
||||
|
|
@ -546,69 +552,26 @@ static int __init imx6_pcie_probe(struct platform_device *pdev)
|
|||
}
|
||||
}
|
||||
|
||||
imx6_pcie->power_on_gpio = of_get_named_gpio(np, "power-on-gpio", 0);
|
||||
if (gpio_is_valid(imx6_pcie->power_on_gpio)) {
|
||||
ret = devm_gpio_request_one(&pdev->dev,
|
||||
imx6_pcie->power_on_gpio,
|
||||
GPIOF_OUT_INIT_LOW,
|
||||
"PCIe power enable");
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "unable to get power-on gpio\n");
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
imx6_pcie->wake_up_gpio = of_get_named_gpio(np, "wake-up-gpio", 0);
|
||||
if (gpio_is_valid(imx6_pcie->wake_up_gpio)) {
|
||||
ret = devm_gpio_request_one(&pdev->dev,
|
||||
imx6_pcie->wake_up_gpio,
|
||||
GPIOF_IN,
|
||||
"PCIe wake up");
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "unable to get wake-up gpio\n");
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
imx6_pcie->disable_gpio = of_get_named_gpio(np, "disable-gpio", 0);
|
||||
if (gpio_is_valid(imx6_pcie->disable_gpio)) {
|
||||
ret = devm_gpio_request_one(&pdev->dev,
|
||||
imx6_pcie->disable_gpio,
|
||||
GPIOF_OUT_INIT_HIGH,
|
||||
"PCIe disable endpoint");
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "unable to get disable-ep gpio\n");
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
/* Fetch clocks */
|
||||
imx6_pcie->lvds_gate = devm_clk_get(&pdev->dev, "lvds_gate");
|
||||
if (IS_ERR(imx6_pcie->lvds_gate)) {
|
||||
imx6_pcie->pcie_phy = devm_clk_get(&pdev->dev, "pcie_phy");
|
||||
if (IS_ERR(imx6_pcie->pcie_phy)) {
|
||||
dev_err(&pdev->dev,
|
||||
"lvds_gate clock select missing or invalid\n");
|
||||
return PTR_ERR(imx6_pcie->lvds_gate);
|
||||
"pcie_phy clock source missing or invalid\n");
|
||||
return PTR_ERR(imx6_pcie->pcie_phy);
|
||||
}
|
||||
|
||||
imx6_pcie->sata_ref_100m = devm_clk_get(&pdev->dev, "sata_ref_100m");
|
||||
if (IS_ERR(imx6_pcie->sata_ref_100m)) {
|
||||
imx6_pcie->pcie_bus = devm_clk_get(&pdev->dev, "pcie_bus");
|
||||
if (IS_ERR(imx6_pcie->pcie_bus)) {
|
||||
dev_err(&pdev->dev,
|
||||
"sata_ref_100m clock source missing or invalid\n");
|
||||
return PTR_ERR(imx6_pcie->sata_ref_100m);
|
||||
"pcie_bus clock source missing or invalid\n");
|
||||
return PTR_ERR(imx6_pcie->pcie_bus);
|
||||
}
|
||||
|
||||
imx6_pcie->pcie_ref_125m = devm_clk_get(&pdev->dev, "pcie_ref_125m");
|
||||
if (IS_ERR(imx6_pcie->pcie_ref_125m)) {
|
||||
imx6_pcie->pcie = devm_clk_get(&pdev->dev, "pcie");
|
||||
if (IS_ERR(imx6_pcie->pcie)) {
|
||||
dev_err(&pdev->dev,
|
||||
"pcie_ref_125m clock source missing or invalid\n");
|
||||
return PTR_ERR(imx6_pcie->pcie_ref_125m);
|
||||
}
|
||||
|
||||
imx6_pcie->pcie_axi = devm_clk_get(&pdev->dev, "pcie_axi");
|
||||
if (IS_ERR(imx6_pcie->pcie_axi)) {
|
||||
dev_err(&pdev->dev,
|
||||
"pcie_axi clock source missing or invalid\n");
|
||||
return PTR_ERR(imx6_pcie->pcie_axi);
|
||||
"pcie clock source missing or invalid\n");
|
||||
return PTR_ERR(imx6_pcie->pcie);
|
||||
}
|
||||
|
||||
/* Grab GPR config register range */
|
||||
|
|
|
|||
|
|
@ -99,6 +99,7 @@ struct rcar_pci_priv {
|
|||
struct resource io_res;
|
||||
struct resource mem_res;
|
||||
struct resource *cfg_res;
|
||||
unsigned busnr;
|
||||
int irq;
|
||||
unsigned long window_size;
|
||||
};
|
||||
|
|
@ -318,8 +319,8 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
|
|||
pci_add_resource(&sys->resources, &priv->io_res);
|
||||
pci_add_resource(&sys->resources, &priv->mem_res);
|
||||
|
||||
/* Setup bus number based on platform device id */
|
||||
sys->busnr = to_platform_device(priv->dev)->id;
|
||||
/* Setup bus number based on platform device id / of bus-range */
|
||||
sys->busnr = priv->busnr;
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
|
@ -372,6 +373,23 @@ static int rcar_pci_probe(struct platform_device *pdev)
|
|||
|
||||
priv->window_size = SZ_1G;
|
||||
|
||||
if (pdev->dev.of_node) {
|
||||
struct resource busnr;
|
||||
int ret;
|
||||
|
||||
ret = of_pci_parse_bus_range(pdev->dev.of_node, &busnr);
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "failed to parse bus-range\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
priv->busnr = busnr.start;
|
||||
if (busnr.end != busnr.start)
|
||||
dev_warn(&pdev->dev, "only one bus number supported\n");
|
||||
} else {
|
||||
priv->busnr = pdev->id;
|
||||
}
|
||||
|
||||
hw_private[0] = priv;
|
||||
memset(&hw, 0, sizeof(hw));
|
||||
hw.nr_controllers = ARRAY_SIZE(hw_private);
|
||||
|
|
@ -383,11 +401,20 @@ static int rcar_pci_probe(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static struct of_device_id rcar_pci_of_match[] = {
|
||||
{ .compatible = "renesas,pci-r8a7790", },
|
||||
{ .compatible = "renesas,pci-r8a7791", },
|
||||
{ },
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(of, rcar_pci_of_match);
|
||||
|
||||
static struct platform_driver rcar_pci_driver = {
|
||||
.driver = {
|
||||
.name = "pci-rcar-gen2",
|
||||
.owner = THIS_MODULE,
|
||||
.suppress_bind_attrs = true,
|
||||
.of_match_table = rcar_pci_of_match,
|
||||
},
|
||||
.probe = rcar_pci_probe,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -156,15 +156,17 @@ static struct irq_chip dw_msi_irq_chip = {
|
|||
};
|
||||
|
||||
/* MSI int handler */
|
||||
void dw_handle_msi_irq(struct pcie_port *pp)
|
||||
irqreturn_t dw_handle_msi_irq(struct pcie_port *pp)
|
||||
{
|
||||
unsigned long val;
|
||||
int i, pos, irq;
|
||||
irqreturn_t ret = IRQ_NONE;
|
||||
|
||||
for (i = 0; i < MAX_MSI_CTRLS; i++) {
|
||||
dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_STATUS + i * 12, 4,
|
||||
(u32 *)&val);
|
||||
if (val) {
|
||||
ret = IRQ_HANDLED;
|
||||
pos = 0;
|
||||
while ((pos = find_next_bit(&val, 32, pos)) != 32) {
|
||||
irq = irq_find_mapping(pp->irq_domain,
|
||||
|
|
@ -177,6 +179,8 @@ void dw_handle_msi_irq(struct pcie_port *pp)
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void dw_pcie_msi_init(struct pcie_port *pp)
|
||||
|
|
|
|||
|
|
@ -68,7 +68,7 @@ struct pcie_host_ops {
|
|||
|
||||
int dw_pcie_cfg_read(void __iomem *addr, int where, int size, u32 *val);
|
||||
int dw_pcie_cfg_write(void __iomem *addr, int where, int size, u32 val);
|
||||
void dw_handle_msi_irq(struct pcie_port *pp);
|
||||
irqreturn_t dw_handle_msi_irq(struct pcie_port *pp);
|
||||
void dw_pcie_msi_init(struct pcie_port *pp);
|
||||
int dw_pcie_link_up(struct pcie_port *pp);
|
||||
void dw_pcie_setup_rc(struct pcie_port *pp);
|
||||
|
|
|
|||
1008
drivers/pci/host/pcie-rcar.c
Normal file
1008
drivers/pci/host/pcie-rcar.c
Normal file
File diff suppressed because it is too large
Load diff
|
|
@ -4,7 +4,7 @@
|
|||
#include <linux/export.h>
|
||||
#include "pci.h"
|
||||
|
||||
int __ref pci_hp_add_bridge(struct pci_dev *dev)
|
||||
int pci_hp_add_bridge(struct pci_dev *dev)
|
||||
{
|
||||
struct pci_bus *parent = dev->bus;
|
||||
int pass, busnr, start = parent->busn_res.start;
|
||||
|
|
|
|||
|
|
@ -41,7 +41,6 @@
|
|||
|
||||
#define pr_fmt(fmt) "acpiphp_glue: " fmt
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
|
@ -501,7 +500,7 @@ static int acpiphp_rescan_slot(struct acpiphp_slot *slot)
|
|||
* This function should be called per *physical slot*,
|
||||
* not per each slot object in ACPI namespace.
|
||||
*/
|
||||
static void __ref enable_slot(struct acpiphp_slot *slot)
|
||||
static void enable_slot(struct acpiphp_slot *slot)
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
struct pci_bus *bus = slot->bus;
|
||||
|
|
@ -516,8 +515,7 @@ static void __ref enable_slot(struct acpiphp_slot *slot)
|
|||
if (PCI_SLOT(dev->devfn) != slot->device)
|
||||
continue;
|
||||
|
||||
if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
|
||||
dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
|
||||
if (pci_is_bridge(dev)) {
|
||||
max = pci_scan_bridge(bus, dev, max, pass);
|
||||
if (pass && dev->subordinate) {
|
||||
check_hotplug_bridge(slot, dev);
|
||||
|
|
|
|||
|
|
@ -250,7 +250,7 @@ int cpci_led_off(struct slot* slot)
|
|||
* Device configuration functions
|
||||
*/
|
||||
|
||||
int __ref cpci_configure_slot(struct slot *slot)
|
||||
int cpci_configure_slot(struct slot *slot)
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
struct pci_bus *parent;
|
||||
|
|
@ -289,8 +289,7 @@ int __ref cpci_configure_slot(struct slot *slot)
|
|||
list_for_each_entry(dev, &parent->devices, bus_list)
|
||||
if (PCI_SLOT(dev->devfn) != PCI_SLOT(slot->devfn))
|
||||
continue;
|
||||
if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) ||
|
||||
(dev->hdr_type == PCI_HEADER_TYPE_CARDBUS))
|
||||
if (pci_is_bridge(dev))
|
||||
pci_hp_add_bridge(dev);
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -709,7 +709,8 @@ static struct pci_resource *get_max_resource(struct pci_resource **head, u32 siz
|
|||
temp = temp->next;
|
||||
}
|
||||
|
||||
temp->next = max->next;
|
||||
if (temp)
|
||||
temp->next = max->next;
|
||||
}
|
||||
|
||||
max->next = NULL;
|
||||
|
|
|
|||
|
|
@ -34,7 +34,6 @@
|
|||
#include <linux/workqueue.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/pci_hotplug.h>
|
||||
#include <linux/init.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include "cpqphp.h"
|
||||
#include "cpqphp_nvram.h"
|
||||
|
|
|
|||
|
|
@ -127,7 +127,7 @@ struct controller {
|
|||
#define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_HPS)
|
||||
#define EMI(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_EIP)
|
||||
#define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS)
|
||||
#define PSN(ctrl) ((ctrl)->slot_cap >> 19)
|
||||
#define PSN(ctrl) (((ctrl)->slot_cap & PCI_EXP_SLTCAP_PSN) >> 19)
|
||||
|
||||
int pciehp_sysfs_enable_slot(struct slot *slot);
|
||||
int pciehp_sysfs_disable_slot(struct slot *slot);
|
||||
|
|
|
|||
|
|
@ -159,6 +159,8 @@ static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
|
|||
|
||||
pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
|
||||
if (slot_status & PCI_EXP_SLTSTA_CC) {
|
||||
pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
|
||||
PCI_EXP_SLTSTA_CC);
|
||||
if (!ctrl->no_cmd_complete) {
|
||||
/*
|
||||
* After 1 sec and CMD_COMPLETED still not set, just
|
||||
|
|
|
|||
|
|
@ -62,8 +62,7 @@ int pciehp_configure_device(struct slot *p_slot)
|
|||
}
|
||||
|
||||
list_for_each_entry(dev, &parent->devices, bus_list)
|
||||
if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) ||
|
||||
(dev->hdr_type == PCI_HEADER_TYPE_CARDBUS))
|
||||
if (pci_is_bridge(dev))
|
||||
pci_hp_add_bridge(dev);
|
||||
|
||||
pci_assign_unassigned_bridge_resources(bridge);
|
||||
|
|
|
|||
|
|
@ -160,8 +160,7 @@ void pci_configure_slot(struct pci_dev *dev)
|
|||
(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)))
|
||||
return;
|
||||
|
||||
if (dev->bus)
|
||||
pcie_bus_configure_settings(dev->bus);
|
||||
pcie_bus_configure_settings(dev->bus);
|
||||
|
||||
memset(&hpp, 0, sizeof(hpp));
|
||||
ret = pci_get_hp_params(dev, &hpp);
|
||||
|
|
|
|||
|
|
@ -157,8 +157,7 @@ static void dlpar_pci_add_bus(struct device_node *dn)
|
|||
}
|
||||
|
||||
/* Scan below the new bridge */
|
||||
if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
|
||||
dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
|
||||
if (pci_is_bridge(dev))
|
||||
of_scan_pci_bridge(dev);
|
||||
|
||||
/* Map IO space for child bus, which may or may not succeed */
|
||||
|
|
|
|||
|
|
@ -223,16 +223,16 @@ int rpaphp_get_drc_props(struct device_node *dn, int *drc_index,
|
|||
type_tmp = (char *) &types[1];
|
||||
|
||||
/* Iterate through parent properties, looking for my-drc-index */
|
||||
for (i = 0; i < indexes[0]; i++) {
|
||||
for (i = 0; i < be32_to_cpu(indexes[0]); i++) {
|
||||
if ((unsigned int) indexes[i + 1] == *my_index) {
|
||||
if (drc_name)
|
||||
*drc_name = name_tmp;
|
||||
if (drc_type)
|
||||
*drc_type = type_tmp;
|
||||
if (drc_index)
|
||||
*drc_index = *my_index;
|
||||
*drc_index = be32_to_cpu(*my_index);
|
||||
if (drc_power_domain)
|
||||
*drc_power_domain = domains[i+1];
|
||||
*drc_power_domain = be32_to_cpu(domains[i+1]);
|
||||
return 0;
|
||||
}
|
||||
name_tmp += (strlen(name_tmp) + 1);
|
||||
|
|
@ -321,16 +321,19 @@ int rpaphp_add_slot(struct device_node *dn)
|
|||
/* register PCI devices */
|
||||
name = (char *) &names[1];
|
||||
type = (char *) &types[1];
|
||||
for (i = 0; i < indexes[0]; i++) {
|
||||
for (i = 0; i < be32_to_cpu(indexes[0]); i++) {
|
||||
int index;
|
||||
|
||||
slot = alloc_slot_struct(dn, indexes[i + 1], name, power_domains[i + 1]);
|
||||
index = be32_to_cpu(indexes[i + 1]);
|
||||
slot = alloc_slot_struct(dn, index, name,
|
||||
be32_to_cpu(power_domains[i + 1]));
|
||||
if (!slot)
|
||||
return -ENOMEM;
|
||||
|
||||
slot->type = simple_strtoul(type, NULL, 10);
|
||||
|
||||
dbg("Found drc-index:0x%x drc-name:%s drc-type:%s\n",
|
||||
indexes[i + 1], name, type);
|
||||
index, name, type);
|
||||
|
||||
retval = rpaphp_enable_slot(slot);
|
||||
if (!retval)
|
||||
|
|
|
|||
|
|
@ -15,7 +15,6 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/pci_hotplug.h>
|
||||
#include <linux/init.h>
|
||||
#include <asm/pci_debug.h>
|
||||
#include <asm/sclp.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@
|
|||
#include "../pci.h"
|
||||
#include "shpchp.h"
|
||||
|
||||
int __ref shpchp_configure_device(struct slot *p_slot)
|
||||
int shpchp_configure_device(struct slot *p_slot)
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
struct controller *ctrl = p_slot->ctrl;
|
||||
|
|
@ -64,8 +64,7 @@ int __ref shpchp_configure_device(struct slot *p_slot)
|
|||
list_for_each_entry(dev, &parent->devices, bus_list) {
|
||||
if (PCI_SLOT(dev->devfn) != p_slot->device)
|
||||
continue;
|
||||
if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) ||
|
||||
(dev->hdr_type == PCI_HEADER_TYPE_CARDBUS))
|
||||
if (pci_is_bridge(dev))
|
||||
pci_hp_add_bridge(dev);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -106,7 +106,7 @@ static int virtfn_add(struct pci_dev *dev, int id, int reset)
|
|||
pci_device_add(virtfn, virtfn->bus);
|
||||
mutex_unlock(&iov->dev->sriov->lock);
|
||||
|
||||
rc = pci_bus_add_device(virtfn);
|
||||
pci_bus_add_device(virtfn);
|
||||
sprintf(buf, "virtfn%u", id);
|
||||
rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
|
||||
if (rc)
|
||||
|
|
|
|||
|
|
@ -10,7 +10,6 @@
|
|||
#include <linux/mm.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/pci.h>
|
||||
|
|
@ -544,22 +543,18 @@ static int populate_msi_sysfs(struct pci_dev *pdev)
|
|||
if (!msi_attrs)
|
||||
return -ENOMEM;
|
||||
list_for_each_entry(entry, &pdev->msi_list, list) {
|
||||
char *name = kmalloc(20, GFP_KERNEL);
|
||||
if (!name)
|
||||
goto error_attrs;
|
||||
|
||||
msi_dev_attr = kzalloc(sizeof(*msi_dev_attr), GFP_KERNEL);
|
||||
if (!msi_dev_attr) {
|
||||
kfree(name);
|
||||
if (!msi_dev_attr)
|
||||
goto error_attrs;
|
||||
}
|
||||
msi_attrs[count] = &msi_dev_attr->attr;
|
||||
|
||||
sprintf(name, "%d", entry->irq);
|
||||
sysfs_attr_init(&msi_dev_attr->attr);
|
||||
msi_dev_attr->attr.name = name;
|
||||
msi_dev_attr->attr.name = kasprintf(GFP_KERNEL, "%d",
|
||||
entry->irq);
|
||||
if (!msi_dev_attr->attr.name)
|
||||
goto error_attrs;
|
||||
msi_dev_attr->attr.mode = S_IRUGO;
|
||||
msi_dev_attr->show = msi_mode_show;
|
||||
msi_attrs[count] = &msi_dev_attr->attr;
|
||||
++count;
|
||||
}
|
||||
|
||||
|
|
@ -883,50 +878,6 @@ int pci_msi_vec_count(struct pci_dev *dev)
|
|||
}
|
||||
EXPORT_SYMBOL(pci_msi_vec_count);
|
||||
|
||||
/**
|
||||
* pci_enable_msi_block - configure device's MSI capability structure
|
||||
* @dev: device to configure
|
||||
* @nvec: number of interrupts to configure
|
||||
*
|
||||
* Allocate IRQs for a device with the MSI capability.
|
||||
* This function returns a negative errno if an error occurs. If it
|
||||
* is unable to allocate the number of interrupts requested, it returns
|
||||
* the number of interrupts it might be able to allocate. If it successfully
|
||||
* allocates at least the number of interrupts requested, it returns 0 and
|
||||
* updates the @dev's irq member to the lowest new interrupt number; the
|
||||
* other interrupt numbers allocated to this device are consecutive.
|
||||
*/
|
||||
int pci_enable_msi_block(struct pci_dev *dev, int nvec)
|
||||
{
|
||||
int status, maxvec;
|
||||
|
||||
if (dev->current_state != PCI_D0)
|
||||
return -EINVAL;
|
||||
|
||||
maxvec = pci_msi_vec_count(dev);
|
||||
if (maxvec < 0)
|
||||
return maxvec;
|
||||
if (nvec > maxvec)
|
||||
return maxvec;
|
||||
|
||||
status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSI);
|
||||
if (status)
|
||||
return status;
|
||||
|
||||
WARN_ON(!!dev->msi_enabled);
|
||||
|
||||
/* Check whether driver already requested MSI-X irqs */
|
||||
if (dev->msix_enabled) {
|
||||
dev_info(&dev->dev, "can't enable MSI "
|
||||
"(MSI-X already enabled)\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
status = msi_capability_init(dev, nvec);
|
||||
return status;
|
||||
}
|
||||
EXPORT_SYMBOL(pci_enable_msi_block);
|
||||
|
||||
void pci_msi_shutdown(struct pci_dev *dev)
|
||||
{
|
||||
struct msi_desc *desc;
|
||||
|
|
@ -1132,14 +1083,45 @@ void pci_msi_init_pci_dev(struct pci_dev *dev)
|
|||
**/
|
||||
int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec)
|
||||
{
|
||||
int nvec = maxvec;
|
||||
int nvec;
|
||||
int rc;
|
||||
|
||||
if (dev->current_state != PCI_D0)
|
||||
return -EINVAL;
|
||||
|
||||
WARN_ON(!!dev->msi_enabled);
|
||||
|
||||
/* Check whether driver already requested MSI-X irqs */
|
||||
if (dev->msix_enabled) {
|
||||
dev_info(&dev->dev,
|
||||
"can't enable MSI (MSI-X already enabled)\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (maxvec < minvec)
|
||||
return -ERANGE;
|
||||
|
||||
nvec = pci_msi_vec_count(dev);
|
||||
if (nvec < 0)
|
||||
return nvec;
|
||||
else if (nvec < minvec)
|
||||
return -EINVAL;
|
||||
else if (nvec > maxvec)
|
||||
nvec = maxvec;
|
||||
|
||||
do {
|
||||
rc = pci_enable_msi_block(dev, nvec);
|
||||
rc = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSI);
|
||||
if (rc < 0) {
|
||||
return rc;
|
||||
} else if (rc > 0) {
|
||||
if (rc < minvec)
|
||||
return -ENOSPC;
|
||||
nvec = rc;
|
||||
}
|
||||
} while (rc);
|
||||
|
||||
do {
|
||||
rc = msi_capability_init(dev, nvec);
|
||||
if (rc < 0) {
|
||||
return rc;
|
||||
} else if (rc > 0) {
|
||||
|
|
|
|||
|
|
@ -309,13 +309,7 @@ static struct acpi_device *acpi_pci_find_companion(struct device *dev)
|
|||
bool check_children;
|
||||
u64 addr;
|
||||
|
||||
/*
|
||||
* pci_is_bridge() is not suitable here, because pci_dev->subordinate
|
||||
* is set only after acpi_pci_find_device() has been called for the
|
||||
* given device.
|
||||
*/
|
||||
check_children = pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE
|
||||
|| pci_dev->hdr_type == PCI_HEADER_TYPE_CARDBUS;
|
||||
check_children = pci_is_bridge(pci_dev);
|
||||
/* Please ref to ACPI spec for the syntax of _ADR */
|
||||
addr = (PCI_SLOT(pci_dev->devfn) << 16) | PCI_FUNC(pci_dev->devfn);
|
||||
return acpi_find_child_device(ACPI_COMPANION(dev->parent), addr,
|
||||
|
|
|
|||
|
|
@ -107,7 +107,7 @@ store_new_id(struct device_driver *driver, const char *buf, size_t count)
|
|||
subdevice=PCI_ANY_ID, class=0, class_mask=0;
|
||||
unsigned long driver_data=0;
|
||||
int fields=0;
|
||||
int retval;
|
||||
int retval = 0;
|
||||
|
||||
fields = sscanf(buf, "%x %x %x %x %x %x %lx",
|
||||
&vendor, &device, &subvendor, &subdevice,
|
||||
|
|
@ -115,6 +115,26 @@ store_new_id(struct device_driver *driver, const char *buf, size_t count)
|
|||
if (fields < 2)
|
||||
return -EINVAL;
|
||||
|
||||
if (fields != 7) {
|
||||
struct pci_dev *pdev = kzalloc(sizeof(*pdev), GFP_KERNEL);
|
||||
if (!pdev)
|
||||
return -ENOMEM;
|
||||
|
||||
pdev->vendor = vendor;
|
||||
pdev->device = device;
|
||||
pdev->subsystem_vendor = subvendor;
|
||||
pdev->subsystem_device = subdevice;
|
||||
pdev->class = class;
|
||||
|
||||
if (pci_match_id(pdrv->id_table, pdev))
|
||||
retval = -EEXIST;
|
||||
|
||||
kfree(pdev);
|
||||
|
||||
if (retval)
|
||||
return retval;
|
||||
}
|
||||
|
||||
/* Only accept driver_data values that match an existing id_table
|
||||
entry */
|
||||
if (ids) {
|
||||
|
|
@ -216,6 +236,13 @@ const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
|
|||
return NULL;
|
||||
}
|
||||
|
||||
static const struct pci_device_id pci_device_id_any = {
|
||||
.vendor = PCI_ANY_ID,
|
||||
.device = PCI_ANY_ID,
|
||||
.subvendor = PCI_ANY_ID,
|
||||
.subdevice = PCI_ANY_ID,
|
||||
};
|
||||
|
||||
/**
|
||||
* pci_match_device - Tell if a PCI device structure has a matching PCI device id structure
|
||||
* @drv: the PCI driver to match against
|
||||
|
|
@ -229,18 +256,30 @@ static const struct pci_device_id *pci_match_device(struct pci_driver *drv,
|
|||
struct pci_dev *dev)
|
||||
{
|
||||
struct pci_dynid *dynid;
|
||||
const struct pci_device_id *found_id = NULL;
|
||||
|
||||
/* When driver_override is set, only bind to the matching driver */
|
||||
if (dev->driver_override && strcmp(dev->driver_override, drv->name))
|
||||
return NULL;
|
||||
|
||||
/* Look at the dynamic ids first, before the static ones */
|
||||
spin_lock(&drv->dynids.lock);
|
||||
list_for_each_entry(dynid, &drv->dynids.list, node) {
|
||||
if (pci_match_one_device(&dynid->id, dev)) {
|
||||
spin_unlock(&drv->dynids.lock);
|
||||
return &dynid->id;
|
||||
found_id = &dynid->id;
|
||||
break;
|
||||
}
|
||||
}
|
||||
spin_unlock(&drv->dynids.lock);
|
||||
|
||||
return pci_match_id(drv->id_table, dev);
|
||||
if (!found_id)
|
||||
found_id = pci_match_id(drv->id_table, dev);
|
||||
|
||||
/* driver_override will always match, send a dummy id */
|
||||
if (!found_id && dev->driver_override)
|
||||
found_id = &pci_device_id_any;
|
||||
|
||||
return found_id;
|
||||
}
|
||||
|
||||
struct drv_dev_and_id {
|
||||
|
|
@ -580,14 +619,14 @@ static void pci_pm_default_resume(struct pci_dev *pci_dev)
|
|||
{
|
||||
pci_fixup_device(pci_fixup_resume, pci_dev);
|
||||
|
||||
if (!pci_is_bridge(pci_dev))
|
||||
if (!pci_has_subordinate(pci_dev))
|
||||
pci_enable_wake(pci_dev, PCI_D0, false);
|
||||
}
|
||||
|
||||
static void pci_pm_default_suspend(struct pci_dev *pci_dev)
|
||||
{
|
||||
/* Disable non-bridge devices without PM support */
|
||||
if (!pci_is_bridge(pci_dev))
|
||||
if (!pci_has_subordinate(pci_dev))
|
||||
pci_disable_enabled_device(pci_dev);
|
||||
}
|
||||
|
||||
|
|
@ -717,7 +756,7 @@ static int pci_pm_suspend_noirq(struct device *dev)
|
|||
|
||||
if (!pci_dev->state_saved) {
|
||||
pci_save_state(pci_dev);
|
||||
if (!pci_is_bridge(pci_dev))
|
||||
if (!pci_has_subordinate(pci_dev))
|
||||
pci_prepare_to_sleep(pci_dev);
|
||||
}
|
||||
|
||||
|
|
@ -971,7 +1010,7 @@ static int pci_pm_poweroff_noirq(struct device *dev)
|
|||
return error;
|
||||
}
|
||||
|
||||
if (!pci_dev->state_saved && !pci_is_bridge(pci_dev))
|
||||
if (!pci_dev->state_saved && !pci_has_subordinate(pci_dev))
|
||||
pci_prepare_to_sleep(pci_dev);
|
||||
|
||||
/*
|
||||
|
|
@ -1325,8 +1364,6 @@ static int pci_uevent(struct device *dev, struct kobj_uevent_env *env)
|
|||
return -ENODEV;
|
||||
|
||||
pdev = to_pci_dev(dev);
|
||||
if (!pdev)
|
||||
return -ENODEV;
|
||||
|
||||
if (add_uevent_var(env, "PCI_CLASS=%04X", pdev->class))
|
||||
return -ENOMEM;
|
||||
|
|
@ -1347,6 +1384,7 @@ static int pci_uevent(struct device *dev, struct kobj_uevent_env *env)
|
|||
(u8)(pdev->class >> 16), (u8)(pdev->class >> 8),
|
||||
(u8)(pdev->class)))
|
||||
return -ENOMEM;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -29,6 +29,7 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/vgaarb.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/of.h>
|
||||
#include "pci.h"
|
||||
|
||||
static int sysfs_initialized; /* = 0 */
|
||||
|
|
@ -416,6 +417,20 @@ static ssize_t d3cold_allowed_show(struct device *dev,
|
|||
static DEVICE_ATTR_RW(d3cold_allowed);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
static ssize_t devspec_show(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
struct pci_dev *pdev = to_pci_dev(dev);
|
||||
struct device_node *np = pci_device_to_OF_node(pdev);
|
||||
|
||||
if (np == NULL || np->full_name == NULL)
|
||||
return 0;
|
||||
return sprintf(buf, "%s", np->full_name);
|
||||
}
|
||||
static DEVICE_ATTR_RO(devspec);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_IOV
|
||||
static ssize_t sriov_totalvfs_show(struct device *dev,
|
||||
struct device_attribute *attr,
|
||||
|
|
@ -499,6 +514,45 @@ static struct device_attribute sriov_numvfs_attr =
|
|||
sriov_numvfs_show, sriov_numvfs_store);
|
||||
#endif /* CONFIG_PCI_IOV */
|
||||
|
||||
static ssize_t driver_override_store(struct device *dev,
|
||||
struct device_attribute *attr,
|
||||
const char *buf, size_t count)
|
||||
{
|
||||
struct pci_dev *pdev = to_pci_dev(dev);
|
||||
char *driver_override, *old = pdev->driver_override, *cp;
|
||||
|
||||
if (count > PATH_MAX)
|
||||
return -EINVAL;
|
||||
|
||||
driver_override = kstrndup(buf, count, GFP_KERNEL);
|
||||
if (!driver_override)
|
||||
return -ENOMEM;
|
||||
|
||||
cp = strchr(driver_override, '\n');
|
||||
if (cp)
|
||||
*cp = '\0';
|
||||
|
||||
if (strlen(driver_override)) {
|
||||
pdev->driver_override = driver_override;
|
||||
} else {
|
||||
kfree(driver_override);
|
||||
pdev->driver_override = NULL;
|
||||
}
|
||||
|
||||
kfree(old);
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static ssize_t driver_override_show(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
struct pci_dev *pdev = to_pci_dev(dev);
|
||||
|
||||
return sprintf(buf, "%s\n", pdev->driver_override);
|
||||
}
|
||||
static DEVICE_ATTR_RW(driver_override);
|
||||
|
||||
static struct attribute *pci_dev_attrs[] = {
|
||||
&dev_attr_resource.attr,
|
||||
&dev_attr_vendor.attr,
|
||||
|
|
@ -521,6 +575,10 @@ static struct attribute *pci_dev_attrs[] = {
|
|||
#if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
|
||||
&dev_attr_d3cold_allowed.attr,
|
||||
#endif
|
||||
#ifdef CONFIG_OF
|
||||
&dev_attr_devspec.attr,
|
||||
#endif
|
||||
&dev_attr_driver_override.attr,
|
||||
NULL,
|
||||
};
|
||||
|
||||
|
|
@ -1255,11 +1313,6 @@ static struct bin_attribute pcie_config_attr = {
|
|||
.write = pci_write_config,
|
||||
};
|
||||
|
||||
int __weak pcibios_add_platform_entries(struct pci_dev *dev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static ssize_t reset_store(struct device *dev,
|
||||
struct device_attribute *attr, const char *buf,
|
||||
size_t count)
|
||||
|
|
@ -1375,11 +1428,6 @@ int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
|
|||
pdev->rom_attr = attr;
|
||||
}
|
||||
|
||||
/* add platform-specific attributes */
|
||||
retval = pcibios_add_platform_entries(pdev);
|
||||
if (retval)
|
||||
goto err_rom_file;
|
||||
|
||||
/* add sysfs entries for various capabilities */
|
||||
retval = pci_create_capabilities_sysfs(pdev);
|
||||
if (retval)
|
||||
|
|
|
|||
|
|
@ -1468,6 +1468,17 @@ void __weak pcibios_release_device(struct pci_dev *dev) {}
|
|||
*/
|
||||
void __weak pcibios_disable_device (struct pci_dev *dev) {}
|
||||
|
||||
/**
|
||||
* pcibios_penalize_isa_irq - penalize an ISA IRQ
|
||||
* @irq: ISA IRQ to penalize
|
||||
* @active: IRQ active or not
|
||||
*
|
||||
* Permits the platform to provide architecture-specific functionality when
|
||||
* penalizing ISA IRQs. This is the default implementation. Architecture
|
||||
* implementations can override this.
|
||||
*/
|
||||
void __weak pcibios_penalize_isa_irq(int irq, int active) {}
|
||||
|
||||
static void do_pci_disable_device(struct pci_dev *dev)
|
||||
{
|
||||
u16 pci_command;
|
||||
|
|
@ -3306,8 +3317,27 @@ static void pci_dev_unlock(struct pci_dev *dev)
|
|||
pci_cfg_access_unlock(dev);
|
||||
}
|
||||
|
||||
/**
|
||||
* pci_reset_notify - notify device driver of reset
|
||||
* @dev: device to be notified of reset
|
||||
* @prepare: 'true' if device is about to be reset; 'false' if reset attempt
|
||||
* completed
|
||||
*
|
||||
* Must be called prior to device access being disabled and after device
|
||||
* access is restored.
|
||||
*/
|
||||
static void pci_reset_notify(struct pci_dev *dev, bool prepare)
|
||||
{
|
||||
const struct pci_error_handlers *err_handler =
|
||||
dev->driver ? dev->driver->err_handler : NULL;
|
||||
if (err_handler && err_handler->reset_notify)
|
||||
err_handler->reset_notify(dev, prepare);
|
||||
}
|
||||
|
||||
static void pci_dev_save_and_disable(struct pci_dev *dev)
|
||||
{
|
||||
pci_reset_notify(dev, true);
|
||||
|
||||
/*
|
||||
* Wake-up device prior to save. PM registers default to D0 after
|
||||
* reset and a simple register restore doesn't reliably return
|
||||
|
|
@ -3329,6 +3359,7 @@ static void pci_dev_save_and_disable(struct pci_dev *dev)
|
|||
static void pci_dev_restore(struct pci_dev *dev)
|
||||
{
|
||||
pci_restore_state(dev);
|
||||
pci_reset_notify(dev, false);
|
||||
}
|
||||
|
||||
static int pci_dev_reset(struct pci_dev *dev, int probe)
|
||||
|
|
@ -3345,6 +3376,7 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)
|
|||
|
||||
return rc;
|
||||
}
|
||||
|
||||
/**
|
||||
* __pci_reset_function - reset a PCI device function
|
||||
* @dev: PCI device to reset
|
||||
|
|
@ -4126,7 +4158,7 @@ int pci_set_vga_state(struct pci_dev *dev, bool decode,
|
|||
u16 cmd;
|
||||
int rc;
|
||||
|
||||
WARN_ON((flags & PCI_VGA_STATE_CHANGE_DECODES) & (command_bits & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY)));
|
||||
WARN_ON((flags & PCI_VGA_STATE_CHANGE_DECODES) && (command_bits & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY)));
|
||||
|
||||
/* ARCH specific VGA enables */
|
||||
rc = pci_set_vga_state_arch(dev, decode, command_bits, flags);
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@ static inline void pci_wakeup_event(struct pci_dev *dev)
|
|||
pm_wakeup_event(&dev->dev, 100);
|
||||
}
|
||||
|
||||
static inline bool pci_is_bridge(struct pci_dev *pci_dev)
|
||||
static inline bool pci_has_subordinate(struct pci_dev *pci_dev)
|
||||
{
|
||||
return !!(pci_dev->subordinate);
|
||||
}
|
||||
|
|
@ -201,11 +201,11 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
|
|||
struct resource *res, unsigned int reg);
|
||||
int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type);
|
||||
void pci_configure_ari(struct pci_dev *dev);
|
||||
void __ref __pci_bus_size_bridges(struct pci_bus *bus,
|
||||
void __pci_bus_size_bridges(struct pci_bus *bus,
|
||||
struct list_head *realloc_head);
|
||||
void __ref __pci_bus_assign_resources(const struct pci_bus *bus,
|
||||
struct list_head *realloc_head,
|
||||
struct list_head *fail_head);
|
||||
void __pci_bus_assign_resources(const struct pci_bus *bus,
|
||||
struct list_head *realloc_head,
|
||||
struct list_head *fail_head);
|
||||
|
||||
/**
|
||||
* pci_ari_enabled - query ARI forwarding status
|
||||
|
|
|
|||
|
|
@ -99,7 +99,7 @@ static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask)
|
|||
for (i = 0; i < nr_entries; i++)
|
||||
msix_entries[i].entry = i;
|
||||
|
||||
status = pci_enable_msix(dev, msix_entries, nr_entries);
|
||||
status = pci_enable_msix_exact(dev, msix_entries, nr_entries);
|
||||
if (status)
|
||||
goto Exit;
|
||||
|
||||
|
|
@ -171,7 +171,7 @@ static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask)
|
|||
pci_disable_msix(dev);
|
||||
|
||||
/* Now allocate the MSI-X vectors for real */
|
||||
status = pci_enable_msix(dev, msix_entries, nvec);
|
||||
status = pci_enable_msix_exact(dev, msix_entries, nvec);
|
||||
if (status)
|
||||
goto Exit;
|
||||
}
|
||||
|
|
@ -379,10 +379,13 @@ int pcie_port_device_register(struct pci_dev *dev)
|
|||
/*
|
||||
* Initialize service irqs. Don't use service devices that
|
||||
* require interrupts if there is no way to generate them.
|
||||
* However, some drivers may have a polling mode (e.g. pciehp_poll_mode)
|
||||
* that can be used in the absence of irqs. Allow them to determine
|
||||
* if that is to be used.
|
||||
*/
|
||||
status = init_service_irqs(dev, irqs, capabilities);
|
||||
if (status) {
|
||||
capabilities &= PCIE_PORT_SERVICE_VC;
|
||||
capabilities &= PCIE_PORT_SERVICE_VC | PCIE_PORT_SERVICE_HP;
|
||||
if (!capabilities)
|
||||
goto error_disable;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -171,9 +171,10 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
|
|||
struct resource *res, unsigned int pos)
|
||||
{
|
||||
u32 l, sz, mask;
|
||||
u64 l64, sz64, mask64;
|
||||
u16 orig_cmd;
|
||||
struct pci_bus_region region, inverted_region;
|
||||
bool bar_too_big = false, bar_disabled = false;
|
||||
bool bar_too_big = false, bar_too_high = false, bar_invalid = false;
|
||||
|
||||
mask = type ? PCI_ROM_ADDRESS_MASK : ~0;
|
||||
|
||||
|
|
@ -226,9 +227,9 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
|
|||
}
|
||||
|
||||
if (res->flags & IORESOURCE_MEM_64) {
|
||||
u64 l64 = l;
|
||||
u64 sz64 = sz;
|
||||
u64 mask64 = mask | (u64)~0 << 32;
|
||||
l64 = l;
|
||||
sz64 = sz;
|
||||
mask64 = mask | (u64)~0 << 32;
|
||||
|
||||
pci_read_config_dword(dev, pos + 4, &l);
|
||||
pci_write_config_dword(dev, pos + 4, ~0);
|
||||
|
|
@ -243,19 +244,22 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
|
|||
if (!sz64)
|
||||
goto fail;
|
||||
|
||||
if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) {
|
||||
if ((sizeof(dma_addr_t) < 8 || sizeof(resource_size_t) < 8) &&
|
||||
sz64 > 0x100000000ULL) {
|
||||
res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED;
|
||||
res->start = 0;
|
||||
res->end = 0;
|
||||
bar_too_big = true;
|
||||
goto fail;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if ((sizeof(resource_size_t) < 8) && l) {
|
||||
/* Address above 32-bit boundary; disable the BAR */
|
||||
pci_write_config_dword(dev, pos, 0);
|
||||
pci_write_config_dword(dev, pos + 4, 0);
|
||||
if ((sizeof(dma_addr_t) < 8) && l) {
|
||||
/* Above 32-bit boundary; try to reallocate */
|
||||
res->flags |= IORESOURCE_UNSET;
|
||||
region.start = 0;
|
||||
region.end = sz64;
|
||||
bar_disabled = true;
|
||||
res->start = 0;
|
||||
res->end = sz64;
|
||||
bar_too_high = true;
|
||||
goto out;
|
||||
} else {
|
||||
region.start = l64;
|
||||
region.end = l64 + sz64;
|
||||
|
|
@ -285,11 +289,10 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
|
|||
* be claimed by the device.
|
||||
*/
|
||||
if (inverted_region.start != region.start) {
|
||||
dev_info(&dev->dev, "reg 0x%x: initial BAR value %pa invalid; forcing reassignment\n",
|
||||
pos, ®ion.start);
|
||||
res->flags |= IORESOURCE_UNSET;
|
||||
res->end -= res->start;
|
||||
res->start = 0;
|
||||
res->end = region.end - region.start;
|
||||
bar_invalid = true;
|
||||
}
|
||||
|
||||
goto out;
|
||||
|
|
@ -303,8 +306,15 @@ out:
|
|||
pci_write_config_word(dev, PCI_COMMAND, orig_cmd);
|
||||
|
||||
if (bar_too_big)
|
||||
dev_err(&dev->dev, "reg 0x%x: can't handle 64-bit BAR\n", pos);
|
||||
if (res->flags && !bar_disabled)
|
||||
dev_err(&dev->dev, "reg 0x%x: can't handle BAR larger than 4GB (size %#010llx)\n",
|
||||
pos, (unsigned long long) sz64);
|
||||
if (bar_too_high)
|
||||
dev_info(&dev->dev, "reg 0x%x: can't handle BAR above 4G (bus address %#010llx)\n",
|
||||
pos, (unsigned long long) l64);
|
||||
if (bar_invalid)
|
||||
dev_info(&dev->dev, "reg 0x%x: initial BAR value %#010llx invalid\n",
|
||||
pos, (unsigned long long) region.start);
|
||||
if (res->flags)
|
||||
dev_printk(KERN_DEBUG, &dev->dev, "reg 0x%x: %pR\n", pos, res);
|
||||
|
||||
return (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
|
||||
|
|
@ -465,7 +475,7 @@ void pci_read_bridge_bases(struct pci_bus *child)
|
|||
|
||||
if (dev->transparent) {
|
||||
pci_bus_for_each_resource(child->parent, res, i) {
|
||||
if (res) {
|
||||
if (res && res->flags) {
|
||||
pci_bus_add_resource(child, res,
|
||||
PCI_SUBTRACTIVE_DECODE);
|
||||
dev_printk(KERN_DEBUG, &dev->dev,
|
||||
|
|
@ -719,7 +729,7 @@ add_dev:
|
|||
return child;
|
||||
}
|
||||
|
||||
struct pci_bus *__ref pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr)
|
||||
struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr)
|
||||
{
|
||||
struct pci_bus *child;
|
||||
|
||||
|
|
@ -983,6 +993,43 @@ void set_pcie_hotplug_bridge(struct pci_dev *pdev)
|
|||
}
|
||||
|
||||
|
||||
/**
|
||||
* pci_ext_cfg_is_aliased - is ext config space just an alias of std config?
|
||||
* @dev: PCI device
|
||||
*
|
||||
* PCI Express to PCI/PCI-X Bridge Specification, rev 1.0, 4.1.4 says that
|
||||
* when forwarding a type1 configuration request the bridge must check that
|
||||
* the extended register address field is zero. The bridge is not permitted
|
||||
* to forward the transactions and must handle it as an Unsupported Request.
|
||||
* Some bridges do not follow this rule and simply drop the extended register
|
||||
* bits, resulting in the standard config space being aliased, every 256
|
||||
* bytes across the entire configuration space. Test for this condition by
|
||||
* comparing the first dword of each potential alias to the vendor/device ID.
|
||||
* Known offenders:
|
||||
* ASM1083/1085 PCIe-to-PCI Reversible Bridge (1b21:1080, rev 01 & 03)
|
||||
* AMD/ATI SBx00 PCI to PCI Bridge (1002:4384, rev 40)
|
||||
*/
|
||||
static bool pci_ext_cfg_is_aliased(struct pci_dev *dev)
|
||||
{
|
||||
#ifdef CONFIG_PCI_QUIRKS
|
||||
int pos;
|
||||
u32 header, tmp;
|
||||
|
||||
pci_read_config_dword(dev, PCI_VENDOR_ID, &header);
|
||||
|
||||
for (pos = PCI_CFG_SPACE_SIZE;
|
||||
pos < PCI_CFG_SPACE_EXP_SIZE; pos += PCI_CFG_SPACE_SIZE) {
|
||||
if (pci_read_config_dword(dev, pos, &tmp) != PCIBIOS_SUCCESSFUL
|
||||
|| header != tmp)
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
#else
|
||||
return false;
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* pci_cfg_space_size - get the configuration space size of the PCI device.
|
||||
* @dev: PCI device
|
||||
|
|
@ -1001,7 +1048,7 @@ static int pci_cfg_space_size_ext(struct pci_dev *dev)
|
|||
|
||||
if (pci_read_config_dword(dev, pos, &status) != PCIBIOS_SUCCESSFUL)
|
||||
goto fail;
|
||||
if (status == 0xffffffff)
|
||||
if (status == 0xffffffff || pci_ext_cfg_is_aliased(dev))
|
||||
goto fail;
|
||||
|
||||
return PCI_CFG_SPACE_EXP_SIZE;
|
||||
|
|
@ -1215,6 +1262,7 @@ static void pci_release_dev(struct device *dev)
|
|||
pci_release_of_node(pci_dev);
|
||||
pcibios_release_device(pci_dev);
|
||||
pci_bus_put(pci_dev->bus);
|
||||
kfree(pci_dev->driver_override);
|
||||
kfree(pci_dev);
|
||||
}
|
||||
|
||||
|
|
@ -1369,7 +1417,7 @@ void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
|
|||
WARN_ON(ret < 0);
|
||||
}
|
||||
|
||||
struct pci_dev *__ref pci_scan_single_device(struct pci_bus *bus, int devfn)
|
||||
struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn)
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
|
||||
|
|
@ -1617,7 +1665,7 @@ static int pcie_bus_configure_set(struct pci_dev *dev, void *data)
|
|||
*/
|
||||
void pcie_bus_configure_settings(struct pci_bus *bus)
|
||||
{
|
||||
u8 smpss;
|
||||
u8 smpss = 0;
|
||||
|
||||
if (!bus->self)
|
||||
return;
|
||||
|
|
@ -1670,8 +1718,7 @@ unsigned int pci_scan_child_bus(struct pci_bus *bus)
|
|||
|
||||
for (pass=0; pass < 2; pass++)
|
||||
list_for_each_entry(dev, &bus->devices, bus_list) {
|
||||
if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
|
||||
dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
|
||||
if (pci_is_bridge(dev))
|
||||
max = pci_scan_bridge(bus, dev, max, pass);
|
||||
}
|
||||
|
||||
|
|
@ -1958,7 +2005,7 @@ EXPORT_SYMBOL(pci_scan_bus);
|
|||
*
|
||||
* Returns the max number of subordinate bus discovered.
|
||||
*/
|
||||
unsigned int __ref pci_rescan_bus_bridge_resize(struct pci_dev *bridge)
|
||||
unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge)
|
||||
{
|
||||
unsigned int max;
|
||||
struct pci_bus *bus = bridge->subordinate;
|
||||
|
|
@ -1981,7 +2028,7 @@ unsigned int __ref pci_rescan_bus_bridge_resize(struct pci_dev *bridge)
|
|||
*
|
||||
* Returns the max number of subordinate bus discovered.
|
||||
*/
|
||||
unsigned int __ref pci_rescan_bus(struct pci_bus *bus)
|
||||
unsigned int pci_rescan_bus(struct pci_bus *bus)
|
||||
{
|
||||
unsigned int max;
|
||||
|
||||
|
|
|
|||
|
|
@ -2954,6 +2954,7 @@ static void disable_igfx_irq(struct pci_dev *dev)
|
|||
}
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0102, disable_igfx_irq);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
|
||||
|
||||
/*
|
||||
* PCI devices which are on Intel chips can skip the 10ms delay
|
||||
|
|
@ -2991,6 +2992,14 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CHELSIO, 0x0030,
|
|||
quirk_broken_intx_masking);
|
||||
DECLARE_PCI_FIXUP_HEADER(0x1814, 0x0601, /* Ralink RT2800 802.11n PCI */
|
||||
quirk_broken_intx_masking);
|
||||
/*
|
||||
* Realtek RTL8169 PCI Gigabit Ethernet Controller (rev 10)
|
||||
* Subsystem: Realtek RTL8169/8110 Family PCI Gigabit Ethernet NIC
|
||||
*
|
||||
* RTL8110SC - Fails under PCI device assignment using DisINTx masking.
|
||||
*/
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_REALTEK, 0x8169,
|
||||
quirk_broken_intx_masking);
|
||||
|
||||
static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
|
||||
struct pci_fixup *end)
|
||||
|
|
@ -3453,6 +3462,8 @@ static const u16 pci_quirk_intel_pch_acs_ids[] = {
|
|||
/* Wildcat PCH */
|
||||
0x9c90, 0x9c91, 0x9c92, 0x9c93, 0x9c94, 0x9c95, 0x9c96, 0x9c97,
|
||||
0x9c98, 0x9c99, 0x9c9a, 0x9c9b,
|
||||
/* Patsburg (X79) PCH */
|
||||
0x1d10, 0x1d12, 0x1d14, 0x1d16, 0x1d18, 0x1d1a, 0x1d1c, 0x1d1e,
|
||||
};
|
||||
|
||||
static bool pci_quirk_intel_pch_acs_match(struct pci_dev *dev)
|
||||
|
|
|
|||
|
|
@ -7,7 +7,6 @@
|
|||
* Copyright (C) 2003 -- 2004 Greg Kroah-Hartman <greg@kroah.com>
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/module.h>
|
||||
|
|
|
|||
|
|
@ -713,12 +713,11 @@ static void pci_bridge_check_ranges(struct pci_bus *bus)
|
|||
bus resource of a given type. Note: we intentionally skip
|
||||
the bus resources which have already been assigned (that is,
|
||||
have non-NULL parent resource). */
|
||||
static struct resource *find_free_bus_resource(struct pci_bus *bus, unsigned long type)
|
||||
static struct resource *find_free_bus_resource(struct pci_bus *bus,
|
||||
unsigned long type_mask, unsigned long type)
|
||||
{
|
||||
int i;
|
||||
struct resource *r;
|
||||
unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
|
||||
IORESOURCE_PREFETCH;
|
||||
|
||||
pci_bus_for_each_resource(bus, r, i) {
|
||||
if (r == &ioport_resource || r == &iomem_resource)
|
||||
|
|
@ -815,7 +814,8 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
|
|||
resource_size_t add_size, struct list_head *realloc_head)
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO);
|
||||
struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO,
|
||||
IORESOURCE_IO);
|
||||
resource_size_t size = 0, size0 = 0, size1 = 0;
|
||||
resource_size_t children_add_size = 0;
|
||||
resource_size_t min_align, align;
|
||||
|
|
@ -907,36 +907,40 @@ static inline resource_size_t calculate_mem_align(resource_size_t *aligns,
|
|||
* @bus : the bus
|
||||
* @mask: mask the resource flag, then compare it with type
|
||||
* @type: the type of free resource from bridge
|
||||
* @type2: second match type
|
||||
* @type3: third match type
|
||||
* @min_size : the minimum memory window that must to be allocated
|
||||
* @add_size : additional optional memory window
|
||||
* @realloc_head : track the additional memory window on this list
|
||||
*
|
||||
* Calculate the size of the bus and minimal alignment which
|
||||
* guarantees that all child resources fit in this size.
|
||||
*
|
||||
* Returns -ENOSPC if there's no available bus resource of the desired type.
|
||||
* Otherwise, sets the bus resource start/end to indicate the required
|
||||
* size, adds things to realloc_head (if supplied), and returns 0.
|
||||
*/
|
||||
static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
|
||||
unsigned long type, resource_size_t min_size,
|
||||
resource_size_t add_size,
|
||||
struct list_head *realloc_head)
|
||||
unsigned long type, unsigned long type2,
|
||||
unsigned long type3,
|
||||
resource_size_t min_size, resource_size_t add_size,
|
||||
struct list_head *realloc_head)
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
resource_size_t min_align, align, size, size0, size1;
|
||||
resource_size_t aligns[12]; /* Alignments from 1Mb to 2Gb */
|
||||
resource_size_t aligns[14]; /* Alignments from 1Mb to 8Gb */
|
||||
int order, max_order;
|
||||
struct resource *b_res = find_free_bus_resource(bus, type);
|
||||
unsigned int mem64_mask = 0;
|
||||
struct resource *b_res = find_free_bus_resource(bus,
|
||||
mask | IORESOURCE_PREFETCH, type);
|
||||
resource_size_t children_add_size = 0;
|
||||
|
||||
if (!b_res)
|
||||
return 0;
|
||||
return -ENOSPC;
|
||||
|
||||
memset(aligns, 0, sizeof(aligns));
|
||||
max_order = 0;
|
||||
size = 0;
|
||||
|
||||
mem64_mask = b_res->flags & IORESOURCE_MEM_64;
|
||||
b_res->flags &= ~IORESOURCE_MEM_64;
|
||||
|
||||
list_for_each_entry(dev, &bus->devices, bus_list) {
|
||||
int i;
|
||||
|
||||
|
|
@ -944,7 +948,9 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
|
|||
struct resource *r = &dev->resource[i];
|
||||
resource_size_t r_size;
|
||||
|
||||
if (r->parent || (r->flags & mask) != type)
|
||||
if (r->parent || ((r->flags & mask) != type &&
|
||||
(r->flags & mask) != type2 &&
|
||||
(r->flags & mask) != type3))
|
||||
continue;
|
||||
r_size = resource_size(r);
|
||||
#ifdef CONFIG_PCI_IOV
|
||||
|
|
@ -957,10 +963,17 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
|
|||
continue;
|
||||
}
|
||||
#endif
|
||||
/* For bridges size != alignment */
|
||||
/*
|
||||
* aligns[0] is for 1MB (since bridge memory
|
||||
* windows are always at least 1MB aligned), so
|
||||
* keep "order" from being negative for smaller
|
||||
* resources.
|
||||
*/
|
||||
align = pci_resource_alignment(dev, r);
|
||||
order = __ffs(align) - 20;
|
||||
if (order > 11) {
|
||||
if (order < 0)
|
||||
order = 0;
|
||||
if (order >= ARRAY_SIZE(aligns)) {
|
||||
dev_warn(&dev->dev, "disabling BAR %d: %pR "
|
||||
"(bad alignment %#llx)\n", i, r,
|
||||
(unsigned long long) align);
|
||||
|
|
@ -968,15 +981,12 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
|
|||
continue;
|
||||
}
|
||||
size += r_size;
|
||||
if (order < 0)
|
||||
order = 0;
|
||||
/* Exclude ranges with size > align from
|
||||
calculation of the alignment. */
|
||||
if (r_size == align)
|
||||
aligns[order] += align;
|
||||
if (order > max_order)
|
||||
max_order = order;
|
||||
mem64_mask &= r->flags & IORESOURCE_MEM_64;
|
||||
|
||||
if (realloc_head)
|
||||
children_add_size += get_res_add_size(realloc_head, r);
|
||||
|
|
@ -997,18 +1007,18 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
|
|||
"%pR to %pR (unused)\n", b_res,
|
||||
&bus->busn_res);
|
||||
b_res->flags = 0;
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
b_res->start = min_align;
|
||||
b_res->end = size0 + min_align - 1;
|
||||
b_res->flags |= IORESOURCE_STARTALIGN | mem64_mask;
|
||||
b_res->flags |= IORESOURCE_STARTALIGN;
|
||||
if (size1 > size0 && realloc_head) {
|
||||
add_to_list(realloc_head, bus->self, b_res, size1-size0, min_align);
|
||||
dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window "
|
||||
"%pR to %pR add_size %llx\n", b_res,
|
||||
&bus->busn_res, (unsigned long long)size1-size0);
|
||||
}
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
unsigned long pci_cardbus_resource_alignment(struct resource *res)
|
||||
|
|
@ -1113,12 +1123,13 @@ handle_done:
|
|||
;
|
||||
}
|
||||
|
||||
void __ref __pci_bus_size_bridges(struct pci_bus *bus,
|
||||
struct list_head *realloc_head)
|
||||
void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head)
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
unsigned long mask, prefmask;
|
||||
unsigned long mask, prefmask, type2 = 0, type3 = 0;
|
||||
resource_size_t additional_mem_size = 0, additional_io_size = 0;
|
||||
struct resource *b_res;
|
||||
int ret;
|
||||
|
||||
list_for_each_entry(dev, &bus->devices, bus_list) {
|
||||
struct pci_bus *b = dev->subordinate;
|
||||
|
|
@ -1152,41 +1163,93 @@ void __ref __pci_bus_size_bridges(struct pci_bus *bus,
|
|||
additional_io_size = pci_hotplug_io_size;
|
||||
additional_mem_size = pci_hotplug_mem_size;
|
||||
}
|
||||
/*
|
||||
* Follow thru
|
||||
*/
|
||||
/* Fall through */
|
||||
default:
|
||||
pbus_size_io(bus, realloc_head ? 0 : additional_io_size,
|
||||
additional_io_size, realloc_head);
|
||||
/* If the bridge supports prefetchable range, size it
|
||||
separately. If it doesn't, or its prefetchable window
|
||||
has already been allocated by arch code, try
|
||||
non-prefetchable range for both types of PCI memory
|
||||
resources. */
|
||||
|
||||
/*
|
||||
* If there's a 64-bit prefetchable MMIO window, compute
|
||||
* the size required to put all 64-bit prefetchable
|
||||
* resources in it.
|
||||
*/
|
||||
b_res = &bus->self->resource[PCI_BRIDGE_RESOURCES];
|
||||
mask = IORESOURCE_MEM;
|
||||
prefmask = IORESOURCE_MEM | IORESOURCE_PREFETCH;
|
||||
if (pbus_size_mem(bus, prefmask, prefmask,
|
||||
if (b_res[2].flags & IORESOURCE_MEM_64) {
|
||||
prefmask |= IORESOURCE_MEM_64;
|
||||
ret = pbus_size_mem(bus, prefmask, prefmask,
|
||||
prefmask, prefmask,
|
||||
realloc_head ? 0 : additional_mem_size,
|
||||
additional_mem_size, realloc_head))
|
||||
mask = prefmask; /* Success, size non-prefetch only. */
|
||||
else
|
||||
additional_mem_size += additional_mem_size;
|
||||
pbus_size_mem(bus, mask, IORESOURCE_MEM,
|
||||
additional_mem_size, realloc_head);
|
||||
|
||||
/*
|
||||
* If successful, all non-prefetchable resources
|
||||
* and any 32-bit prefetchable resources will go in
|
||||
* the non-prefetchable window.
|
||||
*/
|
||||
if (ret == 0) {
|
||||
mask = prefmask;
|
||||
type2 = prefmask & ~IORESOURCE_MEM_64;
|
||||
type3 = prefmask & ~IORESOURCE_PREFETCH;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* If there is no 64-bit prefetchable window, compute the
|
||||
* size required to put all prefetchable resources in the
|
||||
* 32-bit prefetchable window (if there is one).
|
||||
*/
|
||||
if (!type2) {
|
||||
prefmask &= ~IORESOURCE_MEM_64;
|
||||
ret = pbus_size_mem(bus, prefmask, prefmask,
|
||||
prefmask, prefmask,
|
||||
realloc_head ? 0 : additional_mem_size,
|
||||
additional_mem_size, realloc_head);
|
||||
|
||||
/*
|
||||
* If successful, only non-prefetchable resources
|
||||
* will go in the non-prefetchable window.
|
||||
*/
|
||||
if (ret == 0)
|
||||
mask = prefmask;
|
||||
else
|
||||
additional_mem_size += additional_mem_size;
|
||||
|
||||
type2 = type3 = IORESOURCE_MEM;
|
||||
}
|
||||
|
||||
/*
|
||||
* Compute the size required to put everything else in the
|
||||
* non-prefetchable window. This includes:
|
||||
*
|
||||
* - all non-prefetchable resources
|
||||
* - 32-bit prefetchable resources if there's a 64-bit
|
||||
* prefetchable window or no prefetchable window at all
|
||||
* - 64-bit prefetchable resources if there's no
|
||||
* prefetchable window at all
|
||||
*
|
||||
* Note that the strategy in __pci_assign_resource() must
|
||||
* match that used here. Specifically, we cannot put a
|
||||
* 32-bit prefetchable resource in a 64-bit prefetchable
|
||||
* window.
|
||||
*/
|
||||
pbus_size_mem(bus, mask, IORESOURCE_MEM, type2, type3,
|
||||
realloc_head ? 0 : additional_mem_size,
|
||||
additional_mem_size, realloc_head);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void __ref pci_bus_size_bridges(struct pci_bus *bus)
|
||||
void pci_bus_size_bridges(struct pci_bus *bus)
|
||||
{
|
||||
__pci_bus_size_bridges(bus, NULL);
|
||||
}
|
||||
EXPORT_SYMBOL(pci_bus_size_bridges);
|
||||
|
||||
void __ref __pci_bus_assign_resources(const struct pci_bus *bus,
|
||||
struct list_head *realloc_head,
|
||||
struct list_head *fail_head)
|
||||
void __pci_bus_assign_resources(const struct pci_bus *bus,
|
||||
struct list_head *realloc_head,
|
||||
struct list_head *fail_head)
|
||||
{
|
||||
struct pci_bus *b;
|
||||
struct pci_dev *dev;
|
||||
|
|
@ -1218,15 +1281,15 @@ void __ref __pci_bus_assign_resources(const struct pci_bus *bus,
|
|||
}
|
||||
}
|
||||
|
||||
void __ref pci_bus_assign_resources(const struct pci_bus *bus)
|
||||
void pci_bus_assign_resources(const struct pci_bus *bus)
|
||||
{
|
||||
__pci_bus_assign_resources(bus, NULL, NULL);
|
||||
}
|
||||
EXPORT_SYMBOL(pci_bus_assign_resources);
|
||||
|
||||
static void __ref __pci_bridge_assign_resources(const struct pci_dev *bridge,
|
||||
struct list_head *add_head,
|
||||
struct list_head *fail_head)
|
||||
static void __pci_bridge_assign_resources(const struct pci_dev *bridge,
|
||||
struct list_head *add_head,
|
||||
struct list_head *fail_head)
|
||||
{
|
||||
struct pci_bus *b;
|
||||
|
||||
|
|
@ -1257,42 +1320,66 @@ static void __ref __pci_bridge_assign_resources(const struct pci_dev *bridge,
|
|||
static void pci_bridge_release_resources(struct pci_bus *bus,
|
||||
unsigned long type)
|
||||
{
|
||||
int idx;
|
||||
bool changed = false;
|
||||
struct pci_dev *dev;
|
||||
struct pci_dev *dev = bus->self;
|
||||
struct resource *r;
|
||||
unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
|
||||
IORESOURCE_PREFETCH;
|
||||
IORESOURCE_PREFETCH | IORESOURCE_MEM_64;
|
||||
unsigned old_flags = 0;
|
||||
struct resource *b_res;
|
||||
int idx = 1;
|
||||
|
||||
dev = bus->self;
|
||||
for (idx = PCI_BRIDGE_RESOURCES; idx <= PCI_BRIDGE_RESOURCE_END;
|
||||
idx++) {
|
||||
r = &dev->resource[idx];
|
||||
if ((r->flags & type_mask) != type)
|
||||
continue;
|
||||
if (!r->parent)
|
||||
continue;
|
||||
/*
|
||||
* if there are children under that, we should release them
|
||||
* all
|
||||
*/
|
||||
release_child_resources(r);
|
||||
if (!release_resource(r)) {
|
||||
dev_printk(KERN_DEBUG, &dev->dev,
|
||||
"resource %d %pR released\n", idx, r);
|
||||
/* keep the old size */
|
||||
r->end = resource_size(r) - 1;
|
||||
r->start = 0;
|
||||
r->flags = 0;
|
||||
changed = true;
|
||||
}
|
||||
}
|
||||
b_res = &dev->resource[PCI_BRIDGE_RESOURCES];
|
||||
|
||||
/*
|
||||
* 1. if there is io port assign fail, will release bridge
|
||||
* io port.
|
||||
* 2. if there is non pref mmio assign fail, release bridge
|
||||
* nonpref mmio.
|
||||
* 3. if there is 64bit pref mmio assign fail, and bridge pref
|
||||
* is 64bit, release bridge pref mmio.
|
||||
* 4. if there is pref mmio assign fail, and bridge pref is
|
||||
* 32bit mmio, release bridge pref mmio
|
||||
* 5. if there is pref mmio assign fail, and bridge pref is not
|
||||
* assigned, release bridge nonpref mmio.
|
||||
*/
|
||||
if (type & IORESOURCE_IO)
|
||||
idx = 0;
|
||||
else if (!(type & IORESOURCE_PREFETCH))
|
||||
idx = 1;
|
||||
else if ((type & IORESOURCE_MEM_64) &&
|
||||
(b_res[2].flags & IORESOURCE_MEM_64))
|
||||
idx = 2;
|
||||
else if (!(b_res[2].flags & IORESOURCE_MEM_64) &&
|
||||
(b_res[2].flags & IORESOURCE_PREFETCH))
|
||||
idx = 2;
|
||||
else
|
||||
idx = 1;
|
||||
|
||||
r = &b_res[idx];
|
||||
|
||||
if (!r->parent)
|
||||
return;
|
||||
|
||||
/*
|
||||
* if there are children under that, we should release them
|
||||
* all
|
||||
*/
|
||||
release_child_resources(r);
|
||||
if (!release_resource(r)) {
|
||||
type = old_flags = r->flags & type_mask;
|
||||
dev_printk(KERN_DEBUG, &dev->dev, "resource %d %pR released\n",
|
||||
PCI_BRIDGE_RESOURCES + idx, r);
|
||||
/* keep the old size */
|
||||
r->end = resource_size(r) - 1;
|
||||
r->start = 0;
|
||||
r->flags = 0;
|
||||
|
||||
if (changed) {
|
||||
/* avoiding touch the one without PREF */
|
||||
if (type & IORESOURCE_PREFETCH)
|
||||
type = IORESOURCE_PREFETCH;
|
||||
__pci_setup_bridge(bus, type);
|
||||
/* for next child res under same bridge */
|
||||
r->flags = old_flags;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1304,9 +1391,9 @@ enum release_type {
|
|||
* try to release pci bridge resources that is from leaf bridge,
|
||||
* so we can allocate big new one later
|
||||
*/
|
||||
static void __ref pci_bus_release_bridge_resources(struct pci_bus *bus,
|
||||
unsigned long type,
|
||||
enum release_type rel_type)
|
||||
static void pci_bus_release_bridge_resources(struct pci_bus *bus,
|
||||
unsigned long type,
|
||||
enum release_type rel_type)
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
bool is_leaf_bridge = true;
|
||||
|
|
@ -1471,7 +1558,7 @@ void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus)
|
|||
LIST_HEAD(fail_head);
|
||||
struct pci_dev_resource *fail_res;
|
||||
unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
|
||||
IORESOURCE_PREFETCH;
|
||||
IORESOURCE_PREFETCH | IORESOURCE_MEM_64;
|
||||
int pci_try_num = 1;
|
||||
enum enable_type enable_local;
|
||||
|
||||
|
|
@ -1629,9 +1716,7 @@ void pci_assign_unassigned_bus_resources(struct pci_bus *bus)
|
|||
|
||||
down_read(&pci_bus_sem);
|
||||
list_for_each_entry(dev, &bus->devices, bus_list)
|
||||
if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
|
||||
dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
|
||||
if (dev->subordinate)
|
||||
if (pci_is_bridge(dev) && pci_has_subordinate(dev))
|
||||
__pci_bus_size_bridges(dev->subordinate,
|
||||
&add_list);
|
||||
up_read(&pci_bus_sem);
|
||||
|
|
|
|||
|
|
@ -10,7 +10,6 @@
|
|||
*/
|
||||
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/errno.h>
|
||||
|
|
|
|||
|
|
@ -16,7 +16,6 @@
|
|||
* Resource sorting
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/pci.h>
|
||||
|
|
@ -209,21 +208,42 @@ static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
|
|||
|
||||
min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM;
|
||||
|
||||
/* First, try exact prefetching match.. */
|
||||
/*
|
||||
* First, try exact prefetching match. Even if a 64-bit
|
||||
* prefetchable bridge window is below 4GB, we can't put a 32-bit
|
||||
* prefetchable resource in it because pbus_size_mem() assumes a
|
||||
* 64-bit window will contain no 32-bit resources. If we assign
|
||||
* things differently than they were sized, not everything will fit.
|
||||
*/
|
||||
ret = pci_bus_alloc_resource(bus, res, size, align, min,
|
||||
IORESOURCE_PREFETCH,
|
||||
IORESOURCE_PREFETCH | IORESOURCE_MEM_64,
|
||||
pcibios_align_resource, dev);
|
||||
if (ret == 0)
|
||||
return 0;
|
||||
|
||||
if (ret < 0 && (res->flags & IORESOURCE_PREFETCH)) {
|
||||
/*
|
||||
* That failed.
|
||||
*
|
||||
* But a prefetching area can handle a non-prefetching
|
||||
* window (it will just not perform as well).
|
||||
*/
|
||||
/*
|
||||
* If the prefetchable window is only 32 bits wide, we can put
|
||||
* 64-bit prefetchable resources in it.
|
||||
*/
|
||||
if ((res->flags & (IORESOURCE_PREFETCH | IORESOURCE_MEM_64)) ==
|
||||
(IORESOURCE_PREFETCH | IORESOURCE_MEM_64)) {
|
||||
ret = pci_bus_alloc_resource(bus, res, size, align, min,
|
||||
IORESOURCE_PREFETCH,
|
||||
pcibios_align_resource, dev);
|
||||
if (ret == 0)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* If we didn't find a better match, we can put any memory resource
|
||||
* in a non-prefetchable window. If this resource is 32 bits and
|
||||
* non-prefetchable, the first call already tried the only possibility
|
||||
* so we don't need to try again.
|
||||
*/
|
||||
if (res->flags & (IORESOURCE_PREFETCH | IORESOURCE_MEM_64))
|
||||
ret = pci_bus_alloc_resource(bus, res, size, align, min, 0,
|
||||
pcibios_align_resource, dev);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue