From 42f6e16aeb970a8f0e88623d89130c746129ebed Mon Sep 17 00:00:00 2001 From: Tony Truong Date: Mon, 19 Oct 2020 14:08:31 -0700 Subject: [PATCH] ARM: dts: msm: move qcom,boot-option to HSP dedicated DTSI for sdxlemur Having qcom,boot-option set to 0x1 on main sdxlemur devicetree prevents other connects from being automatically enumerated. Most connects do not require manual enumeration like Hastings Prime (HSP) does. Therefore, move qcom,boot-option with 0x1 for PCIe to HSP dedicated devicetree. Change-Id: Ib344311c968fc610df474c5eadc693b45eed3dba --- qcom/sdxlemur-cdp.dtsi | 4 ++++ qcom/sdxlemur-mtp-mbb.dtsi | 3 +++ qcom/sdxlemur-pcie.dtsi | 1 - qcom/sdxlemur-rcm-rc.dtsi | 3 +++ 4 files changed, 10 insertions(+), 1 deletion(-) diff --git a/qcom/sdxlemur-cdp.dtsi b/qcom/sdxlemur-cdp.dtsi index 0b6dc2969cd6..aad992261b6a 100644 --- a/qcom/sdxlemur-cdp.dtsi +++ b/qcom/sdxlemur-cdp.dtsi @@ -11,3 +11,7 @@ &usb { extcon = <&vbus_detect>; }; + +&pcie0 { + qcom,boot-option = <0x1>; +}; diff --git a/qcom/sdxlemur-mtp-mbb.dtsi b/qcom/sdxlemur-mtp-mbb.dtsi index cc3a833f430e..7b1f8063b8e6 100644 --- a/qcom/sdxlemur-mtp-mbb.dtsi +++ b/qcom/sdxlemur-mtp-mbb.dtsi @@ -3,3 +3,6 @@ }; +&pcie0 { + qcom,boot-option = <0x1>; +}; diff --git a/qcom/sdxlemur-pcie.dtsi b/qcom/sdxlemur-pcie.dtsi index 11ef2356d6b2..df3f98564a8c 100644 --- a/qcom/sdxlemur-pcie.dtsi +++ b/qcom/sdxlemur-pcie.dtsi @@ -91,7 +91,6 @@ iommu-map = <0x0 &apps_smmu 0x0200 0x1>, <0x100 &apps_smmu 0x0201 0x1>; - qcom,boot-option = <0x1>; qcom,use-19p2mhz-aux-clk; qcom,slv-addr-space-size = <0x40000000>; qcom,ep-latency = <10>; diff --git a/qcom/sdxlemur-rcm-rc.dtsi b/qcom/sdxlemur-rcm-rc.dtsi index cc3a833f430e..7b1f8063b8e6 100644 --- a/qcom/sdxlemur-rcm-rc.dtsi +++ b/qcom/sdxlemur-rcm-rc.dtsi @@ -3,3 +3,6 @@ }; +&pcie0 { + qcom,boot-option = <0x1>; +};