mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 02:32:09 -04:00
dt-bindings: Add snapshot for 5.3-rc4
Add the device-tree bindings' snapshot from tmp-9855ec2fd422 for 5.3-rc4. Change-Id: I25b0ac9b29c0347f557b87094ede86370a89a0f2
This commit is contained in:
parent
ab7fda2e71
commit
430b7fac16
288 changed files with 4680 additions and 3996 deletions
|
|
@ -2,8 +2,8 @@ Amlogic Canvas
|
|||
================================
|
||||
|
||||
A canvas is a collection of metadata that describes a pixel buffer.
|
||||
Those metadata include: width, height, phyaddr, wrapping, block mode
|
||||
and endianness.
|
||||
Those metadata include: width, height, phyaddr, wrapping and block mode.
|
||||
Starting with GXBB the endianness can also be described.
|
||||
|
||||
Many IPs within Amlogic SoCs rely on canvas indexes to read/write pixel data
|
||||
rather than use the phy addresses directly. For instance, this is the case for
|
||||
|
|
@ -18,7 +18,11 @@ Video Lookup Table
|
|||
--------------------------
|
||||
|
||||
Required properties:
|
||||
- compatible: "amlogic,canvas"
|
||||
- compatible: has to be one of:
|
||||
- "amlogic,meson8-canvas", "amlogic,canvas" on Meson8
|
||||
- "amlogic,meson8b-canvas", "amlogic,canvas" on Meson8b
|
||||
- "amlogic,meson8m2-canvas", "amlogic,canvas" on Meson8m2
|
||||
- "amlogic,canvas" on GXBB and newer
|
||||
- reg: Base physical address and size of the canvas registers.
|
||||
|
||||
Example:
|
||||
|
|
|
|||
81
bindings/soc/qcom/qcom,aoss-qmp.txt
Normal file
81
bindings/soc/qcom/qcom,aoss-qmp.txt
Normal file
|
|
@ -0,0 +1,81 @@
|
|||
Qualcomm Always-On Subsystem side channel binding
|
||||
|
||||
This binding describes the hardware component responsible for side channel
|
||||
requests to the always-on subsystem (AOSS), used for certain power management
|
||||
requests that is not handled by the standard RPMh interface. Each client in the
|
||||
SoC has it's own block of message RAM and IRQ for communication with the AOSS.
|
||||
The protocol used to communicate in the message RAM is known as Qualcomm
|
||||
Messaging Protocol (QMP)
|
||||
|
||||
The AOSS side channel exposes control over a set of resources, used to control
|
||||
a set of debug related clocks and to affect the low power state of resources
|
||||
related to the secondary subsystems. These resources are exposed as a set of
|
||||
power-domains.
|
||||
|
||||
- compatible:
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: must be "qcom,sdm845-aoss-qmp"
|
||||
|
||||
- reg:
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: the base address and size of the message RAM for this
|
||||
client's communication with the AOSS
|
||||
|
||||
- interrupts:
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: should specify the AOSS message IRQ for this client
|
||||
|
||||
- mboxes:
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: reference to the mailbox representing the outgoing doorbell
|
||||
in APCS for this client, as described in mailbox/mailbox.txt
|
||||
|
||||
- #clock-cells:
|
||||
Usage: optional
|
||||
Value type: <u32>
|
||||
Definition: must be 0
|
||||
The single clock represents the QDSS clock.
|
||||
|
||||
- #power-domain-cells:
|
||||
Usage: optional
|
||||
Value type: <u32>
|
||||
Definition: must be 1
|
||||
The provided power-domains are:
|
||||
CDSP state (0), LPASS state (1), modem state (2), SLPI
|
||||
state (3), SPSS state (4) and Venus state (5).
|
||||
|
||||
= SUBNODES
|
||||
The AOSS side channel also provides the controls for three cooling devices,
|
||||
these are expressed as subnodes of the QMP node. The name of the node is used
|
||||
to identify the resource and must therefor be "cx", "mx" or "ebi".
|
||||
|
||||
- #cooling-cells:
|
||||
Usage: optional
|
||||
Value type: <u32>
|
||||
Definition: must be 2
|
||||
|
||||
= EXAMPLE
|
||||
|
||||
The following example represents the AOSS side-channel message RAM and the
|
||||
mechanism exposing the power-domains, as found in SDM845.
|
||||
|
||||
aoss_qmp: qmp@c300000 {
|
||||
compatible = "qcom,sdm845-aoss-qmp";
|
||||
reg = <0x0c300000 0x100000>;
|
||||
interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
|
||||
mboxes = <&apss_shared 0>;
|
||||
|
||||
#power-domain-cells = <1>;
|
||||
|
||||
cx_cdev: cx {
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
mx_cdev: mx {
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
|
@ -9,7 +9,7 @@ used for audio/voice services on the QDSP.
|
|||
Value type: <stringlist>
|
||||
Definition: must be "qcom,apr-v<VERSION-NUMBER>", example "qcom,apr-v2"
|
||||
|
||||
- reg
|
||||
- qcom,apr-domain
|
||||
Usage: required
|
||||
Value type: <u32>
|
||||
Definition: Destination processor ID.
|
||||
|
|
@ -49,9 +49,9 @@ by the individual bindings for the specific service
|
|||
The following example represents a QDSP based sound card on a MSM8996 device
|
||||
which uses apr as communication between Apps and QDSP.
|
||||
|
||||
apr@4 {
|
||||
apr {
|
||||
compatible = "qcom,apr-v2";
|
||||
reg = <APR_DOMAIN_ADSP>;
|
||||
qcom,apr-domain = <APR_DOMAIN_ADSP>;
|
||||
|
||||
q6core@3 {
|
||||
compatible = "qcom,q6core";
|
||||
|
|
|
|||
|
|
@ -21,6 +21,11 @@ edge.
|
|||
Definition: should specify the IRQ used by the remote processor to
|
||||
signal this processor about communication related events
|
||||
|
||||
- qcom,remote-pid:
|
||||
Usage: required for glink-smem
|
||||
Value type: <u32>
|
||||
Definition: specifies the identifier of the remote endpoint of this edge
|
||||
|
||||
- qcom,rpm-msg-ram:
|
||||
Usage: required for glink-rpm
|
||||
Value type: <prop-encoded-array>
|
||||
|
|
|
|||
Loading…
Reference in a new issue