From 430f4fb3a3ce2b11d300be83f094b366ede829c7 Mon Sep 17 00:00:00 2001 From: Manikandan Mohan Date: Fri, 24 Jan 2020 15:04:03 -0800 Subject: [PATCH] ARM: dts: msm: Add CNSS2 node for Lahaina Add CNSS2 device tree entry for WLAN HSP parameters. Change-Id: I73b6f386adbc981819c6bdfd3819b551781a7e70 --- qcom/lahaina-pinctrl.dtsi | 30 +++++++ qcom/lahaina.dtsi | 171 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 201 insertions(+) diff --git a/qcom/lahaina-pinctrl.dtsi b/qcom/lahaina-pinctrl.dtsi index 073026aac958..6d5c70917d9a 100644 --- a/qcom/lahaina-pinctrl.dtsi +++ b/qcom/lahaina-pinctrl.dtsi @@ -2155,6 +2155,36 @@ }; + cnss_pins { + cnss_wlan_en_active: cnss_wlan_en_active { + mux { + pins = "gpio64"; + function = "gpio"; + }; + + config { + pins = "gpio64"; + drive-strength = <16>; + output-high; + bias-pull-up; + }; + }; + + cnss_wlan_en_sleep: cnss_wlan_en_sleep { + mux { + pins = "gpio64"; + function = "gpio"; + }; + + config { + pins = "gpio64"; + drive-strength = <2>; + output-low; + bias-pull-down; + }; + }; + }; + bt_en_sleep: bt_en_sleep { mux { pins = "gpio65"; diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi index 27fe0bdbf548..1aa9fd751d49 100644 --- a/qcom/lahaina.dtsi +++ b/qcom/lahaina.dtsi @@ -446,6 +446,14 @@ size = <0x0 0xA400000>; }; + cnss_wlan_mem: cnss_wlan_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x1400000>; + }; + /* global autoconfigured region for contiguous allocations */ linux,cma { compatible = "shared-dma-pool"; @@ -3126,6 +3134,146 @@ qcom,iommu-dma = "atomic"; }; + wlan: qcom,cnss-qca6490@b0000000 { + compatible = "qcom,cnss-qca6490"; + reg = <0xb0000000 0x10000>; + reg-names = "smmu_iova_ipa"; + wlan-en-gpio = <&tlmm 64 0>; + pinctrl-names = "wlan_en_active", "wlan_en_sleep"; + pinctrl-0 = <&cnss_wlan_en_active>; + pinctrl-1 = <&cnss_wlan_en_sleep>; + qcom,wlan-rc-num = <0>; + qcom,wlan-ramdump-dynamic = <0x420000>; + + vdd-wlan-aon-supply = <&S2E>; + qcom,vdd-wlan-aon-config = <950000 952000 0 0 1>; + vdd-wlan-dig-supply = <&S11B>; + qcom,vdd-wlan-dig-config = <950000 952000 0 0 1>; + vdd-wlan-io-supply = <&S10B>; + qcom,vdd-wlan-io-config = <1800000 1800000 0 0 1>; + vdd-wlan-rfa1-supply = <&S1C>; + qcom,vdd-wlan-rfa1-config = <1880000 1880000 0 0 1>; + vdd-wlan-rfa2-supply = <&S12B>; + qcom,vdd-wlan-rfa2-config = <1256000 1256000 0 0 1>; + wlan-ant-switch-supply = <&L7E>; + qcom,wlan-ant-switch-config = <2800000 2800000 0 0 0>; + + mhi,max-channels = <30>; + mhi,timeout = <10000>; + mhi,buffer-len = <0x8000>; + mhi,m2-no-db-access; + + mhi_channels { + #address-cells = <1>; + #size-cells = <0>; + + mhi_chan@0 { + reg = <0>; + label = "LOOPBACK"; + mhi,num-elements = <32>; + mhi,event-ring = <1>; + mhi,chan-dir = <1>; + mhi,data-type = <0>; + mhi,doorbell-mode = <2>; + mhi,ee = <0x14>; + }; + + mhi_chan@1 { + reg = <1>; + label = "LOOPBACK"; + mhi,num-elements = <32>; + mhi,event-ring = <1>; + mhi,chan-dir = <2>; + mhi,data-type = <0>; + mhi,doorbell-mode = <2>; + mhi,ee = <0x14>; + }; + + mhi_chan@4 { + reg = <4>; + label = "DIAG"; + mhi,num-elements = <32>; + mhi,event-ring = <1>; + mhi,chan-dir = <1>; + mhi,data-type = <0>; + mhi,doorbell-mode = <2>; + mhi,ee = <0x14>; + }; + + mhi_chan@5 { + reg = <5>; + label = "DIAG"; + mhi,num-elements = <32>; + mhi,event-ring = <1>; + mhi,chan-dir = <2>; + mhi,data-type = <0>; + mhi,doorbell-mode = <2>; + mhi,ee = <0x14>; + }; + + mhi_chan@20 { + reg = <20>; + label = "IPCR"; + mhi,num-elements = <32>; + mhi,event-ring = <1>; + mhi,chan-dir = <1>; + mhi,data-type = <1>; + mhi,doorbell-mode = <2>; + mhi,ee = <0x14>; + mhi,auto-start; + }; + + mhi_chan@21 { + reg = <21>; + label = "IPCR"; + mhi,num-elements = <32>; + mhi,event-ring = <1>; + mhi,chan-dir = <2>; + mhi,data-type = <0>; + mhi,doorbell-mode = <2>; + mhi,ee = <0x14>; + mhi,auto-queue; + mhi,auto-start; + }; + }; + + mhi_events { + mhi_event@0 { + mhi,num-elements = <32>; + mhi,intmod = <0>; + mhi,msi = <1>; + mhi,priority = <1>; + mhi,brstmode = <2>; + mhi,data-type = <1>; + }; + + mhi_event@1 { + mhi,num-elements = <256>; + mhi,intmod = <0>; + mhi,msi = <2>; + mhi,priority = <1>; + mhi,brstmode = <2>; + }; + + mhi_event@2 { + mhi,num-elements = <32>; + mhi,intmod = <0>; + mhi,msi = <0>; + mhi,priority = <2>; + mhi,brstmode = <2>; + mhi,data-type = <3>; + }; + }; + + mhi_devices { + mhi_qrtr { + mhi,chan = "IPCR"; + qcom,net-id = <0>; + qcom,low-latency; + }; + }; + }; + qcom,pmic_glink { compatible = "qcom,pmic-glink"; qcom,pmic-glink-channel = "PMIC_RTR_ADSP_APPS"; @@ -3179,5 +3327,28 @@ #include "lahaina-vidc.dtsi" #include "lahaina-cvp.dtsi" #include "lahaina-pcie.dtsi" + +&pcie0_rp { + #address-cells = <5>; + #size-cells = <0>; + + cnss_pci: cnss_pci { + reg = <0 0 0 0 0>; + qcom,iommu-group = <&cnss_pci_iommu_group>; + memory-region = <&cnss_wlan_mem>; + + #address-cells = <1>; + #size-cells = <1>; + + cnss_pci_iommu_group: cnss_pci_iommu_group { + qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>; + qcom,iommu-dma = "fastmap"; + qcom,iommu-pagetable = "coherent"; + qcom,iommu-faults = "stall-disable", "no-CFRE", + "non-fatal"; + }; + }; +}; + #include "lahaina-gpu.dtsi" #include "display/lahaina-sde.dtsi"