From 43425e5de582f8018786fa7b9ff9074e5be581a8 Mon Sep 17 00:00:00 2001 From: louhs1 Date: Thu, 1 Jul 2021 21:27:01 +0800 Subject: [PATCH] arm64/dt: corfuq: add pm6125 dtsi to corfuq pm6125 is compatibel with pm6375, so add pm6125 dtsi to corfuq project Change-Id: I74762a67f70625a6d47ba01bf0b494773af3dce1 Signed-off-by: louhs1 Reviewed-on: https://gerrit.mot.com/1999566 SLTApproved: Slta Waiver SME-Granted: SME Approvals Granted Tested-by: Jira Key Reviewed-by: Xiaojun Ji Reviewed-by: Hujun Liao Submit-Approved: Jira Key --- qcom/holi-corfuq-common-overlay.dtsi | 296 +++++++++++++++++---------- 1 file changed, 189 insertions(+), 107 deletions(-) diff --git a/qcom/holi-corfuq-common-overlay.dtsi b/qcom/holi-corfuq-common-overlay.dtsi index 120072dad2ed..ed6ff3df1193 100644 --- a/qcom/holi-corfuq-common-overlay.dtsi +++ b/qcom/holi-corfuq-common-overlay.dtsi @@ -10,14 +10,26 @@ * GNU General Public License for more details. */ -#include "holi-moto-common-overlay.dtsi" -#include "corfup-display.dtsi" -#include "corfup-touchscreen.dtsi" -#include "corfup-fps-overlay.dtsi" +//#include "holi-moto-common-overlay.dtsi" +//#include "corfup-display.dtsi" +//#include "corfup-touchscreen.dtsi" +//#include "corfup-fps-overlay.dtsi" +//#include "camera/holi-camera-sensor-mot-corfup-overlay.dtsi" +//#include "holi-audio-wcd9370-aw882xx-overlay.dtsi" +//#include "moto_therm_sys_temp.dtsi" +//#include "corfup-charger.dtsi" + +#include "holi-pm6125-moto-common-overlay.dtsi" + +#include "holi-audio-overlay.dtsi" +#include +#include +#include "holi-pmic-overlay-pm6125.dtsi" +#include "holi-thermal-overlay-pm6125.dtsi" +#include "display/holi-sde-display-mtp-pm6125.dtsi" +#include #include "camera/holi-camera-sensor-mot-corfup-overlay.dtsi" -#include "holi-audio-wcd9370-aw882xx-overlay.dtsi" -#include "moto_therm_sys_temp.dtsi" -#include "corfup-charger.dtsi" +#include "corfup-fps-overlay.dtsi" &tlmm { google_key_default: google_key_default { @@ -129,18 +141,21 @@ -&gpio_keys { - pinctrl-0 = <&key_vol_up_default &google_key_default>; +&soc { + gpio_keys { - google_key { - label = "google_key"; - gpios = <&tlmm 11 GPIO_ACTIVE_LOW>; - linux,input-type = <1>; - linux,code = ; - gpio-key,wakeup; - debounce-interval = <15>; - linux,can-disable; - }; + pinctrl-0 = <&key_vol_up_default &google_key_default>; + + google_key { + label = "google_key"; + gpios = <&tlmm 11 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + gpio-key,wakeup; + debounce-interval = <15>; + linux,can-disable; + }; + }; }; &sdhc_2 { @@ -240,107 +255,172 @@ }; }; -&sx937x { - pinctrl-names = "default","sleep"; - pinctrl-0 = <&sar_int_default>; - pinctrl-1 = <&sar_int_sleep>; - interrupt-parent = <&tlmm>; - interrupts = <24 0x02>; - interrupt-names = "sx937x_irq"; - Semtech,nirq-gpio = <&tlmm 24 0x02>; - cap_vdd-supply = <&pm6150a_l8>; - /*use PH4/5/6 as the reference sensor - set it to 0xff if the ref-phases-x is not used*/ - Semtech,ref-phases-a = <4>; - Semtech,ref-phases-b = <5>; - Semtech,ref-phases-c = <6>; - Semtech,button-flag = <0x0f>; - Semtech,reg-num = <61>; - Semtech,reg-init = < - 0x8024 0x7F00 /*PHEN, Disable all Phases*/ - 0x4004 0x74 /*irq mask*/ - 0x8020 0x10 /*Set scan period*/ +&tlmm { + sar_int_default: sar_int_default { + mux { + pins = "gpio24"; + function = "gpio"; + }; + config { + pins = "gpio24"; + num-grp-pins = <1>; + drive-strength = <2>; + bias-pull-up; + }; + }; - /*set Phase sampling frequency to 65KHz*/ - 0x8028 0x876 /*AFE_PARAM_PH0*/ - 0x8034 0x876 /*AFE_PARAM_PH1*/ - 0x8040 0x876 /*AFE_PARAM_PH2*/ - 0x804C 0x876 /*AFE_PARAM_PH3*/ - 0x8058 0x876 /*AFE_PARAM_PH4*/ - 0x8064 0x876 /*AFE_PARAM_PH5*/ - 0x8070 0x876 /*AFE_PARAM_PH6*/ - /*0x807C 0x876 */ /*AFE_PARAM_PH7*/ + sar_int_sleep: sar_int_sleep { + mux { + pins = "gpio24"; + function = "gpio"; + }; + config { + pins = "gpio24"; + num-grp-pins = <1>; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; - /*set CS3 to hiz, because it used as IRQ pin*/ - 0x8030 0xFEF9FF /*REG_AFEPH_PH0, CS5, ANT1, Bottom*/ - 0x803C 0xBFF9FF /*REG_AFEPH_PH1, CS7, ANT2, Top Right*/ - 0x8048 0xFFF9FD /*REG_AFEPH_PH2, CS0, ANT3, Top Left*/ - 0x8054 0xFFD9FF /*REG_AFEPH_PH3, CS4, ANT4, Top Right side*/ - 0x8060 0xF7F9FF /*REG_AFEPH_PH4, CS6, ANT1_REF, Bottom*/ - 0x806C 0xFFF9EF /*REG_AFEPH_PH5, CS1, ANT2_REF, Top Right*/ - 0x8078 0xFFF97F /*REG_AFEPH_PH6, CS2, ANT3_REF, Top Left*/ - 0x8084 0xFFF9FF /*REG_AFEPH_PH7, NOT USE*/ +&qupv3_se8_i2c { + status = "okay"; + qcom,i2c-touch-active="synaptics,tcm-i2c"; - /*Set Phase Proximity Threshold*/ - 0x8098 0x00009240 /*prox threshold ph0*/ - 0x80B8 0x00008035 /*prox threshold ph1*/ - 0x80D8 0x00004343 /*prox threshold ph2*/ - 0x80F8 0x00003C3C /*prox threshold ph3*/ - 0x8118 0x00000000 /*prox threshold ph4*/ - 0x8138 0x00000000 /*prox threshold ph5*/ - 0x8158 0x00000000 /*prox threshold ph6*/ - /*0x8178 0x00000000*/ /*prox threshold ph7*/ + synaptics_tcm@20 { + compatible = "synaptics,tcm-i2c"; + reg = <0x20>; + interrupt-parent = <&tlmm>; + interrupts = <22 0x2008>; + pinctrl-names = "pmx_ts_active","pmx_ts_suspend", + "pmx_ts_release"; + pinctrl-0 = <&ts_active>; + pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; + pinctrl-2 = <&pmx_ts_release>; + vdd-supply = <&L11A>; + avdd-supply = <&L6A>; + synaptics,pwr-reg-name = "avdd"; + synaptics,bus-reg-name = "vdd"; + synaptics,irq-gpio = <&tlmm 22 0x2008>; + synaptics,irq-on-state = <0>; + synaptics,reset-gpio = <&tlmm 21 0x00>; + synaptics,reset-on-state = <0>; + synaptics,reset-active-ms = <20>; + synaptics,reset-delay-ms = <200>; + synaptics,power-delay-ms = <200>; + synaptics,ubl-i2c-addr = <0x20>; + synaptics,extend_report; + synaptics,firmware-name = "synaptics_firmware.img"; - /*Set Useful Filter*/ - 0x808C 0x20600019 /*PH0 Filter Setup B, non-detect threshold of USE filter*/ - 0x80AC 0x20600019 /*PH1 Filter Setup B, non-detect threshold of USE filter*/ - 0x80CC 0x20600019 /*PH2 Filter Setup B, non-detect threshold of USE filter*/ - 0x80EC 0x20600019 /*PH3 Filter Setup B, non-detect threshold of USE filter*/ - 0x810C 0x20600019 /*PH4 Filter Setup B, non-detect threshold of USE filter*/ - 0x812C 0x20600019 /*PH5 Filter Setup B, non-detect threshold of USE filter*/ - 0x814C 0x20600019 /*PH6 Filter Setup B, non-detect threshold of USE filter*/ - 0x816C 0x20600019 /*PH7 Filter Setup B, non-detect threshold of USE filter*/ + panel = <&dsi_rm69299_visionox_amoled_video + &dsi_rm69299_visionox_amoled_cmd>; + }; - 0x8090 0x50D47000 - 0x80B0 0x46D87000 - 0x80D0 0x46D07000 - 0x80F0 0x3CDE7000 - 0x8110 0x50D27000 - 0x8130 0x50D27000 - 0x8150 0x50D27000 - 0x8170 0x50D27000 + sx937x:sx937x@2c { + compatible = "Semtech,sx937x"; + reg = <0x2c>; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&sar_int_default>; + pinctrl-1 = <&sar_int_sleep>; + interrupt-parent = <&tlmm>; + interrupts = <24 0x02>; + interrupt-names = "sx937x_irq"; + Semtech,nirq-gpio = <&tlmm 24 0x02>; + //please fix me + //cap_vdd-supply = <&pm6150a_l8>; + /*use PH4/5/6 as the reference sensor + set it to 0xff if the ref-phases-x is not used*/ + Semtech,ref-phases-a = <4>; + Semtech,ref-phases-b = <5>; + Semtech,ref-phases-c = <6>; + Semtech,button-flag = <0x0f>; + Semtech,reg-num = <61>; + Semtech,reg-init = < + 0x8024 0x7F00 /*PHEN, Disable all Phases*/ + 0x4004 0x74 /*irq mask*/ + 0x8020 0x10 /*Set scan period*/ - /*PH0123 raw filter 1/4*/ - 0x8088 0x300000 - 0x80A8 0x300000 - 0x80C8 0x300000 - 0x80E8 0x300000 + /*set Phase sampling frequency to 65KHz*/ + 0x8028 0x876 /*AFE_PARAM_PH0*/ + 0x8034 0x876 /*AFE_PARAM_PH1*/ + 0x8040 0x876 /*AFE_PARAM_PH2*/ + 0x804C 0x876 /*AFE_PARAM_PH3*/ + 0x8058 0x876 /*AFE_PARAM_PH4*/ + 0x8064 0x876 /*AFE_PARAM_PH5*/ + 0x8070 0x876 /*AFE_PARAM_PH6*/ + /*0x807C 0x876 */ /*AFE_PARAM_PH7*/ - /*PH456 raw filter 1/64*/ - 0x8108 0x600000 - 0x8128 0x600000 - 0x8148 0x600000 + /*set CS3 to hiz, because it used as IRQ pin*/ + 0x8030 0xFFD9FF /*REG_AFEPH_PH0, CS4, ANT1, Bottom*/ + 0x803C 0xBFF9FF /*REG_AFEPH_PH1, CS7, ANT2, Top Right*/ + 0x8048 0xFFF9FD /*REG_AFEPH_PH2, CS0, ANT3, Top Left*/ + 0x8054 0xFEF9FF /*REG_AFEPH_PH3, CS5, ANT4, Top Right side*/ + 0x8060 0xF7F9FF /*REG_AFEPH_PH4, CS6, ANT1_REF, Bottom*/ + 0x806C 0xFFF97F /*REG_AFEPH_PH5, CS2, ANT2_REF, Top Right*/ + 0x8078 0xFFF9EF /*REG_AFEPH_PH6, CS1, ANT3_REF, Top Left*/ + 0x8084 0xBFF9FF /*REG_AFEPH_PH7, NOT USE*/ - /*Set Reference Phase*/ - 0x8188 0x8000014 /*Reference Correction Setup B ENG1*/ - 0x818C 0x0 /*Reference Correction Setup B ENG2*/ - 0x8190 0x0 /*Reference Correction Setup B ENG3*/ - 0x8194 0x0 /*Reference Correction Setup B ENG4*/ + /*Set Phase Proximity Threshold*/ + 0x8098 0x00009240 /*prox threshold ph0*/ + 0x80B8 0x00008035 /*prox threshold ph1*/ + 0x80D8 0x00004343 /*prox threshold ph2*/ + 0x80F8 0x00003C3C /*prox threshold ph3*/ + 0x8118 0x00000000 /*prox threshold ph4*/ + 0x8138 0x00000000 /*prox threshold ph5*/ + 0x8158 0x00000000 /*prox threshold ph6*/ + /*0x8178 0x00000000*/ /*prox threshold ph7*/ + + /*Set Useful Filter*/ + 0x808C 0x20600019 /*PH0 Filter Setup B, non-detect threshold of USE filter*/ + 0x80AC 0x20600019 /*PH1 Filter Setup B, non-detect threshold of USE filter*/ + 0x80CC 0x20600019 /*PH2 Filter Setup B, non-detect threshold of USE filter*/ + 0x80EC 0x20600019 /*PH3 Filter Setup B, non-detect threshold of USE filter*/ + 0x810C 0x20600019 /*PH4 Filter Setup B, non-detect threshold of USE filter*/ + 0x812C 0x20600019 /*PH5 Filter Setup B, non-detect threshold of USE filter*/ + 0x814C 0x20600019 /*PH6 Filter Setup B, non-detect threshold of USE filter*/ + 0x816C 0x20600019 /*PH7 Filter Setup B, non-detect threshold of USE filter*/ + + 0x8090 0x50D47000 + 0x80B0 0x46D87000 + 0x80D0 0x46D07000 + 0x80F0 0x3CDE7000 + 0x8110 0x50D27000 + 0x8130 0x50D27000 + 0x8150 0x50D27000 + 0x8170 0x50D27000 + + /*PH0123 raw filter 1/4*/ + 0x8088 0x300000 + 0x80A8 0x300000 + 0x80C8 0x300000 + 0x80E8 0x300000 + + /*PH456 raw filter 1/64*/ + 0x8108 0x600000 + 0x8128 0x600000 + 0x8148 0x600000 + + /*Set Reference Phase*/ + 0x8188 0x8000014 /*Reference Correction Setup B ENG1*/ + 0x818C 0x0 /*Reference Correction Setup B ENG2*/ + 0x8190 0x0 /*Reference Correction Setup B ENG3*/ + 0x8194 0x0 /*Reference Correction Setup B ENG4*/ /*Set Reference Correction*/ - 0x80A0 0x222200E1 /*Reference Correction Setup A PH0*/ - 0x80C0 0x0 /*Reference Correction Setup A PH1*/ - 0x80E0 0x0 /*Reference Correction Setup A PH2*/ - 0x8100 0x0 /*Reference Correction Setup A PH3*/ - 0x8120 0x0 /*Reference Correction Setup A PH4*/ - 0x8140 0x0 /*Reference Correction Setup A PH5*/ - 0x8160 0x0 /*Reference Correction Setup A PH6*/ - 0x8180 0x0 /*Reference Correction Setup A PH7*/ + 0x80A0 0x222200E1 /*Reference Correction Setup A PH0*/ + 0x80C0 0x0 /*Reference Correction Setup A PH1*/ + 0x80E0 0x0 /*Reference Correction Setup A PH2*/ + 0x8100 0x0 /*Reference Correction Setup A PH3*/ + 0x8120 0x0 /*Reference Correction Setup A PH4*/ + 0x8140 0x0 /*Reference Correction Setup A PH5*/ + 0x8160 0x0 /*Reference Correction Setup A PH6*/ + 0x8180 0x0 /*Reference Correction Setup A PH7*/ - 0x8024 0x7F7F /*PHEN, Enable PH0~PH6*/ - >; + 0x8024 0x7F7F /*PHEN, Enable PH0~PH6*/ + >; - status = "ok"; + status = "ok"; + }; }; &qupv3_se7_i2c { @@ -388,6 +468,7 @@ }; }; +/* &thermal_zones { pa-therm0-usr { status = "disabled"; @@ -557,6 +638,7 @@ }; }; }; +*/ &pm8008_8 { status = "disabled";