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drm/i915: ignore eDP bpc settings from vbt

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This has originally been introduced to not oversubscribe the dp links
in

commit 885a5fb5b1
Author: Zhenyu Wang <[email protected]>
Date:   Tue Jan 12 05:38:31 2010 +0800

    drm/i915: fix pixel color depth setting on eDP

Since then we've fixed up the dp link bandwidth calculation code and
should now automatically fall back to 6bpc dithering. So this is
unnecessary.

Furthermore it seems to break the new MacbookPro with retina display,
hence let's just rip this out.

Reported-by: Benoit Gschwind <[email protected]>
Cc: Benoit Gschwind <[email protected]>
Cc: Francois Rigaut <[email protected]>
Cc: Greg KH <[email protected]>
Cc: [email protected]
Tested-by: Benoit Gschwind <[email protected]>
Tested-by: Bernhard Froemel <froemel at vmars tuwien.ac.at>
Signed-off-by: Daniel Vetter <[email protected]>

--

Testing feedback highgly welcome, and thanks for Benoit for finding
out that the bpc computations are busted.
-Daniel
This commit is contained in:
Daniel Vetter 2012-08-10 11:10:20 +02:00
commit 4344b813f1
1 changed files with 0 additions and 11 deletions
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11
drivers/gpu/drm/i915/intel_display.c
View file

@ -3754,17 +3754,6 @@ static bool intel_choose_pipe_bpp_dither(struct drm_crtc *crtc,
continue;
}
if (intel_encoder->type == INTEL_OUTPUT_EDP) {
/* Use VBT settings if we have an eDP panel */
unsigned int edp_bpc = dev_priv->edp.bpp / 3;
if (edp_bpc < display_bpc) {
DRM_DEBUG_KMS("clamping display bpc (was %d) to eDP (%d)\n", display_bpc, edp_bpc);
display_bpc = edp_bpc;
}
continue;
}
/* Not one of the known troublemakers, check the EDID */
list_for_each_entry(connector, &dev->mode_config.connector_list,
head) {