From 44acda2f63dcd9a192efa2737c87731d4e087eb8 Mon Sep 17 00:00:00 2001 From: Tony Truong Date: Tue, 27 Oct 2020 20:24:01 -0700 Subject: [PATCH] dt-bindings: arm: msm: add support for tuning PCIe EQ Master Phase Add DT entry to determine the minimum amount of time PCIe needs to remain in equalization master phase. Change-Id: I14f0e0b28dd69b8b38ac7be1cae282635ef11fe5 --- bindings/pci/pci-msm.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/bindings/pci/pci-msm.txt b/bindings/pci/pci-msm.txt index 6c6285f4e714..6f3e41eac5bc 100644 --- a/bindings/pci/pci-msm.txt +++ b/bindings/pci/pci-msm.txt @@ -290,6 +290,13 @@ interconnects: Definition: L1.2 LTR threshold value to be multipled with scale to define L1.2 latency tolerance reporting (LTR) +- qcom,eq-fmdc-t-min-phase23: + Usage: optional + Value type: + Definition: Determines minimum time (ms) to remain in equalization + master phase before checking for convergence of the + coefficients. + - qcom,slv-addr-space-size: Usage: required Value type: @@ -519,6 +526,7 @@ Example qcom,no-l1-supported; qcom,no-l1ss-supported; qcom,no-aux-clk-sync; + qcom,eq-fmdc-t-min-phase23 = <1>; /* 1ms */ qcom,slv-addr-space-size = <0x1000000>; /* 16MB */ qcom,wr-halt-size = <0xa>; /* 1KB */ qcom,tlp-rd-size = <0x5>; /* 4KB */