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clk: ux500: Register rng clock lookups for u8500

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Signed-off-by: Ulf Hansson <[email protected]>
Acked-by: Linus Walleij <[email protected]>
Signed-off-by: Mike Turquette <[email protected]>
This commit is contained in:
Ulf Hansson 2012-10-31 14:40:52 +01:00 • committed by Mike Turquette
commit 44d6453a87
1 changed files with 2 additions and 1 deletions
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3
drivers/clk/ux500/u8500_clk.c
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@ -378,6 +378,7 @@ void u8500_clk_init(void)
clk = clk_reg_prcc_pclk("p6_pclk0", "per6clk", U8500_CLKRST6_BASE,
BIT(0), 0);
clk_register_clkdev(clk, "apb_pclk", "rng");
clk = clk_reg_prcc_pclk("p6_pclk1", "per6clk", U8500_CLKRST6_BASE,
BIT(1), 0);
@ -518,5 +519,5 @@ void u8500_clk_init(void)
/* Periph6 */
clk = clk_reg_prcc_kclk("p3_rng_kclk", "rngclk",
U8500_CLKRST6_BASE, BIT(0), CLK_SET_RATE_GATE);
clk_register_clkdev(clk, NULL, "rng");
}