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dt-bindings: media: add dt bindings for sde rotator
This change adds required device tree bindings for sde offline rotator. Change-Id: I3a60e7262266fef9014e924143bf655482cbb6f0
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237
bindings/media/video/msm-sde-rotator.txt
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237
bindings/media/video/msm-sde-rotator.txt
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SDE Rotator
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SDE rotator is a v4l2 rotator driver, which manages the rotator hw
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block inside the Snapdragon Display Engine (or Mobile Display Subsystem)
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Required properties
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- compatible: Must be "qcom,sde-rotator".
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- reg: offset and length of the register set for the device.
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- reg-names: names to refer to register sets related to this device
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- interrupt-parent: phandle for the interrupt controller that
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services interrupts for this device.
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- interrupts: Interrupt associated with rotator.
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- <name>-supply: Phandle for <name> regulator device node.
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- qcom,supply-names: names to refer to regulator device node.
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- clocks: List of Phandles for clock device nodes
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needed by the device.
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- clock-names: List of clock names needed by the device.
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- #list-cells: Number of rotator cells, must be 1
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Bus Scaling Data:
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- qcom,msm-bus,name: String property describing rotator client.
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- qcom,msm-bus,num-cases: This is the the number of Bus Scaling use cases
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defined in the vectors property. This must be
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set to <3> for rotator driver where use-case 0 is
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used to take off rotator BW votes from the system.
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And use-case 1 & 2 are used in ping-pong fashion
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to generate run-time BW requests.
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- qcom,msm-bus,num-paths: This represents the number of paths in each
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Bus Scaling Usecase. This value depends on
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how many number of AXI master ports are
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dedicated to rotator for particular chipset.
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- qcom,msm-bus,vectors-KBps: * A series of 4 cell properties, with a format
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of (src, dst, ab, ib) which is defined at
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Documentation/devicetree/bindings/arm/msm/msm_bus.txt
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* Current values of src & dst are defined at
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include/linux/msm-bus-board.h
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src values allowed for rotator are:
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25 = MSM_BUS_MASTER_ROTATOR
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dst values allowed for rotator are:
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512 = MSM_BUS_SLAVE_EBI_CH0
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ab: Represents aggregated bandwidth.
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ib: Represents instantaneous bandwidth.
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* Total number of 4 cell properties will be
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(number of use-cases * number of paths).
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* These values will be overridden by the driver
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based on the run-time requirements. So initial
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ab and ib values defined here are random and
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bare no logic except for the use-case 0 where ab
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and ib values needs to be 0.
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* Define realtime vector properties followed by
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non-realtime vector properties.
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Optional properties
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- qcom,rot-vbif-settings: Array with key-value pairs of constant VBIF register
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settings used to setup MDSS QoS for optimum performance.
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The key used should be offset from "rot_vbif_phys" register
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defined in reg property.
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- qcom,mdss-rot-block-size: This integer value indicates the size of a memory block
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(in pixels) to be used by the rotator. If this property
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is not specified, then a default value of 128 pixels
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would be used.
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- qcom,mdss-highest-bank-bit: This integer value indicate tile format as opposed to usual
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linear format. The value tells the GPU highest memory
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bank bit used.
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- qcom,mdss-default-ot-wr-limit: This integer value indicates maximum number of pending
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writes that can be allowed on each WR xin.
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This value can be used to reduce the pending writes
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limit and can be tuned to match performance
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requirements depending upon system state.
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Some platforms require a dynamic ot limiting in
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some cases. Setting this default ot write limit
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will enable this dynamic limiting for the write
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operations in the platforms that require these
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limits.
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- qcom,mdss-default-ot-rd-limit: This integer value indicates the default number of pending
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reads that can be allowed on each RD xin.
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Some platforms require a dynamic ot limiting in
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some cases. Setting this default ot read limit
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will enable this dynamic limiting for the read
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operations in the platforms that require these
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limits.
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- qcom,mdss-rot-vbif-qos-setting: This array is used to program vbif qos remapper register
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priority for rotator clients.
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- qcom,mdss-rot-vbif-memtype: Array of u32 vbif memory type settings for each xin port.
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- qcom,mdss-rot-cdp-setting: Integer array of size two, to indicate client driven
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prefetch is available or not. Index 0 represents
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if CDP is enabled for read and index 1, if CDP
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is enabled for write operation.
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- qcom,mdss-rot-qos-lut A 4 cell property with the format of <rd_lut_0,
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rd_lut_1, wr_lut_0, wr_lut_1> indicating the qos
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lut settings for the rotator sspp and writeback
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client.
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- qcom,mdss-rot-danger-lut A two cell property with the format of <rd_lut,
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wr_lut> indicating the danger lut settings for
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the rotator sspp and writeback client.
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- qcom,mdss-rot-safe-lut A two cell property with the format of <rd_lut,
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wr_lut> indicating the safe lut settings for the
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rotator sspp and writeback client.
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- qcom,mdss-inline-rot-qos-lut: A 4 cell property with the format of <rd_lut_0,
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rd_lut_1, wr_lut_0, wr_lut_1> indicating the qos
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lut settings for the inline rotator sspp and
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writeback client.
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- qcom,mdss-inline-rot-danger-lut: A two cell property with the format of
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<rd_lut, wr_lut> indicating the danger lut
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settings for the inline rotator sspp and
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writeback client.
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- qcom,mdss-inline-rot-safe-lut: A two cell property with the format of
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<rd_lut, wr_lut> indicating the safe lut
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settings for the inline rotator sspp and
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writeback client.
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- qcom,mdss-rot-qos-cpu-mask: A u32 value indicating desired PM QoS CPU
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affine mask.
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- qcom,mdss-rot-qos-cpu-dma-latency: A u32 value indicating desired PM QoS CPU DMA
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latency in usec.
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- qcom,mdss-rot-mode: This is integer value indicates operation mode
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of the rotator device
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- qcom,mdss-sbuf-headroom: This integer value indicates stream buffer headroom in lines.
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- qcom,mdss-rot-linewidth: This integer value indicates rotator line width supported in pixels.
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- cache-slice-names: A set of names that identify the usecase names of a client that uses
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cache slice. These strings are used to look up the cache slice
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entries by name.
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- cache-slices: The tuple has phandle to llcc device as the first argument and the
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second argument is the usecase id of the client.
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- qcom,sde-ubwc-malsize: A u32 property to specify the default UBWC
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minimum allowable length configuration value.
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- qcom,sde-ubwc-swizzle: A u32 property to specify the default UBWC
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swizzle configuration value.
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- qcom,rot-reg-bus: Property to provide Bus scaling for register
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access for rotator blocks.
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- power-domains: A phandle to respective power domain node.
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- qcom,mdss-rot-parent: A 2 cell property, with format of (mdp phandle,
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instance id), of mdp device.
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- qcom,mdss-rot-xin-id: An integer array of xin-ids when nrt path for rotation
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is not available.
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Subnode properties:
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- compatible: Compatible name used in smmu v2.
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smmu_v2 names should be:
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"qcom,smmu_sde_rot_unsec"- smmu context bank device for
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unsecure rotation domain.
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"qcom,smmu_sde_rot_sec" - smmu context bank device for
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secure rotation domain.
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- iommus: specifies the SID's used by this context bank
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- gdsc-mdss-supply: Phandle for mdss supply regulator device node.
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- clocks: List of Phandles for clock device nodes
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needed by the device.
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- clock-names: List of clock names needed by the device.
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Example:
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mdss_rotator: qcom,mdss_rotator {
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compatible = "qcom,sde_rotator";
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reg = <0xfd900000 0x22100>,
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<0xfd925000 0x1000>;
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reg-names = "mdp_phys", "rot_vbif_phys";
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#list-cells = <1>;
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interrupt-parent = <&mdss_mdp>;
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interrupts = <2 0>;
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power-domains = <&mdss_mdp>;
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qcom,mdss-mdp-reg-offset = <0x00001000>;
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rot-vdd-supply = <&gdsc_mdss>;
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qcom,supply-names = "rot-vdd";
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clocks = <&clock_mmss clk_mmss_mdss_ahb_clk>,
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<&clock_mmss clk_mmss_mdss_rot_clk>;
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clock-names = "iface_clk", "rot_core_clk";
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qcom,mdss-highest-bank-bit = <0x2>;
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qcom,sde-ubwc-malsize = <0>;
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qcom,sde-ubwc-swizzle = <1>;
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/* Bus Scale Settings */
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qcom,msm-bus,name = "mdss_rotator";
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qcom,msm-bus,num-cases = <3>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<25 512 0 0>,
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<25 512 0 6400000>,
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<25 512 0 6400000>;
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/* VBIF QoS remapper settings*/
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qcom,mdss-rot-vbif-qos-setting = <1 1 1 1>;
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qcom,mdss-rot-vbif-memtype = <3 3>;
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com,mdss-rot-cdp-setting = <1 1>;
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qcom,mdss-default-ot-rd-limit = <8>;
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qcom,mdss-default-ot-wr-limit = <16>;
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qcom,mdss-rot-qos-lut = <0x0 0x0 0x0 0x0>;
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qcom,mdss-rot-danger-lut = <0x0 0x0>;
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qcom,mdss-rot-safe-lut = <0x0000ffff 0x0>;
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qcom,mdss-rot-qos-cpu-mask = <0xf>;
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qcom,mdss-rot-qos-cpu-dma-latency = <75>;
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qcom,mdss-inline-rot-qos-lut = <0x0 0x0 0x00112233 0x44556677>;
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qcom,mdss-inline-rot-danger-lut = <0x0 0x0000ffff>;
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qcom,mdss-inline-rot-safe-lut = <0x0 0x0000ff00>;
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qcom,mdss-sbuf-headroom = <20>;
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cache-slice-names = "rotator";
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cache-slices = <&llcc 4>;
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rot_reg: qcom,rot-reg-bus {
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qcom,msm-bus,name = "mdss_rot_reg";
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qcom,msm-bus,num-cases = <2>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,active-only;
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qcom,msm-bus,vectors-KBps =
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<1 590 0 0>,
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<1 590 0 76800>;
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};
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smmu_rot_unsec: qcom,smmu_rot_unsec_cb {
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compatible = "qcom,smmu_sde_rot_unsec";
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iommus = <&mdp_smmu 0xe00>;
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gdsc-mdss-supply = <&gdsc_bimc_smmu>;
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clocks = <&clock_mmss clk_bimc_smmu_ahb_clk>,
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<&clock_mmss clk_bimc_smmu_axi_clk>;
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clock-names = "rot_ahb_clk", "rot_axi_clk";
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};
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smmu_sde_rot_sec: qcom,smmu_sde_rot_sec_cb {
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compatible = "qcom,smmu_sde_rot_sec";
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iommus = <&mmss_smmu 0xe01>;
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gdsc-mdss-supply = <&gdsc_bimc_smmu>;
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clocks = <&clock_mmss clk_bimc_smmu_ahb_clk>,
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<&clock_mmss clk_bimc_smmu_axi_clk>;
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clock-names = "rot_ahb_clk", "rot_axi_clk";
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};
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};
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