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disp: msm: sde: correct the highest bank bit configuration.

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Highest bank bit property is read from device-tree, else set
to default value based on DDR type.

Change-Id: I8b31d957e29071b599a7f983cbf8300e293e9e36
Signed-off-by: Prashant Singh <prasin@codeaurora.org>
This commit is contained in:
Prashant Singh 2019-07-16 19:30:07 +05:30
commit 45f02bb102
1 changed files with 12 additions and 8 deletions
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20
msm/sde/sde_hw_catalog.c
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@ -41,8 +41,11 @@
/* max mixer blend stages */
#define DEFAULT_SDE_MIXER_BLENDSTAGES 7
/* max bank bit for macro tile and ubwc format */
#define DEFAULT_SDE_HIGHEST_BANK_BIT 15
/*
* max bank bit for macro tile and ubwc format.
* this value is left shifted and written to register
*/
#define DEFAULT_SDE_HIGHEST_BANK_BIT 0x02
/* default ubwc version */
#define DEFAULT_SDE_UBWC_VERSION SDE_HW_UBWC_VER_10
@ -3071,19 +3074,20 @@ static int _sde_parse_prop_check(struct sde_mdss_cfg *cfg,
if (!prop_exists[WB_LINEWIDTH])
cfg->max_wb_linewidth = DEFAULT_SDE_LINE_WIDTH;
cfg->ubwc_version = SDE_HW_UBWC_VER(PROP_VALUE_ACCESS(prop_value,
UBWC_VERSION, 0));
if (!prop_exists[UBWC_VERSION])
cfg->ubwc_version = DEFAULT_SDE_UBWC_VERSION;
cfg->mdp[0].highest_bank_bit = PROP_VALUE_ACCESS(prop_value,
BANK_BIT, 0);
if (!prop_exists[BANK_BIT])
cfg->mdp[0].highest_bank_bit = DEFAULT_SDE_HIGHEST_BANK_BIT;
if (of_fdt_get_ddrtype() == LP_DDR4_TYPE)
if (cfg->ubwc_version == SDE_HW_UBWC_VER_40 &&
of_fdt_get_ddrtype() == LP_DDR4_TYPE)
cfg->mdp[0].highest_bank_bit = 0x02;
cfg->ubwc_version = SDE_HW_UBWC_VER(PROP_VALUE_ACCESS(prop_value,
UBWC_VERSION, 0));
if (!prop_exists[UBWC_VERSION])
cfg->ubwc_version = DEFAULT_SDE_UBWC_VERSION;
cfg->macrotile_mode = PROP_VALUE_ACCESS(prop_value, MACROTILE_MODE, 0);
if (!prop_exists[MACROTILE_MODE])
cfg->macrotile_mode = DEFAULT_SDE_UBWC_MACROTILE_MODE;