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ARM: dts: msm: Disable SDCC TPDMs on shima
Disable all SDCC TPDMs on shima first since there is SDCC internal clock issue. Change-Id: Iac18333769fa593a407b10eeed830e728d475c1a
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1 changed files with 3 additions and 0 deletions
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@ -1210,6 +1210,7 @@
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reg-names = "tpdm-base";
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qcom,cmb-msr-skip;
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status = "disabled";
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coresight-name = "coresight-tpdm-sdcc-4";
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clocks = <&aopcc QDSS_CLK>;
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@ -1372,6 +1373,7 @@
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reg-names = "tpdm-base";
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qcom,cmb-msr-skip;
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status = "disabled";
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coresight-name = "coresight-tpdm-sdcc-1";
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clocks = <&aopcc QDSS_CLK>;
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@ -1394,6 +1396,7 @@
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reg-names = "tpdm-base";
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qcom,cmb-msr-skip;
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status = "disabled";
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coresight-name = "coresight-tpdm-sdcc-2";
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clocks = <&aopcc QDSS_CLK>;
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