mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-30 11:41:38 -04:00
ssb: implement spurious tone avoidance
And make use of it in b43. This fixes a regression introduced with
49d55cef5b
b43: N-PHY: implement spurious tone avoidance
This commit made BCM4322 use only MCS 0 on channel 13, which of course
resulted in performance drop (down to 0.7Mb/s).
Reported-by: Stefan Brüns <[email protected]>
Signed-off-by: Rafał Miłecki <[email protected]>
Cc: Stable <[email protected]>
Signed-off-by: John W. Linville <[email protected]>
This commit is contained in:
parent
25b5632fb3
commit
46fc4c9093
3 changed files with 33 additions and 1 deletions
|
|
@ -675,3 +675,32 @@ u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc)
|
|||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
void ssb_pmu_spuravoid_pllupdate(struct ssb_chipcommon *cc, int spuravoid)
|
||||
{
|
||||
u32 pmu_ctl = 0;
|
||||
|
||||
switch (cc->dev->bus->chip_id) {
|
||||
case 0x4322:
|
||||
ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100070);
|
||||
ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x1014140a);
|
||||
ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888854);
|
||||
if (spuravoid == 1)
|
||||
ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05201828);
|
||||
else
|
||||
ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05001828);
|
||||
pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
|
||||
break;
|
||||
case 43222:
|
||||
/* TODO: BCM43222 requires updating PLLs too */
|
||||
return;
|
||||
default:
|
||||
ssb_printk(KERN_ERR PFX
|
||||
"Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n",
|
||||
cc->dev->bus->chip_id);
|
||||
return;
|
||||
}
|
||||
|
||||
chipco_set32(cc, SSB_CHIPCO_PMU_CTL, pmu_ctl);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ssb_pmu_spuravoid_pllupdate);
|
||||
|
|
|
|||
Loading…
Reference in a new issue