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Merge "ARM: dts: msm: Add device trees for sdxlemur M.2, Pine variants"

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qctecmdr 2021-06-23 22:48:57 -07:00 • committed by Gerrit - the friendly Code Review server
commit 4769502534
11 changed files with 121 additions and 0 deletions
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5
qcom/Makefile
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@ -409,14 +409,19 @@ dtb-$(CONFIG_ARCH_SDXLEMUR) += sdxlemur-rumi.dtb \
sdxlemur-mtp.dtb \
sdxlemur-mtp-mbb.dtb \
sdxlemur-mtp-cpe.dtb \
sdxlemur-mtp-cpe-pine1x.dtb \
sdxlemur-mtp-cpe-pine2x.dtb \
sdxlemur-mtp-mbb-emmc.dtb \
sdxlemur-mtp-mbb-emmc-512mb.dtb \
sdxlemur-mtp-mbb-ntn3-pcie.dtb \
sdxlemur-mtp-mbb-pcie-ep.dtb \
sdxlemur-mtp-mbb-pcie-rc-ep.dtb \
sdxlemur-mtp-mbb-m2-ep.dtb \
sdxlemur-mtp-mbb.dtb \
sdxlemur-rcm-pcie-ep.dtb \
sdxlemur-rcm-rc.dtb \
sdxlemur-rcm-rc-pine1x.dtb \
sdxlemur-rcm-rc-pine2x.dtb \
sdxlemur-v2-cdp.dtb \
sdxlemur-v2-mtp-mbb.dtb \
sdxlemur-v2-mtp-cpe.dtb \

13
qcom/sdxlemur-mtp-cpe-pine1x.dts Normal file
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@ -0,0 +1,13 @@
/dts-v1/;
#include "sdxlemur.dtsi"
#include "sdxlemur-mtp-cpe.dtsi"
#include "sdxlemur-mtp-cpe-pine1x.dtsi"
#include "sdxlemur-1024mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR MTP CPE 1x Pine";
compatible = "qcom,sdxlemur-mtp",
"qcom,sdxlemur", "qcom,mtp";
qcom,board-id = <0x9010008 0x309>;
};

4
qcom/sdxlemur-mtp-cpe-pine1x.dtsi Normal file
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@ -0,0 +1,4 @@
&soc {
};

13
qcom/sdxlemur-mtp-cpe-pine2x.dts Normal file
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@ -0,0 +1,13 @@
/dts-v1/;
#include "sdxlemur.dtsi"
#include "sdxlemur-mtp-cpe.dtsi"
#include "sdxlemur-mtp-cpe-pine2x.dtsi"
#include "sdxlemur-1024mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR MTP CPE 2x Pine";
compatible = "qcom,sdxlemur-mtp",
"qcom,sdxlemur", "qcom,mtp";
qcom,board-id = <0xA010008 0x30A>;
};

4
qcom/sdxlemur-mtp-cpe-pine2x.dtsi Normal file
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@ -0,0 +1,4 @@
&soc {
};

13
qcom/sdxlemur-mtp-mbb-m2-ep.dts Normal file
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@ -0,0 +1,13 @@
/dts-v1/;
#include "sdxlemur.dtsi"
#include "sdxlemur-mtp-mbb-pcie-ep.dtsi"
#include "sdxlemur-mtp-mbb-m2-ep.dtsi"
#include "sdxlemur-1024mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR MTP MBB M2 EP";
compatible = "qcom,sdxlemur-mtp",
"qcom,sdxlemur", "qcom,mtp";
qcom,board-id = <0x8010008 0x308>;
};

35
qcom/sdxlemur-mtp-mbb-m2-ep.dtsi Normal file
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@ -0,0 +1,35 @@
&soc {
};
&sdhc_1 {
reg = <0x08804000 0x1000>, <0x08805000 0x1000>;
reg-names = "hc_mem", "cqhci_mem";
mmc-ddr-1_8v;
mmc-hs200-1_8v;
bus-width = <8>;
non-removable;
supports-cqe;
vdd-supply = <&vreg_sd_vdd>;
qcom,vdd-voltage-level = <2950000 2950000>;
qcom,vdd-current-level = <0 570000>;
vdd-io-supply = <&L6B>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <0 200000>;
qcom,devfreq,freq-table = <50000000 192000000>;
qcom,scaling-lower-bus-speed-mode = "DDR52";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_on>;
pinctrl-1 = <&sdc1_off>;
status = "ok"
};

13
qcom/sdxlemur-rcm-rc-pine1x.dts Normal file
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@ -0,0 +1,13 @@
/dts-v1/;
#include "sdxlemur.dtsi"
#include "sdxlemur-rcm-rc.dtsi"
#include "sdxlemur-rcm-rc-pine1x.dtsi"
#include "sdxlemur-1024mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR RCM Root Complex 1x Pine";
compatible = "qcom,sdxlemur-rcm",
"qcom,sdxlemur", "qcom,rcm";
qcom,board-id = <0x2010015 0x302>;
};

4
qcom/sdxlemur-rcm-rc-pine1x.dtsi Normal file
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@ -0,0 +1,4 @@
&soc {
};

13
qcom/sdxlemur-rcm-rc-pine2x.dts Normal file
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@ -0,0 +1,13 @@
/dts-v1/;
#include "sdxlemur.dtsi"
#include "sdxlemur-rcm-rc.dtsi"
#include "sdxlemur-rcm-rc-pine2x.dtsi"
#include "sdxlemur-1024mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR RCM Root Complex 2x Pine";
compatible = "qcom,sdxlemur-rcm",
"qcom,sdxlemur", "qcom,rcm";
qcom,board-id = <0x3010015 0x303>;
};

4
qcom/sdxlemur-rcm-rc-pine2x.dtsi Normal file
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@ -0,0 +1,4 @@
&soc {
};