From 47746944f2ed04a91da3c56ac566afd140108b95 Mon Sep 17 00:00:00 2001
From: gongsc1 <gongsc1@motorola.com>
Date: Mon, 13 Sep 2021 19:12:01 +0800
Subject: [PATCH] arm64/dts: add rt9467 dtsi

add rt9467 dtsi
from vendor.

Change-Id: I66a775526dc629484d9061bb8326c6062169ffd5
Reviewed-on: https://gerrit.mot.com/2065157
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Reviewed-by: Huosheng Liao <liaohs@motorola.com>
Submit-Approved: Jira Key
---
 qcom/blair-nopmi-milanf-common-overlay.dtsi | 42 +++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/qcom/blair-nopmi-milanf-common-overlay.dtsi b/qcom/blair-nopmi-milanf-common-overlay.dtsi
index 55dcb78ebf57..4c1e7b26ff02 100644
--- a/qcom/blair-nopmi-milanf-common-overlay.dtsi
+++ b/qcom/blair-nopmi-milanf-common-overlay.dtsi
@@ -123,4 +123,46 @@
 		temp_t0_thres_plus_x_degree = <2>;
 		temp_neg_10_thres = <0>;
 	};
+
+	rt9467@5b {
+		compatible = "richtek,rt9467";
+		reg = <0x5b>;
+		status = "okay";
+		interrupts-extended = <&tlmm 12 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&rt9467_int>;
+		interrupt-names = "wdtmri", "chg_mivr", "chg_aiclmeasi",
+			"attachi", "detachi", "pwr_rdy", "chg_statci";
+		charger_name = "rt9467";
+		regmap_name = "rt9467_primary";
+		regmap_represent_slave_addr = <0x5b>;
+		ichg = <2000000>;	/* uA */
+		aicr = <500000>;	/* uA */
+		mivr = <4400000>;	/* uV */
+		cv = <4350000>;		/* uV */
+		ieoc = <250000>;	/* uA */
+		safety_timer = <12>;	/* hour */
+		ircmp_resistor = <25000>;	/* uohm */
+		ircmp_vclamp = <32000>;		/* uV */
+		en_te;
+		en_wdt;
+		en_chgdet;
+		/* en_jeita; */
+		/* en_irq_pulse; */
+	};
+};
+
+&tlmm {
+	rt9467_int: rt9467_int {
+		mux {
+			pins = "gpio12";
+			function = "gpio";
+		};
+
+		config {
+			pins = "gpio12";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+	};
 };