From 0024bf5dedc0d2a01d74c0c987a87f25ed227047 Mon Sep 17 00:00:00 2001 From: Manikandan Mohan Date: Thu, 22 Oct 2020 13:51:20 -0700 Subject: [PATCH] cnss2: Control ADSP power collapse based on WLAN state Disable ADSP power collapse during WLAN ON as during RTPM suspended state QMI stats collection takes more time due to PCI link up/down operations and ADSP dependencies. Change-Id: I8ba5fd1cf531f72792d505f2a6617224bfdebff8 Signed-off-by: Manikandan Mohan --- drivers/net/wireless/cnss2/pci.c | 39 ++++++++++++++++++++++++++++++-- 1 file changed, 37 insertions(+), 2 deletions(-) diff --git a/drivers/net/wireless/cnss2/pci.c b/drivers/net/wireless/cnss2/pci.c index 032fae3951ee..500b2989c9b6 100644 --- a/drivers/net/wireless/cnss2/pci.c +++ b/drivers/net/wireless/cnss2/pci.c @@ -740,7 +740,6 @@ static int cnss_set_pci_link(struct cnss_pci_data *pci_priv, bool link_up) if (pci_priv->drv_connected_last) { cnss_pr_vdbg("Use PCIe DRV suspend\n"); pm_ops = MSM_PCIE_DRV_SUSPEND; - pm_options |= MSM_PCIE_CONFIG_NO_DRV_PC; if (pci_priv->device_id != QCA6390_DEVICE_ID && pci_priv->device_id != QCA6490_DEVICE_ID) cnss_set_pci_link_status(pci_priv, PCI_GEN1); @@ -1410,6 +1409,40 @@ out: return ret; } +/** + * cnss_wlan_adsp_pc_enable: Control ADSP power collapse setup + * @dev: Platform driver pci private data structure + * @control: Power collapse enable / disable + * + * This function controls ADSP power collapse (PC). It must be called + * based on wlan state. ADSP power collapse during wlan RTPM suspend state + * results in delay during periodic QMI stats PCI link up/down. This delay + * causes additional power consumption. + * Introduced in SM8350. + * + * Result: 0 Success. negative error codes. + */ +static int cnss_wlan_adsp_pc_enable(struct cnss_pci_data *pci_priv, + bool control) +{ + struct pci_dev *pci_dev = pci_priv->pci_dev; + int ret = 0; + u32 pm_options = PM_OPTIONS_DEFAULT; + + if (control) + pm_options &= ~MSM_PCIE_CONFIG_NO_DRV_PC; + else + pm_options |= MSM_PCIE_CONFIG_NO_DRV_PC; + + ret = msm_pcie_pm_control(MSM_PCIE_DRV_PC_CTRL, pci_dev->bus->number, + pci_dev, NULL, pm_options); + if (ret) + return ret; + + cnss_pr_dbg("%s ADSP power collapse\n", control ? "Enable" : "Disable"); + return 0; +} + int cnss_pci_start_mhi(struct cnss_pci_data *pci_priv) { int ret = 0; @@ -1439,6 +1472,8 @@ int cnss_pci_start_mhi(struct cnss_pci_data *pci_priv) } ret = cnss_pci_set_mhi_state(pci_priv, CNSS_MHI_POWER_ON); + if (ret == 0) + cnss_wlan_adsp_pc_enable(pci_priv, false); if (cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01) pci_priv->mhi_ctrl->timeout_ms = timeout; @@ -1463,7 +1498,7 @@ static void cnss_pci_power_off_mhi(struct cnss_pci_data *pci_priv) cnss_pr_dbg("MHI is already powered off\n"); return; } - + cnss_wlan_adsp_pc_enable(pci_priv, true); cnss_pci_set_mhi_state_bit(pci_priv, CNSS_MHI_RESUME); cnss_pci_set_mhi_state_bit(pci_priv, CNSS_MHI_POWERING_OFF);