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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge "usb: dwc3: core: Select UTMI clock before core_soft_reset"
This commit is contained in:
commit
47d8e027d9
3 changed files with 29 additions and 37 deletions
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@ -1120,8 +1120,6 @@ int dwc3_core_init(struct dwc3 *dwc)
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dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);
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}
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dwc3_notify_event(dwc, DWC3_CONTROLLER_POST_RESET_EVENT, 0);
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return 0;
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err3:
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@ -1695,7 +1695,6 @@ static inline void dwc3_ulpi_exit(struct dwc3 *dwc)
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enum dwc3_notify_event {
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DWC3_CONTROLLER_ERROR_EVENT,
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DWC3_CONTROLLER_RESET_EVENT,
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DWC3_CONTROLLER_POST_RESET_EVENT,
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DWC3_CORE_PM_SUSPEND_EVENT,
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DWC3_CORE_PM_RESUME_EVENT,
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DWC3_CONTROLLER_CONNDONE_EVENT,
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@ -2339,40 +2339,6 @@ static void dwc3_msm_notify_event(struct dwc3 *dwc,
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if (dwc->retries_on_error < MAX_ERROR_RECOVERY_TRIES)
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schedule_work(&mdwc->restart_usb_work);
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break;
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case DWC3_CONTROLLER_POST_RESET_EVENT:
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dev_dbg(mdwc->dev,
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"DWC3_CONTROLLER_POST_RESET_EVENT received\n");
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/*
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* Below sequence is used when controller is working without
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* having ssphy and only USB high/full speed is supported.
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*/
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if (dwc->maximum_speed == USB_SPEED_HIGH ||
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dwc->maximum_speed == USB_SPEED_FULL) {
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dwc3_msm_write_reg(mdwc->base, QSCRATCH_GENERAL_CFG,
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dwc3_msm_read_reg(mdwc->base,
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QSCRATCH_GENERAL_CFG)
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| PIPE_UTMI_CLK_DIS);
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usleep_range(2, 5);
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dwc3_msm_write_reg(mdwc->base, QSCRATCH_GENERAL_CFG,
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dwc3_msm_read_reg(mdwc->base,
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QSCRATCH_GENERAL_CFG)
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| PIPE_UTMI_CLK_SEL
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| PIPE3_PHYSTATUS_SW);
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usleep_range(2, 5);
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dwc3_msm_write_reg(mdwc->base, QSCRATCH_GENERAL_CFG,
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dwc3_msm_read_reg(mdwc->base,
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QSCRATCH_GENERAL_CFG)
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& ~PIPE_UTMI_CLK_DIS);
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}
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dwc->tx_fifo_size = mdwc->tx_fifo_size;
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break;
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case DWC3_CONTROLLER_CONNDONE_EVENT:
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dev_dbg(mdwc->dev, "DWC3_CONTROLLER_CONNDONE_EVENT received\n");
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/*
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@ -2588,6 +2554,35 @@ static void dwc3_msm_power_collapse_por(struct dwc3_msm *mdwc)
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clk_disable_unprepare(mdwc->cfg_ahb_clk);
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}
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/*
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* Below sequence is used when controller is working without
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* having ssphy and only USB high/full speed is supported.
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*/
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if (dwc->maximum_speed == USB_SPEED_HIGH ||
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dwc->maximum_speed == USB_SPEED_FULL) {
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dwc3_msm_write_reg(mdwc->base, QSCRATCH_GENERAL_CFG,
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dwc3_msm_read_reg(mdwc->base,
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QSCRATCH_GENERAL_CFG)
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| PIPE_UTMI_CLK_DIS);
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usleep_range(2, 5);
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dwc3_msm_write_reg(mdwc->base, QSCRATCH_GENERAL_CFG,
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dwc3_msm_read_reg(mdwc->base,
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QSCRATCH_GENERAL_CFG)
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| PIPE_UTMI_CLK_SEL
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| PIPE3_PHYSTATUS_SW);
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usleep_range(2, 5);
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dwc3_msm_write_reg(mdwc->base, QSCRATCH_GENERAL_CFG,
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dwc3_msm_read_reg(mdwc->base,
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QSCRATCH_GENERAL_CFG)
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& ~PIPE_UTMI_CLK_DIS);
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}
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dwc->tx_fifo_size = mdwc->tx_fifo_size;
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ret = dwc3_core_init(dwc);
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if (ret)
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dev_err(mdwc->dev, "%s: dwc3_core init failed (%d)\n",
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