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ARM: dts: msm: Update Graphics clock controller node for HOLI

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Update to define the regulator/clocks phandle for GPUCC and also update
the GDSC to use the regulator gdsc driver.

Change-Id: I8171169c29adeb3a774509ed3a651495ca477c12
This commit is contained in:
Taniya Das 2020-06-07 16:12:22 +05:30 • committed by Gerrit - the friendly Code Review server
commit 484a609b23
2 changed files with 15 additions and 7 deletions
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4
qcom/holi-gdsc.dtsi
View file

@ -98,7 +98,7 @@
};
gpu_cx_gdsc: qcom,gdsc@599106c {
compatible = "regulator-fixed";
compatible = "qcom,gdsc";
reg = <0x599106c 0x4>;
regulator-name = "gpu_cx_gdsc";
hw-ctrl-addr = <&gpu_cx_hw_ctrl>;
@ -109,7 +109,7 @@
};
gpu_gx_gdsc: qcom,gdsc@599100c {
compatible = "regulator-fixed";
compatible = "qcom,gdsc";
reg = <0x599100c 0x4>;
regulator-name = "gpu_gx_gdsc";
sw-reset = <&gpu_gx_sw_reset>;

18
qcom/holi.dtsi
View file

@ -633,8 +633,18 @@
};
gpucc: qcom,gpucc@5990000 {
compatible = "qcom,dummycc";
clock-output-names = "gpucc_clocks";
compatible = "qcom,holi-gpucc";
reg = <0x5990000 0x9000>;
reg-names = "cc_base";
vdd_cx-supply = <&VDD_CX_LEVEL>;
vdd_mx-supply = <&VDD_MX_LEVEL>;
vdd_gx-supply = <&VDD_GFX_LEVEL>;
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GCC_GPU_GPLL0_CLK_SRC>,
<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>,
<&gcc GCC_GPU_SNOC_DVM_GFX_CLK>;
clock-names = "bi_tcxo", "gcc_gpu_gpll0_clk_src",
"gcc_gpu_gpll0_div_clk_src",
"gcc_gpu_snoc_dvm_gfx_clk";
#clock-cells = <1>;
#reset-cells = <1>;
};
@ -1458,12 +1468,10 @@
&gpu_cx_gdsc {
parent-supply = <&VDD_CX_LEVEL>;
vdd_parent-supply = <&VDD_CX_LEVEL>;
status = "ok"
};
&gpu_gx_gdsc {
parent-supply = <&VDD_CX_LEVEL>;
vdd_parent-supply = <&VDD_CX_LEVEL>;
parent-supply = <&VDD_GFX_LEVEL>;
status = "ok"
};