diff --git a/bindings/clock/qcom,debugcc.txt b/bindings/clock/qcom,debugcc.txt
index 3b898dc10040..2b46f69dacf9 100644
--- a/bindings/clock/qcom,debugcc.txt
+++ b/bindings/clock/qcom,debugcc.txt
@@ -16,6 +16,7 @@ Required properties :
 			"qcom,monaco-debugcc"
 			"qcom,direwolf-debugcc"
 			"qcom,blair-debugcc"
+			"qcom,scuba-debugcc"
 
 - qcom,gcc: phandle to the GCC device node.
 - qcom,videocc: phandle to the Video CC device node.
diff --git a/bindings/clock/qcom,dispcc.txt b/bindings/clock/qcom,dispcc.txt
index c1ee76347304..4cf54ffff090 100644
--- a/bindings/clock/qcom,dispcc.txt
+++ b/bindings/clock/qcom,dispcc.txt
@@ -18,6 +18,7 @@ Required properties :
 			"qcom,sa6155-dispcc"
 			"qcom,monaco-dispcc"
 			"qcom,blair-dispcc"
+			"qcom,scuba-dispcc"
 
 - reg : shall contain base register location and length.
 - #clock-cells : from common clock binding, shall contain 1.
diff --git a/bindings/clock/qcom,gcc.txt b/bindings/clock/qcom,gcc.txt
index b0919e3137e0..9f64f68d09a0 100644
--- a/bindings/clock/qcom,gcc.txt
+++ b/bindings/clock/qcom,gcc.txt
@@ -40,6 +40,7 @@ Required properties :
 			"qcom,monaco-gcc"
 			"qcom,direwolf-gcc"
 			"qcom,blair-gcc"
+			"qcom,scuba-gcc"
 
 - reg : shall contain base register location and length
 - vdd_cx-supply: The vdd_cx logic rail supply.
diff --git a/bindings/clock/qcom,gpucc.txt b/bindings/clock/qcom,gpucc.txt
index 03535db55849..5428d95f6bf8 100644
--- a/bindings/clock/qcom,gpucc.txt
+++ b/bindings/clock/qcom,gpucc.txt
@@ -14,6 +14,7 @@ Required properties :
 		"qcom,sa6155-gpucc".
 		"qcom,monaco-gpucc"
 		"qcom,blair-gpucc"
+		"qcom,scuba-gpucc"
 
 - reg: shall contain base register offset and size.
 - reg-names: names of registers listed in the same order as in the reg property.
diff --git a/bindings/clock/qcom,rpmcc.txt b/bindings/clock/qcom,rpmcc.txt
index 4799e44a087e..b85e846a53b2 100644
--- a/bindings/clock/qcom,rpmcc.txt
+++ b/bindings/clock/qcom,rpmcc.txt
@@ -21,6 +21,7 @@ Required properties :
 			"qcom,rpmcc-holi", "qcom,rpmcc"
 			"qcom,rpmcc-sdxnightjar", "qcom,rpmcc"
 			"qcom,rpmcc-monaco", "qcom,rpmcc"
+			"qcom,rpmcc-scuba", "qcom,rpmcc"
 
 - #clock-cells : shall contain 1
 
diff --git a/bindings/interconnect/qcom,qrb2210-rb1.txt b/bindings/interconnect/qcom,qrb2210-rb1.txt
new file mode 100644
index 000000000000..2ffb5a2cb5f0
--- /dev/null
+++ b/bindings/interconnect/qcom,qrb2210-rb1.txt
@@ -0,0 +1,46 @@
+QTI SCUBA Network-On-Chip interconnect driver binding
+-----------------------------------------------------------
+
+Required properties :
+- compatible : shall contain only one of the following:
+			"qcom,scuba-bimc",
+			"qcom,scuba-system_noc",
+			"qcom,scuba-config_noc",
+			"qcom,scuba-clk_virt",
+			"qcom,scuba-mmnrt_virt",
+			"qcom,scuba-mmrt_virt",
+- #interconnect-cells : should contain 1
+
+reg : specifies the physical base address and size of registers
+clocks : list of phandles and specifiers to all interconnect bus clocks
+clock-names : clock names should include both "bus" and "bus_a"
+
+The following are optional properties:
+
+qcom,util-factor : Parameter that represents the DDR utilization factor
+		to be used in aggregation scheme. It is represented as
+		actual util-factor * 100.
+
+Examples:
+
+soc {
+	...
+	system_noc: interconnect@1880000 {
+		reg = <0x1880000 0x60200>;
+		compatible = "qcom,scuba-system_noc";
+		qcom,util-factor = <142>;
+		#interconnect-cells = <1>;
+		clock-names = "bus", "bus_a";
+		clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
+			<&rpmcc RPM_SMD_SNOC_A_CLK>;
+	};
+
+	config_noc: interconnect@1900000 {
+		reg = <0x1900000 0x8200>;
+		compatible = "qcom,scuba-config_noc";
+		#interconnect-cells = <1>;
+		clock-names = "bus", "bus_a";
+		clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
+			<&rpmcc RPM_SMD_CNOC_A_CLK>;
+	};
+};