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Merge "iommu/arm-smmu: Use existing facilities for I/O Coherent PTWs"

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This commit is contained in:
qctecmdr 2019-10-24 17:59:47 -07:00 • committed by Gerrit - the friendly Code Review server
commit 498f4708ad
3 changed files with 10 additions and 16 deletions
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4
drivers/iommu/arm-smmu.c
View file

@ -1765,8 +1765,6 @@ static void arm_smmu_domain_get_qcom_quirks(struct arm_smmu_domain *smmu_domain,
{
if (smmu_domain->attributes & (1ULL << DOMAIN_ATTR_USE_UPSTREAM_HINT))
*quirks |= IO_PGTABLE_QUIRK_QCOM_USE_UPSTREAM_HINT;
if (is_iommu_pt_coherent(smmu_domain))
*quirks |= IO_PGTABLE_QUIRK_NO_DMA;
if (smmu_domain->attributes & (1ULL << DOMAIN_ATTR_USE_LLC_NWA))
*quirks |= IO_PGTABLE_QUIRK_QCOM_USE_LLC_NWA;
}
@ -1972,7 +1970,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain,
.pgsize_bitmap = smmu->pgsize_bitmap,
.ias = ias,
.oas = oas,
.coherent_walk = smmu->features & ARM_SMMU_FEAT_COHERENT_WALK,
.coherent_walk = is_iommu_pt_coherent(smmu_domain),
.tlb = &smmu_domain->flush_ops->tlb.tlb_ops,
.iommu_dev = smmu->dev,
};

18
drivers/iommu/io-pgtable-arm.c
View file

@ -298,7 +298,7 @@ static inline void pgtable_dma_sync_single_for_device(
dma_addr_t addr, size_t size,
enum dma_data_direction dir)
{
if (!(cfg->quirks & IO_PGTABLE_QUIRK_NO_DMA))
if (!cfg->coherent_walk)
dma_sync_single_for_device(cfg->iommu_dev, addr, size,
dir);
}
@ -314,7 +314,7 @@ static void *__arm_lpae_alloc_pages(size_t size, gfp_t gfp,
if (!pages)
return NULL;
if (!(cfg->quirks & IO_PGTABLE_QUIRK_NO_DMA)) {
if (!cfg->coherent_walk) {
dma = dma_map_single(dev, pages, size, DMA_TO_DEVICE);
if (dma_mapping_error(dev, dma))
goto out_free;
@ -340,7 +340,7 @@ out_free:
static void __arm_lpae_free_pages(void *pages, size_t size,
struct io_pgtable_cfg *cfg, void *cookie)
{
if (!(cfg->quirks & IO_PGTABLE_QUIRK_NO_DMA))
if (!cfg->coherent_walk)
dma_unmap_single(cfg->iommu_dev, __arm_lpae_dma_addr(pages),
size, DMA_TO_DEVICE);
io_pgtable_free_pages_exact(cfg, cookie, pages, size);
@ -358,7 +358,7 @@ static void __arm_lpae_set_pte(arm_lpae_iopte *ptep, arm_lpae_iopte pte,
{
*ptep = pte;
if (!(cfg->quirks & IO_PGTABLE_QUIRK_NO_DMA))
if (!cfg->coherent_walk)
__arm_lpae_sync_pte(ptep, cfg);
}
@ -436,8 +436,7 @@ static arm_lpae_iopte arm_lpae_install_table(arm_lpae_iopte *table,
old = cmpxchg64_relaxed(ptep, curr, new);
if ((cfg->quirks & IO_PGTABLE_QUIRK_NO_DMA) ||
(old & ARM_LPAE_PTE_SW_SYNC))
if (cfg->coherent_walk || (old & ARM_LPAE_PTE_SW_SYNC))
return old;
/* Even if it's not ours, there's no point waiting; just kick it */
@ -526,8 +525,7 @@ static int __arm_lpae_map(struct arm_lpae_io_pgtable *data, unsigned long iova,
pte = arm_lpae_install_table(cptep, ptep, 0, cfg, 0);
if (pte)
__arm_lpae_free_pages(cptep, tblsz, cfg, cookie);
} else if (!(cfg->quirks & IO_PGTABLE_QUIRK_NO_DMA) &&
!(pte & ARM_LPAE_PTE_SW_SYNC)) {
} else if (!cfg->coherent_walk && !(pte & ARM_LPAE_PTE_SW_SYNC)) {
__arm_lpae_sync_pte(ptep, cfg);
}
@ -1129,7 +1127,6 @@ arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie)
struct arm_lpae_io_pgtable *data;
if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_NS
| IO_PGTABLE_QUIRK_NO_DMA
| IO_PGTABLE_QUIRK_NON_STRICT
| IO_PGTABLE_QUIRK_QCOM_USE_UPSTREAM_HINT
| IO_PGTABLE_QUIRK_QCOM_USE_LLC_NWA))
@ -1140,7 +1137,7 @@ arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie)
return NULL;
/* TCR */
if (cfg->quirks & IO_PGTABLE_QUIRK_NO_DMA)
if (cfg->coherent_walk)
reg = (ARM_LPAE_TCR_SH_OS << ARM_LPAE_TCR_SH0_SHIFT) |
(ARM_LPAE_TCR_RGN_WBWA << ARM_LPAE_TCR_IRGN0_SHIFT) |
(ARM_LPAE_TCR_RGN_WBWA << ARM_LPAE_TCR_ORGN0_SHIFT);
@ -1740,7 +1737,6 @@ static int __init arm_lpae_do_selftests(void)
struct io_pgtable_cfg cfg = {
.tlb = &dummy_tlb_ops,
.oas = 48,
.quirks = IO_PGTABLE_QUIRK_NO_DMA,
.coherent_walk = true,
};

4
drivers/iommu/io-pgtable-fast.c
View file

@ -182,7 +182,7 @@ static void av8l_clean_range(struct io_pgtable_ops *ops,
{
struct io_pgtable *iop = iof_pgtable_ops_to_pgtable(ops);
if (!(iop->cfg.quirks & IO_PGTABLE_QUIRK_NO_DMA))
if (!iop->cfg.coherent_walk)
__av8l_clean_range(iop->cfg.iommu_dev, start, end);
}
@ -549,7 +549,7 @@ av8l_fast_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie)
reg = (AV8L_FAST_TCR_SH_OS << AV8L_FAST_TCR_SH0_SHIFT) |
(AV8L_FAST_TCR_RGN_NC << AV8L_FAST_TCR_IRGN0_SHIFT) |
(AV8L_FAST_TCR_RGN_WBWA << AV8L_FAST_TCR_ORGN0_SHIFT);
else if (cfg->quirks & IO_PGTABLE_QUIRK_NO_DMA)
else if (cfg->coherent_walk)
reg = (AV8L_FAST_TCR_SH_OS << AV8L_FAST_TCR_SH0_SHIFT) |
(AV8L_FAST_TCR_RGN_WBWA << AV8L_FAST_TCR_IRGN0_SHIFT) |
(AV8L_FAST_TCR_RGN_WBWA << AV8L_FAST_TCR_ORGN0_SHIFT);