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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge "ARM: dts: qcom: add audio device tree source files"
This commit is contained in:
commit
4a2e48b335
9 changed files with 1445 additions and 0 deletions
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@ -1935,6 +1935,143 @@ Example:
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qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>;
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};
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* MONACO ASoC Machine driver
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Required properties:
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- compatible : "qcom,monaco-asoc-snd".
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- qcom,model : The user-visible name of this sound card.
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- qcom,audio-routing : A list of the connections between audio components.
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- asoc-platform: This is phandle list containing the references to platform device
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nodes that are used as part of the sound card dai-links.
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- asoc-platform-names: This property contains list of platform names. The order of
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the platform names should match to that of the phandle order
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given in "asoc-platform".
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- asoc-cpu: This is phandle list containing the references to cpu dai device nodes
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that are used as part of the sound card dai-links.
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- asoc-cpu-names: This property contains list of cpu dai names. The order of the
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cpu dai names should match to that of the phandle order given
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in "asoc-cpu". The cpu names are in the form of "%s.%d" form,
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where the id (%d) field represents the back-end AFE port id that
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this CPU dai is associated with.
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- asoc-codec: This is phandle list containing the references to codec dai device
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nodes that are used as part of the sound card dai-links.
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- asoc-codec-names: This property contains list of codec dai names. The order of the
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codec dai names should match to that of the phandle order given
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in "asoc-codec".
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Optional properties:
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- qcom,msm-mi2s-master: This property is used to inform machine driver
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if MSM is the clock master of mi2s. 1 means master and 0 means slave. The
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first entry is primary mi2s; the second entry is secondary mi2s, and so on.
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- qcom,wsa-max-devs : Maximum number of WSA883x devices present in the target
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- qcom,wsa-devs : List of phandles for all possible WSA883x devices supported for the target
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- qcom,ext-disp-audio-rx: Property to specify if Audio over Display port is supported for the target
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- qcom,wcn-btfm : Property to specify if WCN BT/FM chip is used for the target
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- qcom,mi2s-audio-intf: Property to specify if MI2S interface is used for the target
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- qcom,auxpcm-audio-intf: Property to specify if Aux PCM interface is used for the target
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- qcom,cdc-dmic-gpios : phandle for Digital mic clk and data gpios.
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- qcom,msm_audio_ssr_devs: List the snd event framework clients
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- qcom,afe-rxtx-lb: AFE RX to TX loopback.
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- qcom,tlmm-gpio: TLMM gpio number for corresponding LPASS gpio
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- qcom,va-bolero-codec: Property to specify VA macro supported.
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- qcom,rxtx-bolero-codec: Property to specify RX-TX macros supported.
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- qcom,wsa-bolero-codec: Property to specify WSA macro supported.
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Example:
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monaco_snd: sound {
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status = "okay";
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compatible = "qcom,monaco-asoc-snd";
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qcom,mi2s-audio-intf = <0>;
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qcom,auxpcm-audio-intf = <0>;
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qcom,tdm-audio-intf = <0>;
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qcom,wcn-btfm = <0>;
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qcom,afe-rxtx-lb = <0>;
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asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
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<&loopback>, <&compress>, <&hostless>,
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<&afe>, <&lsm>, <&routing>, <&compr>,
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<&pcm_noirq>;
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asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
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"msm-pcm-dsp.2", "msm-voip-dsp",
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"msm-pcm-voice", "msm-pcm-loopback",
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"msm-compress-dsp", "msm-pcm-hostless",
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"msm-pcm-afe", "msm-lsm-client",
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"msm-pcm-routing", "msm-compr-dsp",
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"msm-pcm-dsp-noirq";
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asoc-cpu = <&dai_mi2s0>, <&dai_mi2s1>,
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<&dai_mi2s2>, <&dai_mi2s3>,
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<&dai_pri_auxpcm>,
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<&dai_sec_auxpcm>, <&dai_tert_auxpcm>,
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<&dai_quat_auxpcm>,
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<&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>,
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<&afe_proxy_tx>, <&incall_record_rx>,
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<&incall_record_tx>, <&incall_music_rx>,
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<&incall_music_2_rx>,
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<&proxy_rx>, <&proxy_tx>,
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<&usb_audio_rx>, <&usb_audio_tx>,
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<&sb_7_rx>, <&sb_7_tx>, <&sb_8_tx>,
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<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,
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<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>,
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<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_tx_0>,
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<&dai_quat_tdm_rx_0>, <&dai_quat_tdm_tx_0>,
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<&va_cdc_dma_0_tx>, <&va_cdc_dma_1_tx>,
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<&va_cdc_dma_2_tx>,
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<&rx_cdc_dma_0_rx>, <&tx_cdc_dma_0_tx>,
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<&rx_cdc_dma_1_rx>, <&tx_cdc_dma_1_tx>,
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<&rx_cdc_dma_2_rx>, <&tx_cdc_dma_2_tx>,
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<&rx_cdc_dma_3_rx>, <&tx_cdc_dma_3_tx>,
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<&rx_cdc_dma_4_rx>, <&tx_cdc_dma_4_tx>,
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<&rx_cdc_dma_5_rx>, <&tx_cdc_dma_5_tx>,
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<&rx_cdc_dma_6_rx>, <&rx_cdc_dma_7_rx>,
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<&afe_loopback_tx>;
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asoc-cpu-names = "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1",
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"msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
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"msm-dai-q6-auxpcm.1",
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"msm-dai-q6-auxpcm.2", "msm-dai-q6-auxpcm.3",
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"msm-dai-q6-auxpcm.4", "msm-dai-q6-dev.224",
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"msm-dai-q6-dev.225", "msm-dai-q6-dev.241",
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"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",
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"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773",
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"msm-dai-q6-dev.32770",
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"msm-dai-q6-dev.8194", "msm-dai-q6-dev.8195",
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"msm-dai-q6-dev.28672", "msm-dai-q6-dev.28673",
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"msm-dai-q6-dev.16398", "msm-dai-q6-dev.16399",
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"msm-dai-q6-dev.16401",
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"msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36865",
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"msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36881",
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"msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36897",
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"msm-dai-q6-tdm.36912", "msm-dai-q6-tdm.36913",
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"msm-dai-cdc-dma-dev.45089",
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"msm-dai-cdc-dma-dev.45091",
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"msm-dai-cdc-dma-dev.45093",
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"msm-dai-cdc-dma-dev.45104",
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"msm-dai-cdc-dma-dev.45105",
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"msm-dai-cdc-dma-dev.45106",
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"msm-dai-cdc-dma-dev.45107",
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"msm-dai-cdc-dma-dev.45108",
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"msm-dai-cdc-dma-dev.45109",
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"msm-dai-cdc-dma-dev.45110",
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"msm-dai-cdc-dma-dev.45111",
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"msm-dai-cdc-dma-dev.45112",
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"msm-dai-cdc-dma-dev.45113",
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"msm-dai-cdc-dma-dev.45114",
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"msm-dai-cdc-dma-dev.45115",
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"msm-dai-cdc-dma-dev.45116",
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"msm-dai-cdc-dma-dev.45118",
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"msm-dai-q6-dev.24577";
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qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
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qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>;
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qcom,cdc-dmic02-gpios = <&cdc_dmic02_gpios>;
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asoc-codec = <&stub_codec>, <&bolero>;
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asoc-codec = <&stub_codec>, <&bolero>,
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<&besbev_codec>, <&wsa883x_0221>;
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asoc-codec-names = "msm-stub-codec.1", "bolero_codec",
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"besbev_codec", "wsa-codec1";
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qcom,wsa-max-devs = <1>;
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qcom,wsa-devs = <&wsa883x_0221>;
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qcom,msm_audio_ssr_devs = <&audio_gpr>, <&bolero>, <&lpi_tlmm>;
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};
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* KONA ASoC Machine driver
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Required properties:
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@ -95,6 +95,9 @@ Example:
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rouleur_tx_slave: rouleur-tx-slave {
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compatible = "qcom,rouleur-slave";
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};
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besbev_tx_slave: besbev-tx-slave {
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compatible = "qcom,besbev-slave";
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};
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};
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};
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};
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@ -135,6 +138,9 @@ Example:
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rouleur_rx_slave: rouleur-rx-slave {
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compatible = "qcom,rouleur-slave";
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};
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besbev_rx_slave: besbev-rx-slave {
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compatible = "qcom,besbev-slave";
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};
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};
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};
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};
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@ -602,3 +608,67 @@ Example:
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qcom,cdc-on-demand-supplies = "cdc-pa-vpos";
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};
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};
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PM5100 SPMI node
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pm5100_spmi: Child node of SPMI bus required for besbev codec
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in order to access SPMI register to reset the peripheral.
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Required properties:
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-compatible: "qcom,pm5100-spmi";
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&spmi_bus {
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pm5100_cdc: qcom,pm5100-cdc {
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compatible = "qcom,pm5100-spmi";
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};
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};
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Besbev Codec
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Required properties:
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- compatible: "qcom,besbev-codec";
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- qcom,split-codec: Property to check on split codec support.
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- qcom,swr_ch_map: mapping of swr tx/rx slave port configuration to port_type and also
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corresponding master port type it need to attach.
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format: <port_id, slave_port_type, ch_mask, ch_rate, master_port_type>
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same port_id configurations have to be grouped, and in ascending order.
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- qcom,pmic-spmi-node: Phandle reference to the PMIC SPMI DT node.
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- qcom,wcd-reset-reg: Reset register address in PMIC for rouleur codec.
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- qcom,besbev-slave: phandle reference of Soundwire Tx/Rx slave device.
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- qcom,speaker-present: Property to check besbev is connected RX SWR or TX SWR of bolero codec.
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Optional properties:
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- cdc-mic-bias-supply: phandle of mic bias supply's regulator device tree node.
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- qcom,cdc-mic-bias-voltage: mic bias supply's voltage level min and max in mV.
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- qcom,cdc-mic-bias-current: mic bias supply's max current in mA.
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- qcom,cdc-mic-bias-lpm-supported: mic bias supply's LPM mode.
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- qcom,cdc-static-supplies: List of supplies to be enabled prior to codec
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hardware probe. Supplies in this list will be
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stay enabled.
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Example:
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besbev_codec: besbev-codec {
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compatible = "qcom,besbev-codec";
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qcom,split-codec = <1>;
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qcom,pmic-spmi-node = <&pm2250_cdc>;
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qcom,wcd-reset-reg = <0x0000FCDB>;
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qcom,foundry-id-reg = <0x0000704D>;
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qcom,swr_ch_map = <0 SPKR_L 0x1 0 LO>,
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<3 SPKR_L_VI 0x3 0 PCM_IN>;
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qcom,besbev-slave = <&besbev_rx_slave>;
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qcom,speaker-present = <1>;
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cdc-mic-bias-supply = <&L28A>;
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qcom,cdc-mic-bias-voltage = <2904000 2904000>;
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qcom,cdc-mic-bias-current = <1180>
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qcom,cdc-micbias1-mv = <1800>;
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qcom,cdc-micbias2-mv = <1800>;
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qcom,cdc-static-supplies = "cdc-mic-bias";
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};
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197
qcom/monaco-amic-audio-overlay.dtsi
Normal file
197
qcom/monaco-amic-audio-overlay.dtsi
Normal file
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@ -0,0 +1,197 @@
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#include <dt-bindings/clock/qcom,audio-ext-clk.h>
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#include <dt-bindings/sound/qcom,bolero-clk-rsc.h>
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#include <dt-bindings/sound/audio-codec-port-types.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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&bolero {
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qcom,num-macros = <3>;
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qcom,bolero-version = <6>;
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bolero-clk-rsc-mngr {
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compatible = "qcom,bolero-clk-rsc-mngr";
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qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>,
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<0x3004 0x3 0x1>, <0x3080 0x2 0x2>;
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qcom,rx_mclk_mode_muxsel = <0x0a5640d8>;
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qcom,va_mclk_mode_muxsel = <0x0a7a0000>;
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clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk",
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"va_core_clk", "va_npl_clk";
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clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>,
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<&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>,
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<&clock_audio_va_1 0>, <&clock_audio_va_2 0>;
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};
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tx_macro: tx-macro@0a620000 {
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compatible = "qcom,tx-macro";
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reg = <0x0a620000 0x0>;
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clock-names = "tx_core_clk", "tx_npl_clk";
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clocks = <&clock_audio_tx_1 0>,
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<&clock_audio_tx_2 0>;
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qcom,is-used-swr-gpio = <0>;
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};
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rx_macro: rx-macro@0a600000 {
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compatible = "qcom,rx-macro";
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reg = <0x0a600000 0x0>;
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clock-names = "rx_core_clk", "rx_npl_clk";
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clocks = <&clock_audio_rx_1 0>,
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<&clock_audio_rx_2 0>;
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qcom,rx-swr-gpios = <&rx_swr_gpios>;
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qcom,rx_mclk_mode_muxsel = <0x0a5640d8>;
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qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x04 0x3E>;
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qcom,default-clk-id = <TX_CORE_CLK>;
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swr1: rx_swr_master {
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compatible = "qcom,swr-mstr";
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#address-cells = <2>;
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#size-cells = <0>;
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clock-names = "lpass_audio_hw_vote";
|
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clocks = <&lpass_audio_hw_vote 0>;
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qcom,swr_master_id = <2>;
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qcom,swrm-hctl-reg = <0x0a6a9098>;
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qcom,mipi-sdw-block-packing-mode = <1>;
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swrm-io-base = <0x0a610000 0x0>;
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interrupts = <0 297 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "swr_master_irq";
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qcom,swr-num-ports = <7>;
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qcom,disable-div2-clk-switch = <1>;
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qcom,swr-port-mapping = <1 HPH_L 0x1>,
|
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<1 HPH_R 0x2>, <2 CLSH 0x1>,
|
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<3 COMP_L 0x1>, <3 COMP_R 0x2>,
|
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<4 LO 0x1>, <5 DSD_L 0x1>,
|
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<5 DSD_R 0x2>,
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<7 SWRM_RX_PCM_IN 0xF>;
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qcom,swr-num-dev = <1>;
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qcom,swr-clock-stop-mode0 = <1>;
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besbev_rx_slave: besbev-rx-slave {
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compatible = "qcom,besbev-slave";
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reg = <0x0C 0x01170224>;
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||||
};
|
||||
};
|
||||
};
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||||
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besbev_codec: besbev-codec {
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compatible = "qcom,besbev-codec";
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qcom,split-codec = <1>;
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qcom,wcd-reset-reg = <0x0000FCDB>;
|
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qcom,foundry-id-reg = <0x000001F2>;
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qcom,swr_ch_map = <0 SPKR_L 0x1 0 LO>,
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<2 ADC1 0x1 0 SWRM_RX_PCM_IN>, <2 ADC2 0x2 0 SWRM_RX_PCM_IN>;
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|
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qcom,besbev-slave = <&besbev_rx_slave>;
|
||||
qcom,speaker-present = <1>;
|
||||
|
||||
cdc-mic-bias-supply = <&L28A>;
|
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qcom,cdc-mic-bias-voltage = <2904000 2904000>;
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qcom,cdc-mic-bias-current = <1180>;
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qcom,cdc-micbias1-mv = <1800>;
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qcom,cdc-micbias2-mv = <1800>;
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qcom,cdc-static-supplies = "cdc-mic-bias";
|
||||
};
|
||||
};
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||||
|
||||
&monaco_snd {
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qcom,model = "monaco-idp-amic-snd-card";
|
||||
qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
|
||||
qcom,wcn-btfm = <1>;
|
||||
qcom,va-bolero-codec = <1>;
|
||||
qcom,audio-routing =
|
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"AMIC1", "Analog Mic1",
|
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"Analog Mic1","MIC BIAS1",
|
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"AMIC2", "Analog Mic2",
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"Analog Mic2", "MIC BIAS2",
|
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"AMIC3", "Analog Mic3",
|
||||
"Analog Mic3", "MIC BIAS3",
|
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"TX DMIC0", "Digital Mic0",
|
||||
"Digital Mic0", "MIC BIAS3",
|
||||
"TX DMIC1", "Digital Mic1",
|
||||
"Digital Mic1", "MIC BIAS3",
|
||||
"TX DMIC2", "Digital Mic2",
|
||||
"Digital Mic2", "MIC BIAS1",
|
||||
"TX DMIC3", "Digital Mic3",
|
||||
"Digital Mic3", "MIC BIAS1",
|
||||
"SPKR_IN", "AUX_OUT",
|
||||
"TX SWR_INPUT", "VA_TX_SWR_CLK",
|
||||
"RX_SWR_TX_PCM_IN0", "RX_MCLK",
|
||||
"RX_SWR_TX_PCM_IN1", "RX_MCLK",
|
||||
"RX_SWR_TX_PCM_IN0", "ADC1_OUTPUT",
|
||||
"RX_SWR_TX_PCM_IN1", "ADC2_OUTPUT",
|
||||
"RX_TX DEC0_INP", "TX DEC0 MUX",
|
||||
"RX_TX DEC1_INP", "TX DEC1 MUX",
|
||||
"RX_TX DEC2_INP", "TX DEC2 MUX",
|
||||
"RX_TX DEC3_INP", "TX DEC3 MUX",
|
||||
"TX_AIF1 CAP", "VA_TX_SWR_CLK",
|
||||
"TX_AIF2 CAP", "VA_TX_SWR_CLK",
|
||||
"TX_AIF3 CAP", "VA_TX_SWR_CLK",
|
||||
"VA SWR_INPUT", "VA_SWR_CLK",
|
||||
"VA_AIF1 CAP", "VA_SWR_CLK",
|
||||
"VA_AIF2 CAP", "VA_SWR_CLK",
|
||||
"VA_AIF3 CAP", "VA_SWR_CLK",
|
||||
"VA DMIC0", "Digital Mic0",
|
||||
"VA DMIC1", "Digital Mic1",
|
||||
"VA DMIC2", "Digital Mic2",
|
||||
"VA DMIC3", "Digital Mic3",
|
||||
"VA DMIC0", "VA MIC BIAS3",
|
||||
"VA DMIC1", "VA MIC BIAS3",
|
||||
"VA DMIC2", "VA MIC BIAS1",
|
||||
"VA DMIC3", "VA MIC BIAS1";
|
||||
|
||||
asoc-codec = <&stub_codec>, <&bolero>,
|
||||
<&besbev_codec>;
|
||||
asoc-codec-names = "msm-stub-codec.1", "bolero_codec",
|
||||
"besbev_codec";
|
||||
qcom,msm_audio_ssr_devs = <&bolero>, <&lpi_tlmm>;
|
||||
};
|
||||
|
||||
&soc {
|
||||
clock_audio_rx_1: rx_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_4>;
|
||||
qcom,codec-lpass-ext-clk-freq = <22579200>;
|
||||
qcom,codec-lpass-clk-id = <0x30E>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_rx_2: rx_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_5>;
|
||||
qcom,codec-lpass-ext-clk-freq = <22579200>;
|
||||
qcom,codec-lpass-clk-id = <0x30F>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_tx_1: tx_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_6>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30C>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_tx_2: tx_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_7>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30D>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_va_1: va_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x307>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_va_2: va_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_8>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x308>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&va_cdc_dma_0_tx {
|
||||
qcom,msm-dai-is-island-supported = <1>;
|
||||
};
|
||||
234
qcom/monaco-audio-overlay.dtsi
Normal file
234
qcom/monaco-audio-overlay.dtsi
Normal file
|
|
@ -0,0 +1,234 @@
|
|||
#include <dt-bindings/clock/qcom,audio-ext-clk.h>
|
||||
#include <dt-bindings/sound/qcom,bolero-clk-rsc.h>
|
||||
#include <dt-bindings/sound/audio-codec-port-types.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
&bolero {
|
||||
qcom,num-macros = <3>;
|
||||
qcom,bolero-version = <6>;
|
||||
bolero-clk-rsc-mngr {
|
||||
compatible = "qcom,bolero-clk-rsc-mngr";
|
||||
qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>,
|
||||
<0x3004 0x3 0x1>, <0x3080 0x2 0x2>;
|
||||
qcom,rx_mclk_mode_muxsel = <0x0a5640d8>;
|
||||
qcom,va_mclk_mode_muxsel = <0x0a7a0000>;
|
||||
clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk",
|
||||
"va_core_clk", "va_npl_clk";
|
||||
clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>,
|
||||
<&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>,
|
||||
<&clock_audio_va_1 0>, <&clock_audio_va_2 0>;
|
||||
};
|
||||
|
||||
tx_macro: tx-macro@0a620000 {
|
||||
compatible = "qcom,tx-macro";
|
||||
reg = <0x0a620000 0x0>;
|
||||
clock-names = "tx_core_clk", "tx_npl_clk";
|
||||
clocks = <&clock_audio_tx_1 0>,
|
||||
<&clock_audio_tx_2 0>;
|
||||
qcom,tx-dmic-sample-rate = <2400000>;
|
||||
qcom,is-used-swr-gpio = <0>;
|
||||
};
|
||||
|
||||
rx_macro: rx-macro@0a600000 {
|
||||
compatible = "qcom,rx-macro";
|
||||
reg = <0x0a600000 0x0>;
|
||||
clock-names = "rx_core_clk", "rx_npl_clk";
|
||||
clocks = <&clock_audio_rx_1 0>,
|
||||
<&clock_audio_rx_2 0>;
|
||||
qcom,rx-swr-gpios = <&rx_swr_gpios>;
|
||||
qcom,rx_mclk_mode_muxsel = <0x0a5640d8>;
|
||||
qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x04 0x3E>;
|
||||
qcom,default-clk-id = <TX_CORE_CLK>;
|
||||
swr1: rx_swr_master {
|
||||
compatible = "qcom,swr-mstr";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
qcom,swr_master_id = <2>;
|
||||
qcom,swrm-hctl-reg = <0x0a6a9098>;
|
||||
qcom,mipi-sdw-block-packing-mode = <1>;
|
||||
swrm-io-base = <0x0a610000 0x0>;
|
||||
interrupts = <0 297 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "swr_master_irq";
|
||||
qcom,swr-num-ports = <7>;
|
||||
qcom,disable-div2-clk-switch = <1>;
|
||||
qcom,swr-port-mapping = <1 HPH_L 0x1>,
|
||||
<1 HPH_R 0x2>, <2 CLSH 0x1>,
|
||||
<3 COMP_L 0x1>, <3 COMP_R 0x2>,
|
||||
<4 LO 0x1>, <5 DSD_L 0x1>,
|
||||
<5 DSD_R 0x2>,
|
||||
<7 SWRM_RX_PCM_IN 0xF>;
|
||||
qcom,swr-num-dev = <1>;
|
||||
qcom,swr-clock-stop-mode0 = <1>;
|
||||
besbev_rx_slave: besbev-rx-slave {
|
||||
compatible = "qcom,besbev-slave";
|
||||
reg = <0x0C 0x01170224>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
va_macro: va-macro@0a730000 {
|
||||
compatible = "qcom,va-macro";
|
||||
reg = <0x0a730000 0x0>;
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
qcom,va-dmic-sample-rate = <600000>;
|
||||
qcom,va-clk-mux-select = <1>;
|
||||
qcom,va-island-mode-muxsel = <0x0a7a0000>;
|
||||
qcom,default-clk-id = <TX_CORE_CLK>;
|
||||
qcom,is-used-swr-gpio = <1>;
|
||||
qcom,va-swr-gpios = <&va_swr_gpios>;
|
||||
swr0: va_swr_master {
|
||||
compatible = "qcom,swr-mstr";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
qcom,swr_master_id = <3>;
|
||||
qcom,swrm-hctl-reg = <0x0a7ec100>;
|
||||
qcom,mipi-sdw-block-packing-mode = <1>;
|
||||
swrm-io-base = <0x0a740000 0x0>;
|
||||
interrupts =
|
||||
<0 296 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 79 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "swr_master_irq", "swr_wake_irq";
|
||||
qcom,swr-wakeup-required = <1>;
|
||||
qcom,swr-num-ports = <3>;
|
||||
qcom,swr-port-mapping = <1 ADC1 0x1>, <1 ADC2 0x2>,
|
||||
<1 ADC3 0x4>, <1 ADC4 0x8>,
|
||||
<2 DMIC0 0x1>, <2 DMIC1 0x2>,
|
||||
<2 DMIC2 0x4>, <2 DMIC3 0x8>,
|
||||
<3 DMIC4 0x1>, <3 DMIC5 0x2>,
|
||||
<3 DMIC6 0x4>, <3 DMIC7 0x8>;
|
||||
qcom,swr-num-dev = <1>;
|
||||
qcom,swr-clock-stop-mode0 = <1>;
|
||||
qcom,swr-mstr-irq-wakeup-capable = <1>;
|
||||
besbev_tx_slave: besbev-tx-slave {
|
||||
compatible = "qcom,besbev-slave";
|
||||
reg = <0x0C 0x01170223>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
besbev_codec: besbev-codec {
|
||||
compatible = "qcom,besbev-codec";
|
||||
qcom,split-codec = <1>;
|
||||
qcom,wcd-reset-reg = <0x0000FCDB>;
|
||||
qcom,foundry-id-reg = <0x000001F2>;
|
||||
qcom,swr_ch_map = <0 SPKR_L 0x1 0 LO>,
|
||||
<3 SPKR_L_VI 0x3 0 SWRM_RX_PCM_IN>;
|
||||
|
||||
qcom,besbev-slave = <&besbev_rx_slave>;
|
||||
qcom,speaker-present = <1>;
|
||||
|
||||
cdc-mic-bias-supply = <&L28A>;
|
||||
qcom,cdc-mic-bias-voltage = <2904000 2904000>;
|
||||
qcom,cdc-mic-bias-current = <1180>;
|
||||
|
||||
qcom,cdc-micbias1-mv = <1800>;
|
||||
qcom,cdc-micbias2-mv = <1800>;
|
||||
|
||||
qcom,cdc-static-supplies = "cdc-mic-bias";
|
||||
};
|
||||
};
|
||||
|
||||
&monaco_snd {
|
||||
qcom,model = "monaco-idp-snd-card";
|
||||
qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
|
||||
qcom,wcn-btfm = <1>;
|
||||
qcom,va-bolero-codec = <1>;
|
||||
qcom,audio-routing =
|
||||
"TX DMIC0", "Digital Mic0",
|
||||
"Digital Mic0", "MIC BIAS3",
|
||||
"TX DMIC1", "Digital Mic1",
|
||||
"Digital Mic1", "MIC BIAS3",
|
||||
"TX DMIC2", "Digital Mic2",
|
||||
"Digital Mic2", "MIC BIAS1",
|
||||
"TX DMIC3", "Digital Mic3",
|
||||
"Digital Mic3", "MIC BIAS1",
|
||||
"SPKR_IN", "AUX_OUT",
|
||||
"TX SWR_INPUT", "VA_TX_SWR_CLK",
|
||||
"RX_TX DEC0_INP", "TX DEC0 MUX",
|
||||
"RX_TX DEC1_INP", "TX DEC1 MUX",
|
||||
"RX_TX DEC2_INP", "TX DEC2 MUX",
|
||||
"RX_TX DEC3_INP", "TX DEC3 MUX",
|
||||
"TX_AIF1 CAP", "VA_TX_SWR_CLK",
|
||||
"TX_AIF2 CAP", "VA_TX_SWR_CLK",
|
||||
"TX_AIF3 CAP", "VA_TX_SWR_CLK",
|
||||
"VA SWR_INPUT", "VA_SWR_CLK",
|
||||
"VA_AIF1 CAP", "VA_SWR_CLK",
|
||||
"VA_AIF2 CAP", "VA_SWR_CLK",
|
||||
"VA_AIF3 CAP", "VA_SWR_CLK",
|
||||
"VA DMIC0", "Digital Mic0",
|
||||
"VA DMIC1", "Digital Mic1",
|
||||
"VA DMIC2", "Digital Mic2",
|
||||
"VA DMIC3", "Digital Mic3",
|
||||
"VA DMIC0", "VA MIC BIAS3",
|
||||
"VA DMIC1", "VA MIC BIAS3",
|
||||
"VA DMIC2", "VA MIC BIAS1",
|
||||
"VA DMIC3", "VA MIC BIAS1";
|
||||
|
||||
qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>;
|
||||
qcom,cdc-dmic02-gpios = <&cdc_dmic02_gpios>;
|
||||
|
||||
asoc-codec = <&stub_codec>, <&bolero>,
|
||||
<&besbev_codec>;
|
||||
asoc-codec-names = "msm-stub-codec.1", "bolero_codec",
|
||||
"besbev_codec";
|
||||
qcom,msm_audio_ssr_devs = <&bolero>, <&lpi_tlmm>;
|
||||
};
|
||||
|
||||
&soc {
|
||||
clock_audio_rx_1: rx_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_4>;
|
||||
qcom,codec-lpass-ext-clk-freq = <22579200>;
|
||||
qcom,codec-lpass-clk-id = <0x30E>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_rx_2: rx_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_5>;
|
||||
qcom,codec-lpass-ext-clk-freq = <22579200>;
|
||||
qcom,codec-lpass-clk-id = <0x30F>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_tx_1: tx_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_6>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30C>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_tx_2: tx_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_7>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30D>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_va_1: va_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x307>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_va_2: va_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_8>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x308>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&va_cdc_dma_0_tx {
|
||||
qcom,msm-dai-is-island-supported = <1>;
|
||||
};
|
||||
168
qcom/monaco-audio.dtsi
Normal file
168
qcom/monaco-audio.dtsi
Normal file
|
|
@ -0,0 +1,168 @@
|
|||
#include <dt-bindings/clock/qcom,audio-ext-clk.h>
|
||||
#include "msm-audio-lpass.dtsi"
|
||||
|
||||
&soc {
|
||||
spf_core_platform: spf_core_platform {
|
||||
compatible = "qcom,spf-core-platform";
|
||||
};
|
||||
|
||||
audio_pkt_core_platform: qcom,audio-pkt-core-platform {
|
||||
compatible = "qcom,audio-pkt-core-platform";
|
||||
};
|
||||
};
|
||||
|
||||
#include "monaco-lpi.dtsi"
|
||||
|
||||
&spf_core_platform {
|
||||
cdc_dmic01_gpios: cdc_dmic01_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>;
|
||||
pinctrl-1 = <&cdc_dmic01_clk_sleep &cdc_dmic01_data_sleep>;
|
||||
qcom,lpi-gpios;
|
||||
};
|
||||
|
||||
cdc_dmic02_gpios: cdc_dmic02_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&cdc_dmic02_clk_active &cdc_dmic02_data_active>;
|
||||
pinctrl-1 = <&cdc_dmic02_clk_sleep &cdc_dmic02_data_sleep>;
|
||||
qcom,lpi-gpios;
|
||||
};
|
||||
|
||||
rx_swr_gpios: rx_swr_clk_data_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&rx_swr_clk_active &rx_swr_data_active>;
|
||||
pinctrl-1 = <&rx_swr_clk_sleep &rx_swr_data_sleep>;
|
||||
qcom,lpi-gpios;
|
||||
};
|
||||
|
||||
va_swr_gpios: va_swr_clk_data_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&tx_swr_clk_active &tx_swr_data1_active
|
||||
&tx_swr_data2_active>;
|
||||
pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data1_sleep
|
||||
&tx_swr_data2_sleep>;
|
||||
qcom,lpi-gpios;
|
||||
qcom,chip-wakeup-reg = <0x003ca064>;
|
||||
qcom,chip-wakeup-maskbit = <0>;
|
||||
qcom,chip-wakeup-default-val = <0x1>;
|
||||
};
|
||||
|
||||
bolero: bolero-cdc {
|
||||
compatible = "qcom,bolero-codec";
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
bolero-clk-rsc-mngr {
|
||||
compatible = "qcom,bolero-clk-rsc-mngr";
|
||||
};
|
||||
|
||||
va_macro: va-macro@0a730000 {
|
||||
swr0: va_swr_master {
|
||||
};
|
||||
};
|
||||
|
||||
rx_macro: rx-macro@0a600000 {
|
||||
swr1: rx_swr_master {
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
monaco_snd: sound {
|
||||
compatible = "qcom,monaco-asoc-snd";
|
||||
qcom,mi2s-audio-intf = <0>;
|
||||
qcom,auxpcm-audio-intf = <0>;
|
||||
qcom,tdm-audio-intf = <0>;
|
||||
qcom,wcn-btfm = <0>;
|
||||
qcom,afe-rxtx-lb = <0>;
|
||||
|
||||
asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
|
||||
<&loopback>, <&compress>, <&hostless>,
|
||||
<&afe>, <&lsm>, <&routing>, <&compr>,
|
||||
<&pcm_noirq>;
|
||||
asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
|
||||
"msm-pcm-dsp.2", "msm-voip-dsp",
|
||||
"msm-pcm-voice", "msm-pcm-loopback",
|
||||
"msm-compress-dsp", "msm-pcm-hostless",
|
||||
"msm-pcm-afe", "msm-lsm-client",
|
||||
"msm-pcm-routing", "msm-compr-dsp",
|
||||
"msm-pcm-dsp-noirq";
|
||||
asoc-cpu = <&dai_mi2s0>, <&dai_mi2s1>,
|
||||
<&dai_mi2s2>, <&dai_mi2s3>,
|
||||
<&dai_pri_auxpcm>,
|
||||
<&dai_sec_auxpcm>, <&dai_tert_auxpcm>,
|
||||
<&dai_quat_auxpcm>,
|
||||
<&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>,
|
||||
<&afe_proxy_tx>, <&incall_record_rx>,
|
||||
<&incall_record_tx>, <&incall_music_rx>,
|
||||
<&incall_music_2_rx>,
|
||||
<&proxy_rx>, <&proxy_tx>,
|
||||
<&usb_audio_rx>, <&usb_audio_tx>,
|
||||
<&sb_7_rx>, <&sb_7_tx>, <&sb_8_tx>,
|
||||
<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,
|
||||
<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>,
|
||||
<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_tx_0>,
|
||||
<&dai_quat_tdm_rx_0>, <&dai_quat_tdm_tx_0>,
|
||||
<&va_cdc_dma_0_tx>, <&va_cdc_dma_1_tx>,
|
||||
<&va_cdc_dma_2_tx>,
|
||||
<&rx_cdc_dma_0_rx>, <&tx_cdc_dma_0_tx>,
|
||||
<&rx_cdc_dma_1_rx>, <&tx_cdc_dma_1_tx>,
|
||||
<&rx_cdc_dma_2_rx>, <&tx_cdc_dma_2_tx>,
|
||||
<&rx_cdc_dma_3_rx>, <&tx_cdc_dma_3_tx>,
|
||||
<&rx_cdc_dma_4_rx>, <&tx_cdc_dma_4_tx>,
|
||||
<&rx_cdc_dma_5_rx>, <&tx_cdc_dma_5_tx>,
|
||||
<&rx_cdc_dma_6_rx>, <&rx_cdc_dma_7_rx>,
|
||||
<&afe_loopback_tx>;
|
||||
asoc-cpu-names = "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1",
|
||||
"msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
|
||||
"msm-dai-q6-auxpcm.1",
|
||||
"msm-dai-q6-auxpcm.2", "msm-dai-q6-auxpcm.3",
|
||||
"msm-dai-q6-auxpcm.4", "msm-dai-q6-dev.224",
|
||||
"msm-dai-q6-dev.225", "msm-dai-q6-dev.241",
|
||||
"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",
|
||||
"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773",
|
||||
"msm-dai-q6-dev.32770",
|
||||
"msm-dai-q6-dev.8194", "msm-dai-q6-dev.8195",
|
||||
"msm-dai-q6-dev.28672", "msm-dai-q6-dev.28673",
|
||||
"msm-dai-q6-dev.16398", "msm-dai-q6-dev.16399",
|
||||
"msm-dai-q6-dev.16401",
|
||||
"msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36865",
|
||||
"msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36881",
|
||||
"msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36897",
|
||||
"msm-dai-q6-tdm.36912", "msm-dai-q6-tdm.36913",
|
||||
"msm-dai-cdc-dma-dev.45089",
|
||||
"msm-dai-cdc-dma-dev.45091",
|
||||
"msm-dai-cdc-dma-dev.45093",
|
||||
"msm-dai-cdc-dma-dev.45104",
|
||||
"msm-dai-cdc-dma-dev.45105",
|
||||
"msm-dai-cdc-dma-dev.45106",
|
||||
"msm-dai-cdc-dma-dev.45107",
|
||||
"msm-dai-cdc-dma-dev.45108",
|
||||
"msm-dai-cdc-dma-dev.45109",
|
||||
"msm-dai-cdc-dma-dev.45110",
|
||||
"msm-dai-cdc-dma-dev.45111",
|
||||
"msm-dai-cdc-dma-dev.45112",
|
||||
"msm-dai-cdc-dma-dev.45113",
|
||||
"msm-dai-cdc-dma-dev.45114",
|
||||
"msm-dai-cdc-dma-dev.45115",
|
||||
"msm-dai-cdc-dma-dev.45116",
|
||||
"msm-dai-cdc-dma-dev.45118",
|
||||
"msm-dai-q6-dev.24577";
|
||||
fsa4480-i2c-handle = <&fsa4480>;
|
||||
};
|
||||
};
|
||||
|
||||
&msm_audio_ion {
|
||||
iommus = <&apps_smmu 0x01c1 0x0>;
|
||||
qcom,smmu-sid-mask = /bits/ 64 <0xf>;
|
||||
};
|
||||
|
||||
&qupv3_se1_i2c {
|
||||
status = "ok"
|
||||
fsa4480: fsa4480@42 {
|
||||
compatible = "qcom,fsa4480-i2c";
|
||||
reg = <0x42>;
|
||||
};
|
||||
};
|
||||
377
qcom/monaco-lpi.dtsi
Normal file
377
qcom/monaco-lpi.dtsi
Normal file
|
|
@ -0,0 +1,377 @@
|
|||
&spf_core_platform {
|
||||
lpass_audio_hw_vote: vote_lpass_audio_hw {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_AUDIO_HW_VOTE>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
lpi_tlmm: lpi_pinctrl@0a7c0000 {
|
||||
compatible = "qcom,lpi-pinctrl";
|
||||
reg = <0x0a7c0000 0x0>;
|
||||
qcom,slew-reg = <0x0a95a000 0x0>;
|
||||
qcom,gpios-count = <19>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
qcom,lpi-offset-tbl = <0x00000000>, <0x00001000>,
|
||||
<0x00002000>, <0x00003000>,
|
||||
<0x00004000>, <0x00005000>,
|
||||
<0x00006000>, <0x00007000>,
|
||||
<0x00008000>, <0x00009000>,
|
||||
<0x0000A000>, <0x0000B000>,
|
||||
<0x0000C000>, <0x0000D000>,
|
||||
<0x0000E000>, <0x0000F000>,
|
||||
<0x00010000>, <0x00011000>,
|
||||
<0x00012000>;
|
||||
qcom,lpi-slew-offset-tbl = <0x00000000>, <0x00000002>,
|
||||
<0x00000004>, <0x00000008>,
|
||||
<0x0000000A>, <0x0000000C>,
|
||||
<0x00000000>, <0x00000000>,
|
||||
<0x00000000>, <0x00000000>,
|
||||
<0x00000000>, <0x00000000>,
|
||||
<0x00000000>, <0x00000000>,
|
||||
<0x00000000>, <0x00000000>,
|
||||
<0x00000000>, <0x00000000>,
|
||||
<0x00000014>;
|
||||
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
|
||||
quat_mi2s_sck {
|
||||
quat_mi2s_sck_sleep: quat_mi2s_sck_sleep {
|
||||
mux {
|
||||
pins = "gpio0";
|
||||
function = "func2";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio0";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
quat_mi2s_sck_active: quat_mi2s_sck_active {
|
||||
mux {
|
||||
pins = "gpio0";
|
||||
function = "func2";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio0";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
quat_mi2s_ws {
|
||||
quat_mi2s_ws_sleep: quat_mi2s_ws_sleep {
|
||||
mux {
|
||||
pins = "gpio1";
|
||||
function = "func2";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio1";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
quat_mi2s_ws_active: quat_mi2s_ws_active {
|
||||
mux {
|
||||
pins = "gpio1";
|
||||
function = "func2";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio1";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
quat_mi2s_sd0 {
|
||||
quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep {
|
||||
mux {
|
||||
pins = "gpio2";
|
||||
function = "func2";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio2";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
quat_mi2s_sd0_active: quat_mi2s_sd0_active {
|
||||
mux {
|
||||
pins = "gpio2";
|
||||
function = "func2";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio2";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tx_swr_clk_sleep: tx_swr_clk_sleep {
|
||||
mux {
|
||||
pins = "gpio0";
|
||||
function = "func1";
|
||||
input-enable;
|
||||
bias-pull-down;
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio0";
|
||||
drive-strength = <10>;
|
||||
};
|
||||
};
|
||||
|
||||
tx_swr_clk_active: tx_swr_clk_active {
|
||||
mux {
|
||||
pins = "gpio0";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio0";
|
||||
drive-strength = <10>;
|
||||
slew-rate = <3>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
tx_swr_data1_sleep: tx_swr_data1_sleep {
|
||||
mux {
|
||||
pins = "gpio1";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio1";
|
||||
drive-strength = <10>;
|
||||
input-enable;
|
||||
bias-bus-hold;
|
||||
};
|
||||
};
|
||||
|
||||
tx_swr_data1_active: tx_swr_data1_active {
|
||||
mux {
|
||||
pins = "gpio1";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio1";
|
||||
drive-strength = <10>;
|
||||
slew-rate = <3>;
|
||||
bias-bus-hold;
|
||||
};
|
||||
};
|
||||
|
||||
tx_swr_data2_sleep: tx_swr_data2_sleep {
|
||||
mux {
|
||||
pins = "gpio2";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio2";
|
||||
drive-strength = <10>;
|
||||
input-enable;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
tx_swr_data2_active: tx_swr_data2_active {
|
||||
mux {
|
||||
pins = "gpio2";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio2";
|
||||
drive-strength = <10>;
|
||||
slew-rate = <3>;
|
||||
bias-bus-hold;
|
||||
};
|
||||
};
|
||||
|
||||
rx_swr_clk_sleep: rx_swr_clk_sleep {
|
||||
mux {
|
||||
pins = "gpio3";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio3";
|
||||
drive-strength = <10>;
|
||||
input-enable;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
rx_swr_clk_active: rx_swr_clk_active {
|
||||
mux {
|
||||
pins = "gpio3";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio3";
|
||||
drive-strength = <10>;
|
||||
slew-rate = <3>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
rx_swr_data_sleep: rx_swr_data_sleep {
|
||||
mux {
|
||||
pins = "gpio4";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio4";
|
||||
drive-strength = <10>;
|
||||
input-enable;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
rx_swr_data_active: rx_swr_data_active {
|
||||
mux {
|
||||
pins = "gpio4";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio4";
|
||||
drive-strength = <10>;
|
||||
slew-rate = <3>;
|
||||
bias-bus-hold;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_dmic01_clk_active: dmic01_clk_active {
|
||||
mux {
|
||||
pins = "gpio6";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio6";
|
||||
drive-strength = <8>;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_dmic01_clk_sleep: dmic01_clk_sleep {
|
||||
mux {
|
||||
pins = "gpio6";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio6";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_dmic01_data_active: dmic01_data_active {
|
||||
mux {
|
||||
pins = "gpio7";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio7";
|
||||
drive-strength = <8>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_dmic01_data_sleep: dmic01_data_sleep {
|
||||
mux {
|
||||
pins = "gpio7";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio7";
|
||||
drive-strength = <2>;
|
||||
pull-down;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_dmic02_clk_active: dmic02_clk_active {
|
||||
mux {
|
||||
pins = "gpio8";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio8";
|
||||
drive-strength = <8>;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_dmic02_clk_sleep: dmic02_clk_sleep {
|
||||
mux {
|
||||
pins = "gpio8";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio8";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_dmic02_data_active: dmic02_data_active {
|
||||
mux {
|
||||
pins = "gpio9";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio9";
|
||||
drive-strength = <8>;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_dmic02_data_sleep: dmic02_data_sleep {
|
||||
mux {
|
||||
pins = "gpio9";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio9";
|
||||
drive-strength = <2>;
|
||||
pull-down;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -745,5 +745,36 @@
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* WSA speaker reset pin1 */
|
||||
spkr_1_sd_n {
|
||||
spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
|
||||
mux {
|
||||
pins = "gpio80";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio80";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
spkr_1_sd_n_active: spkr_1_sd_n_active {
|
||||
mux {
|
||||
pins = "gpio80";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio80";
|
||||
drive-strength = <16>; /* 16 mA */
|
||||
bias-disable;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
227
qcom/monaco-wsa-audio-overlay.dtsi
Normal file
227
qcom/monaco-wsa-audio-overlay.dtsi
Normal file
|
|
@ -0,0 +1,227 @@
|
|||
#include <dt-bindings/clock/qcom,audio-ext-clk.h>
|
||||
#include <dt-bindings/sound/qcom,bolero-clk-rsc.h>
|
||||
#include <dt-bindings/sound/audio-codec-port-types.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
&bolero {
|
||||
qcom,num-macros = <3>;
|
||||
qcom,bolero-version = <6>;
|
||||
bolero-clk-rsc-mngr {
|
||||
compatible = "qcom,bolero-clk-rsc-mngr";
|
||||
qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>,
|
||||
<0x3004 0x3 0x1>, <0x3080 0x2 0x2>;
|
||||
qcom,rx_mclk_mode_muxsel = <0x0a5640d8>;
|
||||
qcom,va_mclk_mode_muxsel = <0x0a7a0000>;
|
||||
clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk",
|
||||
"va_core_clk", "va_npl_clk";
|
||||
clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>,
|
||||
<&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>,
|
||||
<&clock_audio_va_1 0>, <&clock_audio_va_2 0>;
|
||||
};
|
||||
|
||||
tx_macro: tx-macro@0a620000 {
|
||||
compatible = "qcom,tx-macro";
|
||||
reg = <0x0a620000 0x0>;
|
||||
clock-names = "tx_core_clk", "tx_npl_clk";
|
||||
clocks = <&clock_audio_tx_1 0>,
|
||||
<&clock_audio_tx_2 0>;
|
||||
qcom,tx-dmic-sample-rate = <2400000>;
|
||||
qcom,is-used-swr-gpio = <0>;
|
||||
};
|
||||
|
||||
rx_macro: rx-macro@0a600000 {
|
||||
compatible = "qcom,rx-macro";
|
||||
reg = <0x0a600000 0x0>;
|
||||
clock-names = "rx_core_clk", "rx_npl_clk";
|
||||
clocks = <&clock_audio_rx_1 0>,
|
||||
<&clock_audio_rx_2 0>;
|
||||
qcom,rx-swr-gpios = <&rx_swr_gpios>;
|
||||
qcom,rx_mclk_mode_muxsel = <0x0a5640d8>;
|
||||
qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x04 0x3E>;
|
||||
qcom,default-clk-id = <TX_CORE_CLK>;
|
||||
swr1: rx_swr_master {
|
||||
compatible = "qcom,swr-mstr";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
qcom,swr_master_id = <2>;
|
||||
qcom,swrm-hctl-reg = <0x0a6a9098>;
|
||||
qcom,mipi-sdw-block-packing-mode = <1>;
|
||||
swrm-io-base = <0x0a610000 0x0>;
|
||||
interrupts = <0 297 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "swr_master_irq";
|
||||
qcom,swr-num-ports = <7>;
|
||||
qcom,disable-div2-clk-switch = <1>;
|
||||
qcom,swr-port-mapping = <1 HPH_L 0x1>,
|
||||
<1 HPH_R 0x2>, <2 CLSH 0x1>,
|
||||
<3 COMP_L 0x1>, <3 COMP_R 0x2>,
|
||||
<4 LO 0x1>, <5 DSD_L 0x1>,
|
||||
<5 DSD_R 0x2>,
|
||||
<7 SWRM_RX_PCM_IN 0xF>;
|
||||
qcom,swr-num-dev = <1>;
|
||||
qcom,swr-clock-stop-mode0 = <1>;
|
||||
wsa883x_0221: wsa883x@02170221 {
|
||||
compatible = "qcom,wsa883x";
|
||||
reg = <0x2 0x2170221>;
|
||||
qcom,spkr-sd-n-node = <&wsa_spkr_en>;
|
||||
qcom,bolero-handle = <&bolero>;
|
||||
|
||||
cdc-vdd-1p8-supply = <&L19A>;
|
||||
qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
|
||||
qcom,cdc-vdd-1p8-current = <20000>;
|
||||
qcom,cdc-static-supplies = "cdc-vdd-1p8";
|
||||
qcom,wsa-prefix = "SpkrLeft";
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
va_macro: va-macro@0a730000 {
|
||||
compatible = "qcom,va-macro";
|
||||
reg = <0x0a730000 0x0>;
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
qcom,va-dmic-sample-rate = <600000>;
|
||||
qcom,va-clk-mux-select = <1>;
|
||||
qcom,va-island-mode-muxsel = <0x0a7a0000>;
|
||||
qcom,default-clk-id = <TX_CORE_CLK>;
|
||||
qcom,is-used-swr-gpio = <1>;
|
||||
qcom,va-swr-gpios = <&va_swr_gpios>;
|
||||
swr0: va_swr_master {
|
||||
compatible = "qcom,swr-mstr";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
clock-names = "lpass_audio_hw_vote";
|
||||
clocks = <&lpass_audio_hw_vote 0>;
|
||||
qcom,swr_master_id = <3>;
|
||||
qcom,swrm-hctl-reg = <0x0a7ec100>;
|
||||
qcom,mipi-sdw-block-packing-mode = <1>;
|
||||
swrm-io-base = <0x0a740000 0x0>;
|
||||
interrupts =
|
||||
<0 296 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 79 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "swr_master_irq", "swr_wake_irq";
|
||||
qcom,swr-wakeup-required = <1>;
|
||||
qcom,swr-num-ports = <3>;
|
||||
qcom,swr-port-mapping = <1 ADC1 0x1>, <1 ADC2 0x2>,
|
||||
<1 ADC3 0x4>, <1 ADC4 0x8>,
|
||||
<2 DMIC0 0x1>, <2 DMIC1 0x2>,
|
||||
<2 DMIC2 0x4>, <2 DMIC3 0x8>,
|
||||
<3 DMIC4 0x1>, <3 DMIC5 0x2>,
|
||||
<3 DMIC6 0x4>, <3 DMIC7 0x8>;
|
||||
qcom,swr-num-dev = <1>;
|
||||
qcom,swr-clock-stop-mode0 = <1>;
|
||||
qcom,swr-mstr-irq-wakeup-capable = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&monaco_snd {
|
||||
qcom,model = "monaco-idp-wsa-snd-card";
|
||||
qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
|
||||
qcom,wcn-btfm = <1>;
|
||||
qcom,va-bolero-codec = <1>;
|
||||
qcom,audio-routing =
|
||||
"TX DMIC0", "Digital Mic0",
|
||||
"Digital Mic0", "MIC BIAS3",
|
||||
"TX DMIC1", "Digital Mic1",
|
||||
"Digital Mic1", "MIC BIAS3",
|
||||
"TX DMIC2", "Digital Mic2",
|
||||
"Digital Mic2", "MIC BIAS1",
|
||||
"TX DMIC3", "Digital Mic3",
|
||||
"Digital Mic3", "MIC BIAS1",
|
||||
"SpkrLeft IN", "AUX_OUT",
|
||||
"TX SWR_INPUT", "VA_TX_SWR_CLK",
|
||||
"RX_TX DEC0_INP", "TX DEC0 MUX",
|
||||
"RX_TX DEC1_INP", "TX DEC1 MUX",
|
||||
"RX_TX DEC2_INP", "TX DEC2 MUX",
|
||||
"RX_TX DEC3_INP", "TX DEC3 MUX",
|
||||
"TX_AIF1 CAP", "VA_TX_SWR_CLK",
|
||||
"TX_AIF2 CAP", "VA_TX_SWR_CLK",
|
||||
"TX_AIF3 CAP", "VA_TX_SWR_CLK",
|
||||
"VA SWR_INPUT", "VA_SWR_CLK",
|
||||
"VA_AIF1 CAP", "VA_SWR_CLK",
|
||||
"VA_AIF2 CAP", "VA_SWR_CLK",
|
||||
"VA_AIF3 CAP", "VA_SWR_CLK",
|
||||
"VA DMIC0", "Digital Mic0",
|
||||
"VA DMIC1", "Digital Mic1",
|
||||
"VA DMIC2", "Digital Mic2",
|
||||
"VA DMIC3", "Digital Mic3",
|
||||
"VA DMIC0", "VA MIC BIAS3",
|
||||
"VA DMIC1", "VA MIC BIAS3",
|
||||
"VA DMIC2", "VA MIC BIAS1",
|
||||
"VA DMIC3", "VA MIC BIAS1";
|
||||
|
||||
qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>;
|
||||
qcom,cdc-dmic02-gpios = <&cdc_dmic02_gpios>;
|
||||
|
||||
asoc-codec = <&stub_codec>, <&bolero>,
|
||||
<&wsa883x_0221>;
|
||||
asoc-codec-names = "msm-stub-codec.1", "bolero_codec",
|
||||
"wsa-codec1";
|
||||
qcom,wsa-max-devs = <1>;
|
||||
qcom,wsa-devs = <&wsa883x_0221>;
|
||||
qcom,msm_audio_ssr_devs = <&bolero>, <&lpi_tlmm>;
|
||||
};
|
||||
|
||||
&soc {
|
||||
wsa_spkr_en: wsa_spkr_en_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&spkr_1_sd_n_active>;
|
||||
pinctrl-1 = <&spkr_1_sd_n_sleep>;
|
||||
};
|
||||
|
||||
clock_audio_rx_1: rx_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_4>;
|
||||
qcom,codec-lpass-ext-clk-freq = <22579200>;
|
||||
qcom,codec-lpass-clk-id = <0x30E>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_rx_2: rx_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_5>;
|
||||
qcom,codec-lpass-ext-clk-freq = <22579200>;
|
||||
qcom,codec-lpass-clk-id = <0x30F>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_tx_1: tx_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_6>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30C>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_tx_2: tx_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_7>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x30D>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_va_1: va_core_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x307>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
clock_audio_va_2: va_npl_clk {
|
||||
compatible = "qcom,audio-ref-clk";
|
||||
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_8>;
|
||||
qcom,codec-lpass-ext-clk-freq = <19200000>;
|
||||
qcom,codec-lpass-clk-id = <0x308>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&va_cdc_dma_0_tx {
|
||||
qcom,msm-dai-is-island-supported = <1>;
|
||||
};
|
||||
|
|
@ -54,5 +54,9 @@
|
|||
reg-names = "rtc", "alarm";
|
||||
interrupts = <0x0 0x65 0x1 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
|
||||
pm5100_cdc: qcom,pm5100-cdc {
|
||||
compatible = "qcom,pm5100-spmi";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in a new issue