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ARM: SoC: platform support for v4.2
Our SoC branch usually contains expanded support for new SoCs and other core platform code. Some highlights from this round: - sunxi: SMP support for A23 SoC - socpga: big-endian support - pxa: conversion to common clock framework - bcm: SMP support for BCM63138 - imx: support new I.MX7D SoC - zte: basic support for ZX296702 SoC Conflicts: arch/arm/mach-socfpga/core.h Trivial remove/remove conflict with our cleanup branch. Resolution: remove both sides -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVi4RMAAoJEFk3GJrT+8Zl6/kP/1Rv9O++1Kxua6R54Og6AF1J 0miFr2fnUrUWUYg/NVbseRH5bBe6N6ir3SQMfde8W2/QibEjOoEwSwrle+mC/eiq CE0x0gtyRvXMrMU/FWkOvbmmw9uv5oz1z3IHZV6AiecNuSMLUBPfamryikQ8C+d1 O/QZtX543tJQJDOBihO5cuhoVVM37UX0unNmqGsyswlyqTPF8FxcIJAYVNtnxjmj AFaOB0nDJKLKFTiX2Ype2wOxxJX1lrLatNo4W4T+YaaK+i1uCOhgTdSN+n49K7YA KNDFEgZFQqT8VMJyG+eJVeYF+cI7yWQ7lBzIftPUjPk/7+dIHBjWPz2QdjVz3U38 kxncf4S9xGAF5G2rcKe4mFrfT3Y8QLWQpA/jFs06yLwW1O3Hlfq3DzMdGNcF7hth 17LOP8namn9+NepZEp/vAlFzRRypxWWtbkPNBIItkImC6zn0IiGjBy50DE1io27W hmQcnMb7d+0wWl2Y8OmR2lZSB97JiRZkRYMCVHVt+0zGJzp4prLvl9wbjh1VXkPv ERCDJ9nCmZsl7ZVmIXMI7KNXYuPNp7R/QAzCvuSUueswF0qxTAQ0VSSBwRMqvQsQ UUNC6p63VnjUeMUdn2EBsUQZ0Uqw3t2U5TtvooHNt9FkiGsSpwjWrvVD+LItaPoJ GPeeJrJaYQsDvTrO8wjU =ZtPK -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform support updates from Kevin Hilman: "Our SoC branch usually contains expanded support for new SoCs and other core platform code. Some highlights from this round: - sunxi: SMP support for A23 SoC - socpga: big-endian support - pxa: conversion to common clock framework - bcm: SMP support for BCM63138 - imx: support new I.MX7D SoC - zte: basic support for ZX296702 SoC" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits) ARM: zx: Add basic defconfig support for ZX296702 ARM: dts: zx: add an initial zx296702 dts and doc clk: zx: add clock support to zx296702 dt-bindings: Add #defines for ZTE ZX296702 clocks ARM: socfpga: fix build error due to secondary_startup MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS ARM: ep93xx: simone: support for SPI-based MMC/SD cards MAINTAINERS: update Shawn's email to use kernel.org one ARM: socfpga: support suspend to ram ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10 ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5 ARM: EXYNOS: register power domain driver from core_initcall ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs ARM: SAMSUNG: Constify platform_device_id ARM: EXYNOS: Constify irq_domain_ops ARM: EXYNOS: add coupled cpuidle support for Exynos3250 ARM: EXYNOS: add exynos_get_boot_addr() helper ARM: EXYNOS: add exynos_set_boot_addr() helper ARM: EXYNOS: make exynos_core_restart() less verbose ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout ...
This commit is contained in:
commit
4aa705b18b
217 changed files with 6572 additions and 2061 deletions
37
include/soc/imx/revision.h
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37
include/soc/imx/revision.h
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@ -0,0 +1,37 @@
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/*
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* Copyright 2015 Linaro Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __SOC_IMX_REVISION_H__
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#define __SOC_IMX_REVISION_H__
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#define IMX_CHIP_REVISION_1_0 0x10
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#define IMX_CHIP_REVISION_1_1 0x11
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#define IMX_CHIP_REVISION_1_2 0x12
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#define IMX_CHIP_REVISION_1_3 0x13
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#define IMX_CHIP_REVISION_1_4 0x14
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#define IMX_CHIP_REVISION_1_5 0x15
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#define IMX_CHIP_REVISION_2_0 0x20
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#define IMX_CHIP_REVISION_2_1 0x21
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#define IMX_CHIP_REVISION_2_2 0x22
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#define IMX_CHIP_REVISION_2_3 0x23
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#define IMX_CHIP_REVISION_3_0 0x30
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#define IMX_CHIP_REVISION_3_1 0x31
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#define IMX_CHIP_REVISION_3_2 0x32
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#define IMX_CHIP_REVISION_3_3 0x33
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#define IMX_CHIP_REVISION_UNKNOWN 0xff
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int mx27_revision(void);
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int mx31_revision(void);
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int mx35_revision(void);
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int mx51_revision(void);
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int mx53_revision(void);
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unsigned int imx_get_soc_revision(void);
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void imx_print_silicon_rev(const char *cpu, int srev);
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#endif /* __SOC_IMX_REVISION_H__ */
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26
include/soc/imx/timer.h
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include/soc/imx/timer.h
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/*
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* Copyright 2015 Linaro Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __SOC_IMX_TIMER_H__
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#define __SOC_IMX_TIMER_H__
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enum imx_gpt_type {
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GPT_TYPE_IMX1, /* i.MX1 */
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GPT_TYPE_IMX21, /* i.MX21/27 */
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GPT_TYPE_IMX31, /* i.MX31/35/25/37/51/6Q */
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GPT_TYPE_IMX6DL, /* i.MX6DL/SX/SL */
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};
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/*
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* This is a stop-gap solution for clock drivers like imx1/imx21 which call
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* mxc_timer_init() to initialize timer for non-DT boot. It can be removed
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* when these legacy non-DT support is converted or dropped.
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*/
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void mxc_timer_init(unsigned long pbase, int irq, enum imx_gpt_type type);
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#endif /* __SOC_IMX_TIMER_H__ */
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@ -26,8 +26,6 @@
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struct clk;
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struct reset_control;
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void tegra_pmc_restart(enum reboot_mode mode, const char *cmd);
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#ifdef CONFIG_PM_SLEEP
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enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void);
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void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode);
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