diff --git a/display/dsi-panel-r66451-dsc-fhd-plus-60hz-video.dtsi b/display/dsi-panel-r66451-dsc-fhd-plus-60hz-video.dtsi
new file mode 100644
index 000000000000..50e11b87af55
--- /dev/null
+++ b/display/dsi-panel-r66451-dsc-fhd-plus-60hz-video.dtsi
@@ -0,0 +1,87 @@
+&mdss_mdp {
+	dsi_r66451_amoled_60hz_video: qcom,mdss_dsi_visionox_r66451_fhd_plus_60hz_video {
+		qcom,mdss-dsi-panel-name =
+			"r66451 amoled video mode dsi visionox 60Hz panel with DSC";
+		qcom,mdss-dsi-panel-type = "dsi_video_mode";
+		qcom,mdss-dsi-panel-physical-type = "oled";
+		qcom,dsi-ctrl-num = <0>;
+		qcom,dsi-phy-num = <0>;
+		qcom,mdss-dsi-virtual-channel-id = <0>;
+		qcom,mdss-dsi-stream = <0>;
+		qcom,mdss-dsi-bpp = <24>;
+		qcom,mdss-dsi-border-color = <0>;
+
+		qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
+		qcom,mdss-dsi-bllp-eof-power-mode;
+		qcom,mdss-dsi-bllp-power-mode;
+		qcom,mdss-dsi-lane-0-state;
+		qcom,mdss-dsi-lane-1-state;
+		qcom,mdss-dsi-lane-2-state;
+		qcom,mdss-dsi-lane-3-state;
+		qcom,mdss-dsi-dma-trigger = "trigger_sw";
+		qcom,mdss-dsi-mdp-trigger = "none";
+		qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
+		qcom,adjust-timer-wakeup-ms = <1>;
+		qcom,mdss-dsi-panel-hdr-enabled;
+		qcom,mdss-dsi-panel-hdr-color-primaries = < 14500 15500 32000
+			17000 15500 30000 8000 3000>;
+		qcom,mdss-dsi-panel-peak-brightness = <4200000>;
+		qcom,mdss-dsi-panel-blackness-level = <3230>;
+		qcom,mdss-dsi-display-timings {
+			timing@0 {
+				qcom,mdss-dsi-panel-width = <1080>;
+				qcom,mdss-dsi-panel-height = <2340>;
+				qcom,mdss-dsi-h-front-porch = <95>;
+				qcom,mdss-dsi-h-back-porch = <40>;
+				qcom,mdss-dsi-h-pulse-width = <1>;
+				qcom,mdss-dsi-h-sync-skew = <0>;
+				qcom,mdss-dsi-v-back-porch = <4>;
+				qcom,mdss-dsi-v-front-porch = <25>;
+				qcom,mdss-dsi-v-pulse-width = <1>;
+				qcom,mdss-dsi-panel-framerate = <60>;
+				qcom,mdss-dsi-on-command = [
+					39 01 00 00 00 00 02 b0 00
+					39 01 00 00 00 00 02 b3 01
+					39 01 00 00 00 00 02 b0 00
+					39 01 00 00 00 00 13 d8 00 00 00 00 00
+					   00 00 00 00 5b 00 5b 00 5b 00 5b 00
+					   5b
+					39 01 00 00 00 00 02 b0 80
+					39 01 00 00 00 00 02 e6 00
+					39 01 00 00 00 00 02 b0 00
+					39 01 00 00 00 00 19 cf 64 0b 00 00 00
+					   00 00 00 08 00 0b 77 01 01 01 01 01
+					   01 04 04 04 04 04 05
+					39 01 00 00 00 00 02 b0 04
+					39 01 00 00 00 00 02 f7 01
+					39 01 00 00 00 00 03 df 50 40
+					39 01 00 00 00 00 06 f3 50 00 00 00 00
+					39 01 00 00 00 00 02 f2 11
+					39 01 00 00 00 00 06 f3 01 00 00 00 01
+					39 01 00 00 00 00 03 f4 00 02
+					39 01 00 00 00 00 02 f2 19
+					39 01 00 00 00 00 03 df 50 42
+					39 01 00 00 00 00 02 35 00
+					39 01 00 00 00 00 05 2a 00 00 04 37
+					39 01 00 00 00 00 05 2b 00 00 09 23
+					05 01 00 00 78 00 01 11
+					05 01 00 00 00 00 01 29
+				];
+
+				qcom,mdss-dsi-off-command = [
+					05 01 00 00 14 00 02 28 00
+					05 01 00 00 78 00 02 10 00];
+				qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
+				qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
+				qcom,mdss-dsi-h-sync-pulse = <0>;
+				qcom,compression-mode = "dsc";
+				qcom,mdss-dsc-slice-height = <20>;
+				qcom,mdss-dsc-slice-width = <540>;
+				qcom,mdss-dsc-slice-per-pkt = <1>;
+				qcom,mdss-dsc-bit-per-component = <8>;
+				qcom,mdss-dsc-bit-per-pixel = <8>;
+				qcom,mdss-dsc-block-prediction-enable;
+			};
+		};
+	};
+};
diff --git a/display/shima-sde-display-idp.dtsi b/display/shima-sde-display-idp.dtsi
index 7fd9d2bc172f..8049e9d4a014 100644
--- a/display/shima-sde-display-idp.dtsi
+++ b/display/shima-sde-display-idp.dtsi
@@ -10,6 +10,16 @@
 	qcom,platform-reset-gpio = <&tlmm 24 0>;
 };
 
+&dsi_r66451_amoled_60hz_video {
+	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+	qcom,mdss-dsi-bl-min-level = <1>;
+	qcom,mdss-dsi-bl-max-level = <4095>;
+	qcom,mdss-brightness-max-level = <255>;
+	qcom,mdss-dsi-bl-inverted-dbv;
+	qcom,platform-reset-gpio = <&tlmm 24 0>;
+}
+
 &dsi_r66451_amoled_cmd {
 	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
 	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
@@ -28,5 +38,5 @@
 };
 
 &sde_dsi {
-	qcom,dsi-default-panel = <&dsi_r66451_amoled_video>;
+	qcom,dsi-default-panel = <&dsi_r66451_amoled_60hz_video>;
 };
diff --git a/display/shima-sde-display.dtsi b/display/shima-sde-display.dtsi
index 03e5cc9147a1..d7bf5f96c7eb 100644
--- a/display/shima-sde-display.dtsi
+++ b/display/shima-sde-display.dtsi
@@ -1,4 +1,5 @@
 #include "dsi-panel-r66451-dsc-fhd-plus-video.dtsi"
+#include "dsi-panel-r66451-dsc-fhd-plus-60hz-video.dtsi"
 #include "dsi-panel-r66451-dsc-fhd-plus-cmd.dtsi"
 #include "dsi-panel-sim-video.dtsi"
 #include <dt-bindings/clock/mdss-5nm-pll-clk.h>
@@ -158,6 +159,18 @@
 	};
 };
 
+&dsi_r66451_amoled_60hz_video {
+	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
+	qcom,mdss-dsi-display-timings {
+		timing@0 {
+			qcom,mdss-dsi-panel-phy-timings = [00 10 04 04 12 11 04
+				04 03 02 04 00 0e 09];
+			qcom,display-topology = <2 2 1>;
+			qcom,default-topology-index = <0>;
+		};
+	};
+};
+
 &dsi_r66451_amoled_cmd {
 	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
 	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];