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irqchip: gicv3-its: Fix PROP/PEND and BASE/CBASE confusion

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The ITS driver sometime mixes up the use of GICR_PROPBASE bitfields
for the GICR_PENDBASE register, and GITS_BASER for GICR_CBASE.

This does not lead to any observable bug because similar bits are
at the same location, but this just make the code even harder to
understand...

This patch provides the required #defines and fixes the mixup.

Signed-off-by: Marc Zyngier <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
Signed-off-by: Jason Cooper <[email protected]>
This commit is contained in:
Marc Zyngier 2015-03-27 14:15:04 +00:00 • committed by Jason Cooper
commit 4ad3e3634a
2 changed files with 16 additions and 3 deletions
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6
drivers/irqchip/irq-gic-v3-its.c
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@ -986,8 +986,8 @@ static void its_cpu_init_lpis(void)
/* set PENDBASE */
val = (page_to_phys(pend_page) |
GICR_PROPBASER_InnerShareable |
GICR_PROPBASER_WaWb);
GICR_PENDBASER_InnerShareable |
GICR_PENDBASER_WaWb);
writeq_relaxed(val, rbase + GICR_PENDBASER);
@ -1425,7 +1425,7 @@ static int its_probe(struct device_node *node, struct irq_domain *parent)
writeq_relaxed(0, its->base + GITS_CWRITER);
writel_relaxed(GITS_CTLR_ENABLE, its->base + GITS_CTLR);
if ((tmp ^ baser) & GITS_BASER_SHAREABILITY_MASK) {
if ((tmp ^ baser) & GITS_CBASER_SHAREABILITY_MASK) {
pr_info("ITS: using cache flushing for cmd queue\n");
its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING;
}