From a5d7785a9ae6b2e14d7959fac36988e81fd81476 Mon Sep 17 00:00:00 2001 From: Pankaj Gupta Date: Tue, 1 Sep 2020 20:00:43 +0530 Subject: [PATCH] msm: kgsl: Define RBBM_SW_RESET_CMD for a6xx targets Define RBBM_SW_RESET_CMD in a6xx_register_offsets to enable soft reset for a6xx targets. Change-Id: Ibc0a3aa7f1a4db5f80617b751082d1c71e6eb262 Signed-off-by: Pankaj Gupta --- drivers/gpu/msm/adreno_a6xx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/msm/adreno_a6xx.c b/drivers/gpu/msm/adreno_a6xx.c index c392d317747d..f0e159ed31c0 100644 --- a/drivers/gpu/msm/adreno_a6xx.c +++ b/drivers/gpu/msm/adreno_a6xx.c @@ -2587,6 +2587,7 @@ static unsigned int a6xx_register_offsets[ADRENO_REG_REGISTER_MAX] = { ADRENO_REG_DEFINE(ADRENO_REG_RBBM_INT_0_MASK, A6XX_RBBM_INT_0_MASK), ADRENO_REG_DEFINE(ADRENO_REG_RBBM_INT_0_STATUS, A6XX_RBBM_INT_0_STATUS), ADRENO_REG_DEFINE(ADRENO_REG_RBBM_CLOCK_CTL, A6XX_RBBM_CLOCK_CNTL), + ADRENO_REG_DEFINE(ADRENO_REG_RBBM_SW_RESET_CMD, A6XX_RBBM_SW_RESET_CMD), ADRENO_REG_DEFINE(ADRENO_REG_RBBM_PERFCTR_LOAD_VALUE_LO, A6XX_RBBM_PERFCTR_LOAD_VALUE_LO), ADRENO_REG_DEFINE(ADRENO_REG_RBBM_PERFCTR_LOAD_VALUE_HI,