From 4cb4b936dc907c00dc12b11f476c50ffc047ce91 Mon Sep 17 00:00:00 2001 From: Ram Chandrasekar Date: Tue, 25 Aug 2020 16:30:37 -0700 Subject: [PATCH] dt-bindings: thermal: sdpm: Add regulator phandle Certain domains regulator also needs to be monitored to vote for a frequency value of 0 when the domain is power collapsed. This property is optional only to the domains whose power state also needs to be monitored. Change-Id: I4be14fa4a0b1655290122ac4b0dd53ffe0d85a11 --- bindings/thermal/qcom-sdpm.txt | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/bindings/thermal/qcom-sdpm.txt b/bindings/thermal/qcom-sdpm.txt index 8a0a0f9fefc0..0bb0d20c4976 100644 --- a/bindings/thermal/qcom-sdpm.txt +++ b/bindings/thermal/qcom-sdpm.txt @@ -29,6 +29,13 @@ Properties: Value type: Definition: List of clock names matching the clock order mentioned in the clocks property. + +- -supply: + Usage: Optional + Value type: + Definition: phandle to the regulator device tree node that powers + this domain. + - cpu: Usage: optional Value type: @@ -46,9 +53,10 @@ Example: cx_sdpm@0x00634000 { compatible = "qcom,sdpm"; reg = <0x00634000 0x1000>; - clock-names = "cam_cc", "compo_aux"; + clock-names = "cam_cc_ipe", "compo_aux"; clocks = <&clock_camcc CAM_CC_IPE_0_CLK_SRC>, <&clk_m_a2_div1 CLK_M_COMPO_AUX>; + cam_cc_ipe-supply = <&cam_cc_ipe_0_gdsc>; cpu = <&CPU7>; csr-id = <5 7 4>; //CSR 5 <=> cam_cc