mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 18:51:56 -04:00
mvebu boards changes for v3.12
- convert kirkwood, dove, orion5x to DT init of mv643xx_eth
- _lots_ of board code removal :)
- convert kirkwood, dove and orion5x to DT init of clocksource and irqchip
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Merge tag 'boards-3.12' of git://git.infradead.org/linux-mvebu into next/boards
From Jason Cooper:
mvebu boards changes for v3.12
- convert kirkwood, dove, orion5x to DT init of mv643xx_eth
- _lots_ of board code removal :)
- convert kirkwood, dove and orion5x to DT init of clocksource and irqchip
* tag 'boards-3.12' of git://git.infradead.org/linux-mvebu:
ARM: plat-orion: add reg offset to DT irq driver stub
ARM: kirkwood: remove obsolete SDIO clock gate workaround
ARM: kirkwood: convert to DT irqchip and clocksource
ARM: dove: convert to DT irqchip and clocksource
ARM: orion5x: update intc device tree node to new reg layout
ARM: kirkwood: move device tree nodes to DT irqchip and clocksource
ARM: dove: move device tree nodes to DT irqchip and clocksource
ARM: orion5x: remove legacy mv643xx_eth board setup
ARM: kirkwood: remove legacy clk alias for mv643xx_eth
ARM: kirkwood: remove redundant DT board files
ARM: dove: remove legacy mv643xx_eth setup
ARM: orion5x: add gigabit ethernet and mvmdio device tree nodes
ARM: kirkwood: add gigabit ethernet and mvmdio device tree nodes
ARM: dove: add gigabit ethernet and mvmdio device tree nodes
+ Linux 3.11-rc2
Signed-off-by: Olof Johansson <[email protected]>
This commit is contained in:
commit
4ddbed9618
721 changed files with 4217 additions and 94854 deletions
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@ -43,9 +43,9 @@
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* peripherals (nofpu, nodsp, and so forth).
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*/
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#define onchip_setup(x) \
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static int x##_disabled __cpuinitdata = !cpu_has_##x; \
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static int x##_disabled = !cpu_has_##x; \
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\
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static int __cpuinit x##_setup(char *opts) \
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static int x##_setup(char *opts) \
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{ \
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x##_disabled = 1; \
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return 1; \
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@ -59,7 +59,7 @@ onchip_setup(dsp);
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#define CPUOPM 0xff2f0000
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#define CPUOPM_RABD (1 << 5)
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static void __cpuinit speculative_execution_init(void)
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static void speculative_execution_init(void)
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{
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/* Clear RABD */
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__raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
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@ -78,7 +78,7 @@ static void __cpuinit speculative_execution_init(void)
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#define EXPMASK_BRDSSLP (1 << 1)
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#define EXPMASK_MMCAW (1 << 4)
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static void __cpuinit expmask_init(void)
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static void expmask_init(void)
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{
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unsigned long expmask = __raw_readl(EXPMASK);
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@ -217,7 +217,7 @@ static void detect_cache_shape(void)
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l2_cache_shape = -1; /* No S-cache */
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}
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static void __cpuinit fpu_init(void)
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static void fpu_init(void)
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{
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/* Disable the FPU */
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if (fpu_disabled && (current_cpu_data.flags & CPU_HAS_FPU)) {
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@ -230,7 +230,7 @@ static void __cpuinit fpu_init(void)
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}
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#ifdef CONFIG_SH_DSP
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static void __cpuinit release_dsp(void)
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static void release_dsp(void)
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{
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unsigned long sr;
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@ -244,7 +244,7 @@ static void __cpuinit release_dsp(void)
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);
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}
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static void __cpuinit dsp_init(void)
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static void dsp_init(void)
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{
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unsigned long sr;
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@ -276,7 +276,7 @@ static void __cpuinit dsp_init(void)
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release_dsp();
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}
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#else
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static inline void __cpuinit dsp_init(void) { }
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static inline void dsp_init(void) { }
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#endif /* CONFIG_SH_DSP */
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/**
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@ -295,7 +295,7 @@ static inline void __cpuinit dsp_init(void) { }
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* Each processor family is still responsible for doing its own probing
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* and cache configuration in cpu_probe().
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*/
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asmlinkage void __cpuinit cpu_init(void)
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asmlinkage void cpu_init(void)
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{
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current_thread_info()->cpu = hard_smp_processor_id();
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@ -13,7 +13,7 @@
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#include <asm/processor.h>
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#include <asm/cache.h>
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void __cpuinit cpu_probe(void)
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void cpu_probe(void)
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{
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#if defined(CONFIG_CPU_SUBTYPE_SH7619)
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boot_cpu_data.type = CPU_SH7619;
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@ -13,7 +13,7 @@
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#include <asm/processor.h>
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#include <asm/cache.h>
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void __cpuinit cpu_probe(void)
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void cpu_probe(void)
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{
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boot_cpu_data.family = CPU_FAMILY_SH2A;
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@ -16,7 +16,7 @@
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#include <asm/cache.h>
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#include <asm/io.h>
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void __cpuinit cpu_probe(void)
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void cpu_probe(void)
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{
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unsigned long addr0, addr1, data0, data1, data2, data3;
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@ -15,7 +15,7 @@
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#include <asm/processor.h>
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#include <asm/cache.h>
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void __cpuinit cpu_probe(void)
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void cpu_probe(void)
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{
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unsigned long pvr, prr, cvr;
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unsigned long size;
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@ -124,7 +124,7 @@ static void shx3_update_boot_vector(unsigned int cpu)
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__raw_writel(STBCR_RESET, STBCR_REG(cpu));
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}
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static int __cpuinit
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static int
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shx3_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
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{
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unsigned int cpu = (unsigned int)hcpu;
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@ -143,11 +143,11 @@ shx3_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
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return NOTIFY_OK;
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}
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static struct notifier_block __cpuinitdata shx3_cpu_notifier = {
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static struct notifier_block shx3_cpu_notifier = {
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.notifier_call = shx3_cpu_callback,
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};
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static int __cpuinit register_shx3_cpu_notifier(void)
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static int register_shx3_cpu_notifier(void)
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{
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register_hotcpu_notifier(&shx3_cpu_notifier);
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return 0;
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@ -17,7 +17,7 @@
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#include <asm/cache.h>
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#include <asm/tlb.h>
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void __cpuinit cpu_probe(void)
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void cpu_probe(void)
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{
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unsigned long long cir;
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@ -367,7 +367,7 @@ static void sh_pmu_setup(int cpu)
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memset(cpuhw, 0, sizeof(struct cpu_hw_events));
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}
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static int __cpuinit
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static int
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sh_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
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{
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unsigned int cpu = (long)hcpu;
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@ -384,7 +384,7 @@ sh_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
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return NOTIFY_OK;
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}
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int __cpuinit register_sh_pmu(struct sh_pmu *_pmu)
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int register_sh_pmu(struct sh_pmu *_pmu)
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{
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if (sh_pmu)
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return -EBUSY;
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@ -65,7 +65,7 @@ void arch_task_cache_init(void)
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# define HAVE_SOFTFP 0
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#endif
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void __cpuinit init_thread_xstate(void)
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void init_thread_xstate(void)
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{
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if (boot_cpu_data.flags & CPU_HAS_FPU)
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xstate_size = sizeof(struct sh_fpu_hard_struct);
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@ -172,7 +172,7 @@ disable:
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#endif
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}
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void __cpuinit calibrate_delay(void)
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void calibrate_delay(void)
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{
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struct clk *clk = clk_get(NULL, "cpu_clk");
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@ -37,7 +37,7 @@ struct plat_smp_ops *mp_ops = NULL;
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/* State of each CPU */
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DEFINE_PER_CPU(int, cpu_state) = { 0 };
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void __cpuinit register_smp_ops(struct plat_smp_ops *ops)
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void register_smp_ops(struct plat_smp_ops *ops)
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{
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if (mp_ops)
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printk(KERN_WARNING "Overriding previously set SMP ops\n");
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@ -45,7 +45,7 @@ void __cpuinit register_smp_ops(struct plat_smp_ops *ops)
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mp_ops = ops;
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}
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static inline void __cpuinit smp_store_cpu_info(unsigned int cpu)
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static inline void smp_store_cpu_info(unsigned int cpu)
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{
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struct sh_cpuinfo *c = cpu_data + cpu;
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@ -174,7 +174,7 @@ void native_play_dead(void)
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}
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#endif
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asmlinkage void __cpuinit start_secondary(void)
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asmlinkage void start_secondary(void)
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{
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unsigned int cpu = smp_processor_id();
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struct mm_struct *mm = &init_mm;
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@ -215,7 +215,7 @@ extern struct {
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void *thread_info;
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} stack_start;
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int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tsk)
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int __cpu_up(unsigned int cpu, struct task_struct *tsk)
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{
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unsigned long timeout;
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@ -741,7 +741,7 @@ asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
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die_if_kernel("exception", regs, ex);
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}
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void __cpuinit per_cpu_trap_init(void)
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void per_cpu_trap_init(void)
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{
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extern void *vbr_base;
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@ -810,7 +810,7 @@ asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
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poke_real_address_q(DM_EXP_CAUSE_PHY, 0x0);
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}
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void __cpuinit per_cpu_trap_init(void)
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void per_cpu_trap_init(void)
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{
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/* Nothing to do for now, VBR initialization later. */
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}
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@ -17,7 +17,7 @@
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/**
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* sh64_tlb_init - Perform initial setup for the DTLB and ITLB.
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*/
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int __cpuinit sh64_tlb_init(void)
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int sh64_tlb_init(void)
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{
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/* Assign some sane DTLB defaults */
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cpu_data->dtlb.entries = 64;
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