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ARM: dts: msm: Correct csid clock rate in Blair Camera

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This change is to correct csid clock rate in Blair camera.

CRs-Fixed: 2944976
Change-Id: Ifb7dc37eac2df5530a9a7c7fec6dc6f69e067b97
This commit is contained in:
Ayush Kumar 2021-06-23 20:01:13 +05:30 • committed by Gerrit - the friendly Code Review server
commit 4fe5bb5062
1 changed files with 3 additions and 3 deletions
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6
blair-camera.dtsi
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@ -724,7 +724,7 @@
<&gcc GCC_CAMSS_TFE_0_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CLK>;
clock-rates =
<266570000 0 0 0 300000000 0>,
<266571429 0 0 0 300000000 0>,
<426400000 0 0 0 460800000 0>,
<466500000 0 0 0 576000000 0>;
clock-cntl-level = "svs", "svs_l1", "turbo";
@ -788,7 +788,7 @@
<&gcc GCC_CAMSS_TFE_1_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_1_CLK>;
clock-rates =
<266570000 0 0 0 300000000 0>,
<266571429 0 0 0 300000000 0>,
<426400000 0 0 0 460800000 0>,
<466500000 0 0 0 576000000 0>;
clock-cntl-level = "svs", "svs_l1", "turbo";
@ -852,7 +852,7 @@
<&gcc GCC_CAMSS_TFE_2_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_2_CLK>;
clock-rates =
<266570000 0 0 0 300000000 0>,
<266571429 0 0 0 300000000 0>,
<426400000 0 0 0 460800000 0>,
<466500000 0 0 0 576000000 0>;
clock-cntl-level = "svs", "svs_l1", "turbo";